# HG changeset patch # User hgs # Date 1282657378 -3600 # Node ID 0a40b8675b23a6fc77e9027f602eacac15ac1ce2 # Parent 647ab20fee2ebd8b494e4332359765a89340f039 201031_11 diff -r 647ab20fee2e -r 0a40b8675b23 kernel/eka/drivers/resmanus/d_resmanus.cpp --- a/kernel/eka/drivers/resmanus/d_resmanus.cpp Thu Aug 12 12:51:24 2010 +0100 +++ b/kernel/eka/drivers/resmanus/d_resmanus.cpp Tue Aug 24 14:42:58 2010 +0100 @@ -1,4 +1,4 @@ -// Copyright (c) 1995-2009 Nokia Corporation and/or its subsidiary(-ies). +// Copyright (c) 1995-2010 Nokia Corporation and/or its subsidiary(-ies). // All rights reserved. // This component and the accompanying materials are made available // under the terms of the License "Eclipse Public License v1.0" @@ -2161,13 +2161,11 @@ __KTRACE_OPT(KRESMANAGER, Kern::Printf("DChannelResManUs::RemoveTrackingControl()")); // Free the resource-tracking links and their respective queues - TAny* buf; if(aTracker->iFreeQue!=NULL) { while(!aTracker->iFreeQue->IsEmpty()) { - buf = (TAny*)(aTracker->iFreeQue->GetFirst()); // Dequeues the element - delete buf; + delete aTracker->iFreeQue->GetFirst(); // Dequeues the element; } delete aTracker->iFreeQue; } @@ -2176,8 +2174,7 @@ { while(!aTracker->iBusyQue->IsEmpty()) { - buf = (TAny*)(aTracker->iBusyQue->GetFirst()); // Dequeues the element - delete buf; + delete aTracker->iBusyQue->GetFirst(); // Dequeues the element; } delete aTracker->iBusyQue; } diff -r 647ab20fee2e -r 0a40b8675b23 kernel/eka/drivers/resourceman/resourcecontrol.cpp --- a/kernel/eka/drivers/resourceman/resourcecontrol.cpp Thu Aug 12 12:51:24 2010 +0100 +++ b/kernel/eka/drivers/resourceman/resourcecontrol.cpp Tue Aug 24 14:42:58 2010 +0100 @@ -734,7 +734,15 @@ pDRes = pRC->iDynamicResDependencyList[(aReq->ClientId() & ID_INDEX_BIT_MASK)]; else pDRes = (DDynamicPowerResourceD*)pRC->iStaticResDependencyArray[(aReq->ClientId() & ID_INDEX_BIT_MASK) - 1]; - pC->iName = pDRes->iName; + + if (pDRes != NULL) + { + pC->iName = pDRes->iName; + } + else + { + pC->iName = &KNullDesC; + } } else if((aReq->ClientId() == -1) || (aReq->ClientId() == KDynamicResourceDeRegistering)) { @@ -1384,9 +1392,9 @@ } pC->iName = &aName; aClientId = pC->iClientId; + PRM_CLIENT_REGISTER_TRACE + __KTRACE_OPT(KRESMANAGER, Kern::Printf(">DPowerResourceController::RegisterClient, clientId = 0x%x", aClientId)); } - PRM_CLIENT_REGISTER_TRACE - __KTRACE_OPT(KRESMANAGER, Kern::Printf(">DPowerResourceController::RegisterClient, clientId = 0x%x", aClientId)); return(req->ReturnCode()); } @@ -1567,10 +1575,10 @@ pR = iStaticResourceArray[pCL->iResourceId - 1]; #endif #ifdef PRM_ENABLE_EXTENDED_VERSION - if(((pR->Sense() == DStaticPowerResource::ECustom) || ((TInt)pCL->iClientId == pR->iLevelOwnerId)) && (!(pCL->iResourceId & KIdMaskDynamic) || - ((pCL->iResourceId & KIdMaskDynamic) && (((DDynamicPowerResource*)pR)->LockCount() != 0)))) + if(pR && (((pR->Sense() == DStaticPowerResource::ECustom) || ((TInt)pCL->iClientId == pR->iLevelOwnerId)) && (!(pCL->iResourceId & KIdMaskDynamic) || + ((pCL->iResourceId & KIdMaskDynamic) && (((DDynamicPowerResource*)pR)->LockCount() != 0))))) #else - if((pR->Sense() == DStaticPowerResource::ECustom) || ((TInt)pCL->iClientId == pR->iLevelOwnerId)) + if(pR && ((pR->Sense() == DStaticPowerResource::ECustom) || ((TInt)pCL->iClientId == pR->iLevelOwnerId))) #endif { pReq->ReqType() = TPowerRequest::ESetDefaultLevel; @@ -3686,9 +3694,9 @@ //Store the current thread Id; pC->iThreadId = t.iId; aClientId = pC->iClientId; + __KTRACE_OPT(KRESMANAGER, Kern::Printf(">DPowerResourceController::RegisterProxyClient, clientId = 0x%x", aClientId)); + PRM_CLIENT_REGISTER_TRACE } - __KTRACE_OPT(KRESMANAGER, Kern::Printf(">DPowerResourceController::RegisterProxyClient, clientId = 0x%x", aClientId)); - PRM_CLIENT_REGISTER_TRACE LOCK_AND_CRITICAL_SECTION_COUNT_CHECK return KErrNone; } @@ -3831,7 +3839,6 @@ pS++; } iListForIdle=(SIdleResourceInfo*)aBuf->Ptr(); - pS = (SIdleResourceInfo*)aBuf->Ptr(); UnLock(); LOCK_AND_CRITICAL_SECTION_COUNT_CHECK return KErrNone; diff -r 647ab20fee2e -r 0a40b8675b23 kernel/eka/include/drivers/gpio.h --- a/kernel/eka/include/drivers/gpio.h Thu Aug 12 12:51:24 2010 +0100 +++ b/kernel/eka/include/drivers/gpio.h Tue Aug 24 14:42:58 2010 +0100 @@ -18,6 +18,14 @@ #ifndef __GPIO_H__ #define __GPIO_H__ +#include + +#ifdef __USE_GPIO_STATIC_EXTENSION__ +// test standard extension handler number. *DO NOT USE* +#define KTestStaticExtension 0x80000000 +#include +#endif + class TGpioCallback; //forward declaration /** @@ -232,7 +240,6 @@ /** Reads the pin idle configuration and state. - @param aId The pin Id. @param aConf On return contains the idle configuration and state previoulsy set on the pin. @@ -274,7 +281,6 @@ KErrGeneral, if there is no ISR bound to this interrupt. */ IMPORT_C static TInt UnbindInterrupt(TInt aId); - /** Enables the interrupt on specified pin. @@ -286,7 +292,6 @@ KErrGeneral, if there is no ISR bound to this interrupt. */ IMPORT_C static TInt EnableInterrupt(TInt aId); - /** Disables the interrupt on specified pin. diff -r 647ab20fee2e -r 0a40b8675b23 kernel/eka/include/drivers/resourcecontrol.h --- a/kernel/eka/include/drivers/resourcecontrol.h Thu Aug 12 12:51:24 2010 +0100 +++ b/kernel/eka/include/drivers/resourcecontrol.h Tue Aug 24 14:42:58 2010 +0100 @@ -136,13 +136,19 @@ TInt growBy = (list).GrowBy(); \ if(!growBy) \ (list).Initialise(PRM_DYNAMIC_RESOURCE_INITIAL_SIZE); \ - if((list).Add(res, resId) == KErrNoMemory) \ + TInt r = (list).Add(res, resId); \ + if(r == KErrNoMemory) \ { \ - TInt r = (list).ReSize(growBy); \ - if(r != KErrNone) \ - return r; \ - (list).Add(res, resId); \ + r = (list).ReSize(growBy); \ + if(r == KErrNone) \ + { \ + r = (list).Add(res, resId); \ + } \ } \ + if(r != KErrNone) \ + { \ + return r; \ + } \ res->iResourceId |= resId; \ resId = res->iResourceId; \ resIdCount++; \ diff -r 647ab20fee2e -r 0a40b8675b23 kernel/eka/release.txt --- a/kernel/eka/release.txt Thu Aug 12 12:51:24 2010 +0100 +++ b/kernel/eka/release.txt Tue Aug 24 14:42:58 2010 +0100 @@ -1,3 +1,26 @@ +Version 2.00.3114 +================= +(Made by fadhliM 06/08/2010) + +1. vfebvre + 1. ou1cimx1#502965 ENV : E32Test T_HEAPDL Fails TestRHeap::Test3() + +2. jimhofe + 1. MINOR_CHANGE Adding f32test\rofs and f32test\loader to package_definition.xml + 2. MINOR_CHANGE Adding rofs_tests.mrp + 3. MINOR_CHANGE Removing author names from documentation + +3. lanerobe + 1. ou1cimx1#506647 T_SMPSOAK debug output is not standard + +4. cnotton + 1. ou1cimx1#500725 Coverity defects - Resource Manager and ResManUS + +5. jukwak + 1. ou1cimx1#413512 DEV - GPIO SHAI is missing the inclusion of static extension function handlers + 2. ou1cimx1#468979 t_pci has dependency on naviengine + + Version 2.00.3113 ================= (Made by fadhliM 02/08/2010) diff -r 647ab20fee2e -r 0a40b8675b23 kernelhwsrv_info/doc_pub/Base_How_To_Use_T_Fatcharsetconv_Framework.doc Binary file kernelhwsrv_info/doc_pub/Base_How_To_Use_T_Fatcharsetconv_Framework.doc has changed diff -r 647ab20fee2e -r 0a40b8675b23 kernelhwsrv_info/doc_pub/Base_Migrating_Kernel API Preconditions Checking.doc Binary file kernelhwsrv_info/doc_pub/Base_Migrating_Kernel API Preconditions Checking.doc has changed diff -r 647ab20fee2e -r 0a40b8675b23 kernelhwsrv_info/doc_pub/Base_Migrating_device_drivers_DFC_Q.doc Binary file kernelhwsrv_info/doc_pub/Base_Migrating_device_drivers_DFC_Q.doc has changed diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/group/bld.inf --- a/kerneltest/e32test/group/bld.inf Thu Aug 12 12:51:24 2010 +0100 +++ b/kerneltest/e32test/group/bld.inf Tue Aug 24 14:42:58 2010 +0100 @@ -69,7 +69,6 @@ ../dll/oe/eabi/urel/t_oeexport1.exe /epoc32/release/armv5/urel/t_oeexport1.exe ../demandpaging/d_pagestress.h OS_LAYER_PLATFORM_EXPORT_PATH(d_pagestress.h) -../pci/t_pci.h OS_LAYER_PLATFORM_EXPORT_PATH(e32test/t_pci.h) ../iic/iic_psl/i2c.h OS_LAYER_PLATFORM_EXPORT_PATH(e32test/i2c.h) ../iic/iic_psl/spi.h OS_LAYER_PLATFORM_EXPORT_PATH(e32test/spi.h) @@ -1055,6 +1054,3 @@ #include "../domainmgr/test.inf" -//pci tests -t_pci - diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/group/t_pci.mmp --- a/kerneltest/e32test/group/t_pci.mmp Thu Aug 12 12:51:24 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,27 +0,0 @@ -// Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). -// All rights reserved. -// This component and the accompanying materials are made available -// under the terms of the License "Eclipse Public License v1.0" -// which accompanies this distribution, and is available -// at the URL "http://www.eclipse.org/legal/epl-v10.html". -// -// Initial Contributors: -// Nokia Corporation - initial contribution. -// -// Contributors: -// -// Description: -// e32test/group/t_pci.mmp - -TARGET t_pci.exe -TARGETTYPE EXE -SOURCEPATH ../pci -SOURCE t_pci.cpp -LIBRARY euser.lib -OS_LAYER_SYSTEMINCLUDE_SYMBIAN - -CAPABILITY ReadDeviceData WriteDeviceData - -VENDORID 0x70000001 - -SMPSAFE diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/heap/t_heapdl.cpp --- a/kerneltest/e32test/heap/t_heapdl.cpp Thu Aug 12 12:51:24 2010 +0100 +++ b/kerneltest/e32test/heap/t_heapdl.cpp Tue Aug 24 14:42:58 2010 +0100 @@ -28,6 +28,8 @@ #include "page_alloc.h" #include "heap_hybrid.h" +const TUint KTestIterations = 100; + const TInt KHeadSize = (TInt)RHeap::EAllocCellSize; class TestHybridHeap @@ -319,7 +321,7 @@ // // Allocation of approximate sized cells from 'small cell' lists (smallbin) // - TInt ArraySize=32; + const TInt ArraySize=32; TInt cellSize=0; TAny** ArrayOfCells; ArrayOfCells= new TAny*[ArraySize]; @@ -328,17 +330,13 @@ // Allocate small approximate sized cells and put //them to the array. They are allocated from TOP chunk - TUint8 randomSize; + TUint8 randomSize[ArraySize]; for(ArrayIndex=0; ArrayIndex240); - - cellSize=randomSize; + // Ensure that the size of the cell does not exceed 256 bytes on debug builds + randomSize[ArrayIndex] = (TUint8) (Math::Random() % (MAX_SMALL_REQUEST + 1 - RHeap::EDebugHdrSize)); + cellSize=randomSize[ArrayIndex]; ArrayOfCells[ArrayIndex]=iHeap->Alloc(cellSize); TestHybridHeap::TopSize(topSizeAfter,iHybridHeap); test(topSizeBefore > topSizeAfter); @@ -358,20 +356,21 @@ iHeap->Check(); // Allocate approximate sized cells from smallbin - TInt ArraySize2=6; - TInt cellSize2=0; + const TInt ArraySize2=6; + TInt cellSize2=0; TAny** ArrayOfCells2; ArrayOfCells2= new TAny*[ArraySize2]; TInt ArrayIndex2; TestHybridHeap::SmallMap(smallMap,iHybridHeap); + TUint8 randomSize2[ArraySize2]; for(ArrayIndex2=0; ArrayIndex2Alloc(cellSize2); } TestHybridHeap::SmallMap(smallMap2,iHybridHeap); - test(smallMap>=smallMap2); + test(smallMap>=smallMap2); iHeap->Check(); // Freeing of approximate sized cells back to smallbin @@ -396,7 +395,7 @@ // Allocation of approximate sized cells from digital trees (treebin) and splitting // Freeing of approximate sized cells back to digital trees (treebin) // - TInt ArraySize=32; + const TInt ArraySize=32; TInt cellSize=0; TAny** ArrayOfCells; ArrayOfCells= new TAny*[ArraySize]; @@ -404,15 +403,16 @@ // Allocate approximate sized cells bigger than 256 // and put them to the array. They are allocated from TOP chunk + TUint8 randomSize[ArraySize]; for(ArrayIndex=0; ArrayIndexAlloc(cellSize); } iHeap->Check(); - TUint treeMap,treeMap2; + TUint treeMap,treeMap2; // Free some of allocated cells from the array. So they are inserted // to the treebin for(ArrayIndex=2; ArrayIndexCheck(); // Allocate approximate sized cells from treebin - TInt ArraySize2=16; + const TInt ArraySize2=16; TInt cellSize2=0; TAny** ArrayOfCells2; ArrayOfCells2= new TAny*[ArraySize2]; TInt ArrayIndex2; + TUint8 randomSize2[ArraySize2]; for(ArrayIndex2=0; ArrayIndex2Alloc(cellSize2); TestHybridHeap::TreeMap(treeMap2,iHybridHeap); test(treeMap >= treeMap2); @@ -474,16 +475,29 @@ __KHEAP_MARK; TestRHeap T; + TUint i; test.Start(_L("Init DL allocator tests")); T.InitTests(); test.Next(_L("Test DL allocator 1")); - T.Test1(); + for(i = 0; i < KTestIterations; i++) + { + T.Test1(); + } test.Next(_L("Test DL allocator 2")); - T.Test2(); + for(i = 0; i < KTestIterations; i++) + { + T.Test2(); + } test.Next(_L("Test DL allocator 3")); - T.Test3(); + for(i = 0; i < KTestIterations; i++) + { + T.Test3(); + } test.Next(_L("Test DL allocator 4")); - T.Test4(); + for(i = 0; i < KTestIterations; i++) + { + T.Test4(); + } test.Next(_L("Close DL allocator tests")); T.CloseTests(); diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/pci/t_pci.cpp --- a/kerneltest/e32test/pci/t_pci.cpp Thu Aug 12 12:51:24 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,865 +0,0 @@ -// Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). -// All rights reserved. -// This component and the accompanying materials are made available -// under the terms of the License "Eclipse Public License v1.0" -// which accompanies this distribution, and is available -// at the URL "http://www.eclipse.org/legal/epl-v10.html". -// -// Initial Contributors: -// Nokia Corporation - initial contribution. -// -// Contributors: -// -// Description: -// This is a test for the PCI driver, so far implemented only on the -// Naviengine platform. It aims to test: -// -That known values of data in config and memory space, on a given -// device can be read as expected. -// -That data can be written and modified in config and memory space -// -PCI memory buffers mapped or allocated by the PCI driver work as -// expected. These are -// -DChunk created by PCI driver and accessible from PCI -// -DPlatHwChunk created by PCI driver and accessible from PCI -// -DChunk created externally, then mapped in to PCI memory space -// There are tests to: -// - Create and close each buffer. Heap checking ensures proper -// cleanup -// - Create and close multiple buffers from multiple threads. -// This is an SMP focused test to check that the implementation -// of the chunk manager and allocator in the driver are thread -// safe. The tests should pass without triggering any assertions in -// the driver's invariance checks. -// - Write to buffers from software, and read back via the -// system to PCI window, and vice-versa -- a loop-back test. -// This checks that PCI buffers are indeed accessible to PCI devices. -// -// The tests require several pieces of PSL specific information: -// - A TPciDevice containing the vendor and device IDs of a PCI device -// to use for testing. -// - TAddrSpaceTests which identify regions of a device's config and -// memory space with known values, or which are known to be writable. -// -// The test driver grants access to the PCI API with the following -// constructs: -// - TUserConfigSpace and TUserMemorySpace, derived from TUserPciSpace, -// which are user side equivalents of kernel-side objects allowing -// accesses of different sizes to a PCI device's config space or -// memory space. -// - RPciChunk which is derived from and RChunk and corresponds to -// a kernel-side DChunk, which in turn corresponds to a PCI chunk or -// buffer. The test driver uses these for all PCI chunk types (a -// "wrapper" DChunk is used to map the memory of a PCI DPlatHwChunk -// to user side). -// -// Known Issues: -// The test driver d_pci is intended to be platform independent but -// for now still contains some PSL specific information .eg the test -// info structure (which should really be passed up from the PSL) and -// the address and size of the system to pci window. For now the -// test driver code will remain in the Naviengine baseport directory. -// If the PCI driver is ever ported to a new platform this can be -// rectified. -// -// -// -#include "../misc/test_thread.h" -#include -#define __E32TEST_EXTENSION__ -#include -#include "t_pci.h" -#include - -class RPci; -/** -Extends RChunk to hold the PCI address -associated with a chunk. -*/ -class RPciChunk: public RChunk - { -public: - TUint PciBase() - { - return iPciBaseAddr; - } - - /** - Return the PCI accessible size - */ - TInt Size() const - { - return iPciSize; - } - -private: - friend class RPci; - TUint iPciBaseAddr; - TInt iPciSize; //size of the region mapped into PCI - }; - -typedef TInt (RPci::*ChunkOpenFn)(RPciChunk&, TInt, TRequestStatus*); - -class RPci : public RBusLogicalChannel - { -public: - TInt Open(); - TInt GetTestInfo(TPciTestInfo& aTestInfo); - - TInt Open(const TPciDevice&); - - TUint AccessConfigSpace(const TUserConfigSpace& aCs); - TUint AccessMemorySpace(const TUserMemorySpace& aMs); - TInt OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); - TInt OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); - TInt OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus=0); - TInt OpenPciWindowChunk(RChunk& aPciWindowChunk); - TInt RunUnitTests(); -private: - TInt DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus); - }; - -inline TInt RPci::Open() - { - return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, NULL); - } - -inline TInt RPci::Open(const TPciDevice& aDevice) - { - TPckgC devicePkg(aDevice); - return DoCreate(KPciLddFactory, TVersion(), KNullUnit, NULL, &devicePkg); - } - -inline TInt RPci::GetTestInfo(TPciTestInfo& aTestInfo) - { - TPckg info(aTestInfo); - return DoControl(EGetTestInfo, &info); - } - -inline TInt RPci::RunUnitTests() - { - return DoControl(ERunUnitTests); - } - -TUint RPci::AccessConfigSpace(const TUserConfigSpace& aCs) - { - TPckgC pkg(aCs); - return DoControl(EAccessConfigSpace, &pkg); - } - -TUint RPci::AccessMemorySpace(const TUserMemorySpace& aMs) - { - TPckgC pkg(aMs); - return DoControl(EAccessMemorySpace, &pkg); - } - -TInt RPci::OpenPciDChunk(RPciChunk& aPciChunk,TInt aPciChunkSize, TRequestStatus* aStatus) - { - return DoOpenPciChunk(aPciChunk, aPciChunkSize, EOpenPciDChunk, aStatus); - } - -TInt RPci::OpenPciPlatHwChunk(RPciChunk& aPciHwChunk,TInt aPciChunkSize, TRequestStatus* aStatus) - { - return DoOpenPciChunk(aPciHwChunk, aPciChunkSize, EOpenPciPlatHwChunk, aStatus); - } - -TInt RPci::OpenPciMappedChunk(RPciChunk& aPciMappedChunk,TInt aPciChunkSize, TRequestStatus* aStatus) - { - return DoOpenPciChunk(aPciMappedChunk, aPciChunkSize, EOpenPciMappedChunk, aStatus); - } - -TInt RPci::OpenPciWindowChunk(RChunk& aPciWindowChunk) - { - TUint chunkHandle = DoControl(EOpenPciWindowChunk); - return aPciWindowChunk.SetReturnedHandle(chunkHandle); - } - -TInt RPci::DoOpenPciChunk(RPciChunk& aPciChunk, TInt aPciChunkSize, TPciTestCmd aCmd, TRequestStatus* aStatus) - { - const TInt constPciChunkSize = aPciChunkSize; - TPciChunkCreateInfo info(constPciChunkSize, aPciChunk.iPciBaseAddr, aStatus); - TPckgC pkg(info); - - TUint chunkHandle = DoControl(aCmd, &pkg); - - const TInt r = aPciChunk.SetReturnedHandle(chunkHandle); - if(r == KErrNone) - { - aPciChunk.iPciSize = constPciChunkSize; - } - return r; - } - -TUserPciSpace::TUserPciSpace(RPci& aPci) - :iPci(&aPci) - {} - -TUserConfigSpace::TUserConfigSpace(RPci& aPci) - :TUserPciSpace(aPci) - {} - -TUint TUserConfigSpace::Call() - { - return iPci->AccessConfigSpace(*this); - } - -TUserPciSpace* TUserConfigSpace::Clone() const - { - return new TUserConfigSpace(*this); - } - -TUserMemorySpace::TUserMemorySpace(RPci& aPci, TInt aBarIndex) - :TUserPciSpace(aPci), iBarIndex(aBarIndex) - {} - -TUint TUserMemorySpace::Call() - { - return iPci->AccessMemorySpace(*this); - } - -TUserPciSpace* TUserMemorySpace::Clone() const - { - return new TUserMemorySpace(*this); - } - -/** -Test address allocator -*/ -TInt TestRunPciUnitTest(RPci& pci) - { - return pci.RunUnitTests(); - } - - -/** -Read from a defined address in memory or config space, compare against expected values. -8,16, and 32 bit accesses performed. - -@param aSpace Object gving access to either the config or memory space of a PCI device -@param aInfo Contains the address and expected value of a dword -*/ -void TestReadAddressSpace(TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) - { - const TUint os = aInfo.iOffset; - //Iterate over different widths, and possible - //subfields of 32 bit word - for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) - { - const TInt numberOfFields = (32/bitWidth); - for(TInt i=0; i< numberOfFields; i++) - { - const TInt extraByteOffset = i * (bitWidth >> 3); - const TInt byteOffset = os + extraByteOffset; - if(aVerbose) - test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); - - const TUint expected = aInfo.Expected(bitWidth, byteOffset); - const TUint read = aSpace.Read(bitWidth, byteOffset); - if(aVerbose) - test.Printf(_L("expect 0x%08x, read 0x%08x\n"), expected, read); - test_Equal(expected, read); - } - } - } - -/** -Verify writes and modifications to a defined address in memory or config space. 8,16, and 32 bit -accesses performed. - -@param aSpace Object gving access to either the config or memory space of a PCI device -@param aInfo Contains the address of a (at least partially) writable dword -*/ -void TestWriteAddressSpace(TUserPciSpace& aSpace, TPciTestInfo::TAddrSpaceTest& aInfo, RTest& test, TBool aVerbose=EFalse) - { - const TUint original = aSpace.Read(32, aInfo.iOffset); - const TUint os = aInfo.iOffset; - TUint mask = ~aInfo.iReadOnlyMask; - - //The pattern will be truncated when used with bit widths - //less than 32. - const TUint initPattern = 0xFFFFFFFF; - - for(TInt bitWidth=32; bitWidth>=8; bitWidth>>=1) - { - const TUint pattern = initPattern >> (32-bitWidth); - const TInt numberOfFields = (32/bitWidth); - for(TInt i=0; i< numberOfFields; i++) - { - const TInt extraByteOffset = i * (bitWidth >> 3); - const TInt byteOffset = os + extraByteOffset; - if(aVerbose) - test.Printf(_L("Access bitWidth=%d byte offset=%d\n"), bitWidth, byteOffset); - //the full dword we expect - //currently assume that the unwritable bits will be 0 - const TUint writeExpect = (pattern << (bitWidth * i) ) & mask; - const TUint clearExpect = 0; - - //do write followed by clear - const TUint expect[] = {writeExpect, clearExpect}; - const TUint write[] = {pattern, 0}; - for(TInt n = 0; n < 2; n++) - { - aSpace.Write(bitWidth, byteOffset, write[n]); - TUint result = aSpace.Read(32, os); - - if(aVerbose) - test.Printf(_L("wrote 0x%08x, expect 0x%08x, read 0x%08x\n"), - write[n], expect[n], result); - test_Equal(expect[n], result); - } - - //test Modify calls. Set then clear pattern - TUint set[] = {pattern, 0}; - TUint clear[] = {0, pattern}; - - for(TInt m = 0; m < 2; m++) - { - aSpace.Modify(bitWidth, byteOffset, clear[m], set[m]); - TUint result = aSpace.Read(32, os); - - if(aVerbose) - test.Printf(_L("clear 0x%08x, set 0x%08x, expect 0x%08x, read 0x%08x\n"), clear[m], set[m], expect[m], result); - test_Equal(expect[m], result); - } - } - } - - //restore orginal value or we will not be able to access device - aSpace.Write(32, os, original); - } - - -/** -Verify that a PCI DChunk can be opened and closed from user side - -@param pci The RPci object to use -@param test The RTest object to use -@param aPciChunkSize The size of the DChunk which would be created -*/ -void TestOpenAndCloseDChunk(RPci& pci,RTest& test,TInt aPciChunkSize) - { - RPciChunk testPciDChunk; - - // Create and open Chunk - TRequestStatus status; - TInt r = pci.OpenPciDChunk(testPciDChunk,aPciChunkSize, &status); - test_KErrNone(r); - - test(testPciDChunk.IsWritable()); - test(testPciDChunk.IsReadable()); - - test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciDChunk.Base()); - test.Printf(_L("PCI Chunk size = %d\n"), testPciDChunk.Size()); - test.Printf(_L("PCI Address = 0x%08x\n"), testPciDChunk.PciBase()); - - //Close Chunk - test.Next(_L("Close PCI Chunk handle")); - - RTest::CloseHandleAndWaitForDestruction(testPciDChunk); - User::WaitForRequest(status); - } - -/** -Verify that a PCI PlatHwChunk can be opened and closed from user side - - -@param pci The RPci object to use -@param test The RTest object to use -@param aPciChunkSize The size of the PlatHwChunk which would be created -*/ -void TestOpenAndClosePciPlatHwChunk(RPci& pci,RTest& test,TInt aPciChunkSize) - { - RPciChunk testPciPlatHwChunk; - - // Create and open Chunk - TRequestStatus status; - TInt r = pci.OpenPciPlatHwChunk(testPciPlatHwChunk,aPciChunkSize, &status); - test_KErrNone(r); - - test(testPciPlatHwChunk.IsWritable()); - test(testPciPlatHwChunk.IsReadable()); - - test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciPlatHwChunk.Base()); - test.Printf(_L("PCI Chunk size = %d\n"), testPciPlatHwChunk.Size()); - test.Printf(_L("PCI Address = 0x%08x\n"), testPciPlatHwChunk.PciBase()); - - //Close Chunk - testPciPlatHwChunk.Close(); - User::WaitForRequest(status); - test.Next(_L("Closed PCI PlatHwChunk handle")); - } - -/** -Verify that pci-mapped DChunk can be opended and closed form user side - -@param pci The RPci object to use -@param test The RTest object to use -@param aPciChunkSize The size of the pci-mapped DChunk which would be created -*/ -void TestPciMapppedChunk(RPci& pci,RTest& test,TInt aPciChunkSize) - { - RPciChunk testPciMappedChunk; - - // Create and open Chunk - TRequestStatus status; - TInt r = pci.OpenPciMappedChunk(testPciMappedChunk,aPciChunkSize, &status); - test_KErrNone(r); - - test(testPciMappedChunk.IsWritable()); - test(testPciMappedChunk.IsReadable()); - - test.Printf(_L("PCI Chunk base = 0x%08x\n"), testPciMappedChunk.Base()); - test.Printf(_L("PCI Chunk size = %d\n"), testPciMappedChunk.Size()); - test.Printf(_L("PCI Address = 0x%08x\n"), testPciMappedChunk.PciBase()); - - //Close Chunk - testPciMappedChunk.Close(); - User::WaitForRequest(status); - test.Next(_L("Closed PCI Mapped Chunk handle")); - } - -/** -Verify that an RChunk can be open to grant access to the internal PCI window from the user side - -@param pci The RPci object to use -@param test The RTest object to use -*/ -void TestPciWindowChunk(RPci& pci,RTest& test) - { - RChunk testPciWindowChunk; - - // Create and open DChunk - TInt r = pci.OpenPciWindowChunk(testPciWindowChunk); - test_KErrNone(r); - - test(testPciWindowChunk.IsWritable()); - test(testPciWindowChunk.IsReadable()); - - test.Printf(_L("PCI Window Chunk base = 0x%08x\n"), testPciWindowChunk.Base()); - test.Printf(_L("PCI Window Chunk size = %d\n"), testPciWindowChunk.Size()); - - //Close Chunk - testPciWindowChunk.Close(); - test.Next(_L("Closed PCI Window Chunk handle")); - } - - -class CPciTest : public CTest - { -protected: - CPciTest(const TDesC& aName, TInt aIterations, RPci& aDevice) - : CTest(aName, aIterations), iDevice(aDevice) - {} - - RPci iDevice; - }; - -/** -Each instance of test will open a chunk, using the function specified in -the template argument, FUNC. - -The total number of chunks that can be opened by all instances is limited -by iMaxCount. - -All intances of the test will hold their chunk open until iMaxCount has -been reached. -*/ -template -class CPciOpenChunkTest : public CPciTest - { -public: - CPciOpenChunkTest(const TDesC& aName, TInt aIterations, RPci& aDevice, - RSemaphore aSemOpen, RSemaphore aSemClose, RFastLock aLock, TInt aMaxCount) - :CPciTest(aName, aIterations, aDevice), - iSemOpen(aSemOpen), iSemClose(aSemClose), iLock(aLock), iMaxCount(aMaxCount) - { - } - - virtual void RunTest() - { - RTest test(iName); - RPciChunk chunk; - - iSemOpen.Wait(); - TRequestStatus status; - const TInt chunkSize = 0x400; - //open chunk by calling FUNC - TInt r = ((iDevice).*(FUNC))(chunk, chunkSize, &status); - test_KErrNone(r); - - iLock.Wait(); - iOpenCount++; - test.Printf(_L("Opened chunk %d\n"), iOpenCount); - if(iOpenCount == iMaxCount) - { - test.Printf(_L("Opened=%d, max=%d: Allow chunks to close\n"), iOpenCount, iMaxCount); - //release all waiting threads - //plus 1 preincrement so this - //thread also passes - iSemClose.Signal(iOpenCount); - iOpenCount = 0; - } - iLock.Signal(); - - - iSemClose.Wait(); - chunk.Close(); - User::WaitForRequest(status); - - // permit another chunk to be opened - iSemOpen.Signal(); - test.Close(); - } - - virtual CTest* Clone() const - { - //make shallow copy - return new CPciOpenChunkTest(*this); - } - - -private: - RSemaphore& iSemOpen; ///!< Represents the number of available PCI mappings - RSemaphore& iSemClose; ///!< Represents the number of threads waiting to close their chunk - RFastLock& iLock; - static TInt iOpenCount; - const TInt iMaxCount; - }; - -template -TInt CPciOpenChunkTest::iOpenCount = 0; - - -/** -Test which will perform various reads from a PCI address -space (config or memory) and confirm that values are read -as expected -*/ -class CPciAddressSpaceRead : public CPciTest - { -public: - CPciAddressSpaceRead(const TDesC& aName, TInt aIterations, RPci& aDevice, - const TUserPciSpace& aSpace, const TPciTestInfo::TAddrSpaceTest& aInfo) - :CPciTest(aName, aIterations, aDevice), - iAddressSpace(aSpace.Clone()), iSpaceTestInfo(aInfo) - { - } - - CPciAddressSpaceRead(const CPciAddressSpaceRead& aOther) - :CPciTest(aOther)/* TODO-REVIEW have object-sliced aOther - is this ok?*/, - iAddressSpace(aOther.iAddressSpace->Clone()), iSpaceTestInfo(aOther.iSpaceTestInfo) - { - } - - virtual ~CPciAddressSpaceRead() - { - delete iAddressSpace; - } - - virtual void RunTest() - { - __UHEAP_MARK; - RTest test(iName); - TestReadAddressSpace(*iAddressSpace, iSpaceTestInfo, test); - test.Close(); - __UHEAP_MARKEND; - } - - virtual CTest* Clone() const - { - //make shallow copy - return new CPciAddressSpaceRead(*this); - } - -private: - TUserPciSpace* iAddressSpace; - const TPciTestInfo::TAddrSpaceTest& iSpaceTestInfo; - }; - -/** -For aBuffer, test writing to it then reading back from aWindow -then write via window and read back from chunk - -@param test The RTest object to use -@param aBuffer RChunk corresponding to a PCI accessible buffer -@param aWindow RChunk coressponding an appropriate System-to-PCI memory window -It is presumed to start at PCI address 0 -*/ -void DoLoopBackTest(RTest& test, RPciChunk aBuffer, RChunk aWindow) - { - test.Start(_L("Test accessing memory via PCI")); - - TUint8* const bufferBase = aBuffer.Base(); - const TUint bufferSize = aBuffer.Size(); - const TUint bufferPciBase = aBuffer.PciBase(); - - TUint8* const windowBase = aWindow.Base(); - const TUint windowSize = aWindow.Size(); - -#define PRINT(N) RDebug::Printf("%s = 0x%08x (%d)", #N, (N), (N)) - PRINT(bufferBase); - PRINT(bufferSize); - PRINT(bufferPciBase); - - PRINT(windowBase); - PRINT(windowSize); - -#undef PRINT - - //need to check that the end of the buffer - //is within the windowed region - test(bufferPciBase + bufferSize <= windowSize); - TUint8* const bufferBaseWithinWindow = windowBase + bufferPciBase; - - test.Next(_L("write chunk")); - for(TUint i = 0; i < bufferSize; ++i) - { - //each byte will hold its own offset modulo 256 - bufferBase[i] = (TUint8)i; - } - - test.Next(_L("read back via window")); - for(TUint j=0; j < bufferSize; ++j) - { - const TUint8 result = bufferBaseWithinWindow[j]; - test_Equal(j%256, result); - } - - //clear chunk - memclr(bufferBase, bufferSize); - test.Next(_L("write via window")); - for(TUint k=0; k < bufferSize; ++k) - { - //each byte will hold its own offset modulo 256 - bufferBaseWithinWindow[k] = (TUint8)k; - } - - test.Next(_L("read back from chunk")); - for(TUint l=0; l < bufferSize; ++l) - { - const TUint8 result = bufferBase[l]; - test_Equal(l%256, result); - } - - test.End(); - } - -/** -Take care of opening a chunk, running the test and closing -*/ -template -inline void LoopBackTest(RPci& aPci, RTest& test, RChunk& aWindow) - { - RPciChunk pciChunk; - const TInt chunkSize = 0x400; //1k - - //call the specified chunk opening function - TRequestStatus status; - TInt r = ((aPci).*(OPEN_FUNC))(pciChunk, chunkSize, &status); - test_KErrNone(r); - DoLoopBackTest(test, pciChunk, aWindow); - pciChunk.Close(); - User::WaitForRequest(status); - } - -/** -Run the loopback test for the 3 types of buffer supported by the PCI driver. -DChunk -DPlatChunk -Mapped In external memory -*/ -void TestLoopBack(RPci& aPci, RTest& test) - { - test.Next(_L("Open PCI window")); - RChunk window; - - TInt r = aPci.OpenPciWindowChunk(window); - test_KErrNone(r); - - test.Next(_L("DChunk")); - LoopBackTest<&RPci::OpenPciDChunk>(aPci, test, window); - - test.Next(_L("DPlatHwChunk")); - LoopBackTest<&RPci::OpenPciPlatHwChunk>(aPci, test, window); - - test.Next(_L("DChunk (mapped in)")); - LoopBackTest<&RPci::OpenPciMappedChunk>(aPci, test, window); - - window.Close(); - } -#ifndef __VC32__ //visual studio 6 doesn't approve of pointer to member function template parameters -/** -Run the CPciOpenChunkTest for each type of chunk. This function also creates (and destroys) the -necessary semaphores and locks. -CPciOpenChunkTest objects are run in multiple threads using MultipleTestRun(). - -@param aDevice Handle to the test driver -@param test RTest to use. -@param aBufferLimit The maximum number of buffers which can be opened simultaneously -*/ -void TestBufferOpenConcurrency(RPci& aDevice, RTest& test, TInt aBufferLimit) - { - RSemaphore semaphoreOpen; - RSemaphore semaphoreClose; - RFastLock lock; - - TInt r = semaphoreOpen.CreateLocal(aBufferLimit); - test_KErrNone(r); - - r = semaphoreClose.CreateLocal(0); - test_KErrNone(r); - - r = lock.CreateLocal(); - test_KErrNone(r); - - const TInt iterations = 3; - { - test.Printf(_L("Opening %d PCI DChunks in %d threads\n"), aBufferLimit, aBufferLimit); - CPciOpenChunkTest<&RPci::OpenPciDChunk> - dChunkTest(_L("Concurrent-DChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); - - MultipleTestRun(test, dChunkTest, aBufferLimit); - } - - { - test.Printf(_L("Opening %d PCI DPlatHwChunks in %d threads\n"), aBufferLimit, aBufferLimit); - CPciOpenChunkTest<&RPci::OpenPciPlatHwChunk> - platChunkTest(_L("Concurrent-DPlatHwChunk"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); - - MultipleTestRun(test, platChunkTest, aBufferLimit); - } - - { - test.Printf(_L("Opening %d PCI Mapped chunks in %d threads\n"), aBufferLimit, aBufferLimit); - CPciOpenChunkTest<&RPci::OpenPciMappedChunk> - mappedChunkTest(_L("Concurrent-DChunk(mapped)"), iterations, aDevice, semaphoreOpen, semaphoreClose, lock, aBufferLimit); - - MultipleTestRun(test, mappedChunkTest, aBufferLimit); - } - - semaphoreOpen.Close(); - semaphoreClose.Close(); - lock.Close(); - } -#endif - -TInt E32Main() - { - __UHEAP_MARK; - - _LIT(KPci, "PCI"); - RTest test(KPci); - test.Start(_L("Running PCI tests\n")); - - TInt r = User::LoadLogicalDevice(KPciLdd); - - __KHEAP_MARK; - - if(r==KErrNotFound) - { - test.Printf(_L("No PCI system present - skipping test\n")); - return KErrNone; - } - if(r!=KErrNone && r!=KErrAlreadyExists) - { - test_KErrNone(r); - } - - test.Next(_L("Open non-existant device\n")); - RPci device; - TPciDevice unavailable; - r = device.Open(unavailable); - test_Equal(KErrNotFound, r); - - RPci pciInfo; - r = pciInfo.Open(); - test_KErrNone(r); - - test.Next(_L("Get test info from driver\n")); - TPciTestInfo info; - r = pciInfo.GetTestInfo(info); - test_KErrNone(r); - pciInfo.Close(); - - test.Next(_L("Open test device\n")); - r = device.Open(info.iDevice); - test_KErrNone(r); - - test.Next(_L("Run Device Unit Test\n")); - r=TestRunPciUnitTest(device); - test_KErrNone(r); - - test.Next(_L("Read config space\n")); - TUserConfigSpace cs(device); - TestReadAddressSpace(cs, info.iCfgSpaceRead, test); - - test.Next(_L("Write config space\n")); - TestWriteAddressSpace(cs, info.iCfgSpaceWrite, test); - - test.Next(_L("Read memory space\n")); - TUserMemorySpace ms(device, info.iMemSpaceIndex); - TestReadAddressSpace(ms, info.iMemSpaceRead, test); - - test.Next(_L("Modify memory space\n")); - TestWriteAddressSpace(ms, info.iMemSpaceWrite, test); - - { - const TInt addrSpaceThreadCount = 4; - const TInt iterations = 100; - test.Next(_L("Concurrent config space reads")); - CPciAddressSpaceRead cfgSpaceRead(_L("Cfg Space Read"), iterations, device, cs, info.iCfgSpaceRead); - MultipleTestRun(test, cfgSpaceRead, addrSpaceThreadCount); - - test.Next(_L("Concurrent memory space reads")); - CPciAddressSpaceRead memSpaceRead(_L("Memory Space Read"), iterations, device, ms, info.iMemSpaceRead); - MultipleTestRun(test, memSpaceRead, addrSpaceThreadCount); - } - - TInt testDChunkSize = 0x4000; - test.Next(_L("Open and Close DChunks\n")); - TestOpenAndCloseDChunk(device,test,testDChunkSize); - - TInt testDPlatChunkSize = 0x2000; - test.Next(_L("Open and Close PlatHwChunks\n")); - TestOpenAndClosePciPlatHwChunk(device,test,testDPlatChunkSize); - - //TestPciMapppedChunk() fails for sizes greater than 4K. - //The issue is that a block of externally mapped memory must be - //naturally alligned in order to be accessible to the PCI bus (ie - //an 8k buffer would have to start at an address which is a - //multiple of 8k. - // - //Now we could fix this for sure on the kernel side, by making - //sure we only commit correctly aligned memory into the chunk (as - //the pci driver itself does), - //However, by using a 4k chunk, we know this will be on a page - //boundary so the alignment is correct (assuming the page size - //isn't changed). - TInt testMapppedChunkSize = 0x1000; - test.Next(_L("Open and Close Pci Mappped Chunk\n")); - TestPciMapppedChunk(device,test,testMapppedChunkSize); - - test.Next(_L("Open and Close Pci Window Chunk\n")); - TestPciWindowChunk(device,test); - - const TInt numberOfThreads = info.iNumberOfBars; - test.Printf(_L("Open buffers concurrently, max supported = %d\n"), numberOfThreads); -#ifndef __VC32__ - TestBufferOpenConcurrency(device, test, numberOfThreads); -#else - test.Printf(_L("TestBufferOpenConcurrency not implemented for WINS"), numberOfThreads); -#endif - - test.Next(_L("Test loop back")); - TestLoopBack(device, test); - - device.Close(); - __KHEAP_MARKEND; - - r = User::FreeLogicalDevice(KPciLdd); - test_KErrNone(r); - - test.End(); - test.Close(); - - __UHEAP_MARKEND; - return KErrNone; - } diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/pci/t_pci.h --- a/kerneltest/e32test/pci/t_pci.h Thu Aug 12 12:51:24 2010 +0100 +++ /dev/null Thu Jan 01 00:00:00 1970 +0000 @@ -1,254 +0,0 @@ -// Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). -// All rights reserved. -// This component and the accompanying materials are made available -// under the terms of the License "Eclipse Public License v1.0" -// which accompanies this distribution, and is available -// at the URL "http://www.eclipse.org/legal/epl-v10.html". -// -// Initial Contributors: -// Nokia Corporation - initial contribution. -// -// Contributors: -// -// Description: This is the header file for the PCI driver test , so far implemented -// only on the Naviengine platform - -#ifndef __TPCI_TEST_H -#define __TPCI_TEST_H - -#ifndef __KERNEL_MODE__ -#define __E32TEST_EXTENSION__ -#include - #include -#endif // __KERNEL_MODE__ - -_LIT(KPciLdd, "d_pci.ldd"); -_LIT(KPciLddFactory, "PCI_test_factory"); -_LIT(KPciTest, "PCI Test LDD"); - -/** -Test driver op-codes -*/ -enum TPciTestCmd - { - EGetTestInfo, - EAccessConfigSpace, - EAccessMemorySpace, - EOpenPciDChunk, - EOpenPciPlatHwChunk, - EOpenPciMappedChunk, - EOpenPciWindowChunk, - ERunUnitTests - }; - -/** -Identifies a PCI Function (device) on the system -*/ -struct TPciDevice - { - TPciDevice() - :iVendorId(0xFFFFFFFF), iDeviceId(0xFFFFFFFF), iInstance(0) {} - - TPciDevice(TUint aVendorId, TUint aDeviceId, TInt aInstance=0) - :iVendorId(aVendorId), iDeviceId(aDeviceId), iInstance(aInstance) {} - - TUint iVendorId; - TUint iDeviceId; - TInt iInstance; ///< Unit to open (there could be multiple devices on system) - }; - -/** -Used to send chunk size and recieve -PCI address -*/ -struct TPciChunkCreateInfo - { - TPciChunkCreateInfo() - :iSize(0), iPciAddress(NULL) - { - } - - TPciChunkCreateInfo(TInt aSize, TUint& aPciAddress, TRequestStatus* aStatus=NULL) - :iSize(aSize), iPciAddress(&aPciAddress), iStatus(aStatus) - { - } - TInt iSize; - TUint* iPciAddress; - TRequestStatus* iStatus; - }; - -/** -Information about the PSL required by the -user side test -*/ -struct TPciTestInfo - { - TPciDevice iDevice; ///< Probe for this - - /** - Supplies the necessary information to test Read, Write, and - Modify for a word of PCI memory or configuration space - */ - struct TAddrSpaceTest - { - TAddrSpaceTest() - :iOffset(0), iExpectedValue(0), iReadOnlyMask(0) - {} - - TAddrSpaceTest(TUint aOffset, TUint aExpectedValue, TUint aReadOnlyMask) - :iOffset(aOffset), iExpectedValue(aExpectedValue), iReadOnlyMask(aReadOnlyMask) - {} - - /** - Returns a specified sub byte, or word from the whole dword - */ - inline TUint Expected(TInt aBitWidth, TInt aExtraOffset) const - { - //the right shift required to get field to bit 0 - const TInt shift = 8 *((aExtraOffset + iOffset) % 4); - - const TUint mask = 0xFFFFFFFF >> (32-aBitWidth); - return (iExpectedValue >> shift) & mask; - } - - const TUint iOffset; - const TUint iExpectedValue; ///< The initial value of word - const TUint iReadOnlyMask; ///< Mask of unwritable bits - //Future work, memory spaces should state a bar index - }; - - - TAddrSpaceTest iCfgSpaceRead; - TAddrSpaceTest iCfgSpaceWrite; - - TUint iMemSpaceIndex; ///< Memory space to select - TAddrSpaceTest iMemSpaceRead; - TAddrSpaceTest iMemSpaceWrite; - - TInt iNumberOfBars; ///< Number of simultaneous mappings into PCI space - }; - -class RPci; -class TAddrSpace; -/** -This class encapsulates all the various read/write/and modify commands -that can be carried out on a PCI memory space. The command is stored user -side, and then executed on kernel side when KRun() is called. -*/ -class TUserPciSpace - { -public: - TUserPciSpace() - :iPci(NULL), iOperation(EInvalid), iBitWidth(0), iOffset(0), - iWriteValue(0), iClearMask(0), iSetMask(0) - {} - TUserPciSpace(RPci& aPci); - - /** - Perform the encapsulated read/write/or modify - @note Only run on kernel side - */ - TUint KRun(TAddrSpace& aAddrSpace); - - /** - Clone method is required so that multiple threads may - have their own copy of a TUserPciSpace (without knowing - its runtime type) - */ - virtual TUserPciSpace* Clone() const = 0; - - TUint Read(TInt aBitWidth, TUint aOffset) - { - iOffset = aOffset; - iOperation = ERead; - iBitWidth = aBitWidth; - - return Call(); - } - - void Write(TInt aBitWidth, TUint aOffset, TUint aValue) - { - iOffset = aOffset; - iOperation = EWrite; - iBitWidth = aBitWidth; - - iWriteValue = aValue; - Call(); - } - - void Modify(TInt aBitWidth, TUint aOffset, TUint aClearMask, TUint aSetMask) - { - iOffset = aOffset; - iOperation = EModify; - iBitWidth = aBitWidth; - - iClearMask = aClearMask; - iSetMask = aSetMask; - Call(); - } - -protected: - /** - Makes a request to iPci and passes a copy of this object to - the kernel side. - */ - virtual TUint Call() =0; - - enum TOperation {EInvalid, ERead, EWrite, EModify}; - - /** - Pointer to a PCI device handle - */ - RPci* iPci; - - TOperation iOperation; //!< Type of access to perform - TInt iBitWidth; - - TUint iOffset; - TUint32 iWriteValue; - TUint32 iClearMask; - TUint32 iSetMask; - }; - -/** -Grants access to a PCI device's (identified -by aPci) config space from user side -*/ -class TUserConfigSpace : public TUserPciSpace - { -public: - TUserConfigSpace() - :TUserPciSpace() - {} - TUserConfigSpace(RPci& aPci); - - virtual TUserPciSpace* Clone() const; -private: - TUint Call(); - }; - -/** -Grants access to some region of a PCI -device's memory space. A PCI device(or function) -may have up to 8 distinct memory spaces -*/ -class TUserMemorySpace : public TUserPciSpace - { -public: - TUserMemorySpace() - :TUserPciSpace(), iBarIndex(-1) - {} - - TUserMemorySpace(RPci& aPci, TInt aBarIndex); - - virtual TUserPciSpace* Clone() const; - - inline TInt BarIndex() {return iBarIndex;} - -private: - TUint Call(); - - TInt iBarIndex; ///< Each PCI function may have up to 8 memory spaces - }; - -#endif //__TPCI_TEST_H diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/smpsoak/t_smpsoak.cpp --- a/kerneltest/e32test/smpsoak/t_smpsoak.cpp Thu Aug 12 12:51:24 2010 +0100 +++ b/kerneltest/e32test/smpsoak/t_smpsoak.cpp Tue Aug 24 14:42:58 2010 +0100 @@ -120,7 +120,7 @@ const TDesC* CSMPSoakThread::KDeviceTable[] = { &KDevices, &KDevLdd1, &KDevLdd1Name, &KDevLdd2, &KDevLdd2Name, &KDevLdd3, &KDevLdd3Name, - &KDevLdd4, &KDevLdd4Name, &KDevLdd5, &KDevLdd5Name, NULL + &KDevLdd4, &KDevLdd4Name, NULL }; //Constructor @@ -412,6 +412,7 @@ TInt CSMPSoakThread::DoSMPStressMemoryThread() { RTest test(_L("SMPStressMemoryThread")); + test.Start(_L("SMPStressMemoryThread")); TMemory *memoryTablePtr; TChunkInfo chunkTable[KNumChunks]; @@ -477,6 +478,8 @@ } User::After(gPeriod); } + test.End(); + test.Close(); return 0x00; } //Device Thread : will do device associated operation @@ -491,6 +494,7 @@ TInt CSMPSoakThread::DoSMPStressDeviceThread() { RTest test(_L("SMPStressDeviceThread")); + test.Start(_L("SMPStressDeviceThread")); RTimer timer; RFs session; @@ -539,7 +543,11 @@ RDevice device; TInt r = User::LoadLogicalDevice(*ptrDevices[i]); - test(r == KErrNone || r == KErrAlreadyExists); + if (r != KErrNone && r != KErrAlreadyExists) + { + test.Printf(_L("LDD %S not present\n"), ptrDevices[i]); + continue; + } test_KErrNone(device.Open(*ptrDevices[i+1])); @@ -562,6 +570,8 @@ } timer.Close(); PRINT((_L("SMPStressDeviceThread MyTimer.Cancel() called\n"))); + test.End(); + test.Close(); return 0x00; } //Spin Thread : will do thread sync @@ -576,6 +586,7 @@ TInt CSMPSoakThread::DoSMPStressSpinThread() { RTest test(_L("SMPStressSpinThread")); + test.Start(_L("SMPStressSpinThread")); TTime startTime; TTime endTime; @@ -596,6 +607,8 @@ break; User::After(gPeriod); } + test.End(); + test.Close(); return 0x00; } //Timer Thread : Timer operation and thread sync @@ -610,6 +623,7 @@ TInt CSMPSoakThread::DoSMPStressTimerThread() { RTest test(_L("SMPStressTimerThread")); + test.Start(_L("SMPStressTimerThread")); PRINT (_L("SMPStressTimerThread\n")); RTimer timer; @@ -630,6 +644,8 @@ } timer.Cancel(); PRINT((_L("SMPStressTimerThread MyTimer.Cancel() called\n"))); + test.End(); + test.Close(); return 0x00; } // CActive class to monitor KeyStrokes from User diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/e32test/smpsoak/t_smpsoak.h --- a/kerneltest/e32test/smpsoak/t_smpsoak.h Thu Aug 12 12:51:24 2010 +0100 +++ b/kerneltest/e32test/smpsoak/t_smpsoak.h Tue Aug 24 14:42:58 2010 +0100 @@ -136,8 +136,6 @@ _LIT(KDevLdd3Name,"Ethernet"); _LIT(KDevLdd4,"esoundsc.ldd"); _LIT(KDevLdd4Name,"SoundSc"); -_LIT(KDevLdd5,"eusbc.ldd"); -_LIT(KDevLdd5Name, "Usbc"); //Thread data for each thread struct TThreadData diff -r 647ab20fee2e -r 0a40b8675b23 kerneltest/f32test/rofs/rofs_tests.mrp --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/kerneltest/f32test/rofs/rofs_tests.mrp Tue Aug 24 14:42:58 2010 +0100 @@ -0,0 +1,1 @@ +# Dummy MRP to keep the package_defintion.xml file happy - f32test\rofs is still part of the base_f32test.mrp but is built separately. \ No newline at end of file diff -r 647ab20fee2e -r 0a40b8675b23 package_definition.xml --- a/package_definition.xml Thu Aug 12 12:51:24 2010 +0100 +++ b/package_definition.xml Tue Aug 24 14:42:58 2010 +0100 @@ -26,6 +26,12 @@ + + + + + +