|
1 ; Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies). |
|
2 ; All rights reserved. |
|
3 ; This component and the accompanying materials are made available |
|
4 ; under the terms of the License "Eclipse Public License v1.0" |
|
5 ; which accompanies this distribution, and is available |
|
6 ; at the URL "http://www.eclipse.org/legal/epl-v10.html". |
|
7 ; |
|
8 ; Initial Contributors: |
|
9 ; Nokia Corporation - initial contribution. |
|
10 ; |
|
11 ; Contributors: |
|
12 ; |
|
13 ; Description: |
|
14 ; |
|
15 ; |
|
16 |
|
17 AREA |d-rmdebug-bkpt$$Code|, CODE, READONLY, ALIGN=6 |
|
18 |
|
19 CODE32 |
|
20 |
|
21 ; ARM tests |
|
22 |
|
23 ; |
|
24 ; Non-PC modifying |
|
25 ; |
|
26 EXPORT RMDebug_StepTest_Non_PC_Modifying |
|
27 EXPORT RMDebug_StepTest_Non_PC_Modifying_OK |
|
28 |
|
29 RMDebug_StepTest_Non_PC_Modifying |
|
30 mov r0,r0 ; nop |
|
31 RMDebug_StepTest_Non_PC_Modifying_OK |
|
32 bx lr ; should return to normal execution of the test thread |
|
33 |
|
34 ; |
|
35 ; Branch |
|
36 ; |
|
37 EXPORT RMDebug_StepTest_Branch |
|
38 EXPORT RMDebug_StepTest_Branch_1 |
|
39 |
|
40 RMDebug_StepTest_Branch |
|
41 b RMDebug_StepTest_Branch_1 |
|
42 mov r0, #2 ; if the pc ends up here, we know its gone wrong |
|
43 RMDebug_StepTest_Branch_1 |
|
44 bx lr ; return |
|
45 |
|
46 ; |
|
47 ; Branch and Link |
|
48 ; |
|
49 EXPORT RMDebug_StepTest_Branch_And_Link |
|
50 EXPORT RMDebug_StepTest_Branch_And_Link_1 |
|
51 EXPORT RMDebug_StepTest_Branch_And_Link_2 |
|
52 |
|
53 RMDebug_StepTest_Branch_And_Link |
|
54 mov r0, lr ; preserve lr for the moment |
|
55 RMDebug_StepTest_Branch_And_Link_1 |
|
56 bl RMDebug_StepTest_Branch_And_Link_2 |
|
57 mov r1, #1 ; insert a gap in the instruction stream so we know we branched. |
|
58 RMDebug_StepTest_Branch_And_Link_2 |
|
59 mov lr, r0 ; restore lr |
|
60 bx lr ; should return to normal execution of the test thread |
|
61 |
|
62 ; |
|
63 ; MOV PC |
|
64 ; |
|
65 EXPORT RMDebug_StepTest_MOV_PC |
|
66 EXPORT RMDebug_StepTest_MOV_PC_1 |
|
67 EXPORT RMDebug_StepTest_MOV_PC_2 |
|
68 |
|
69 RMDebug_StepTest_MOV_PC |
|
70 mov r0, #4 |
|
71 RMDebug_StepTest_MOV_PC_1 |
|
72 add pc, pc, r0 ; should be a jump (bear in mind reading pc = current inst + 8bytes for arm) |
|
73 mov r0, #1 ; Simple instructions which allow us to test where the PC really is |
|
74 mov r0, #2 ; just by reading r0. |
|
75 RMDebug_StepTest_MOV_PC_2 |
|
76 mov r0, #3 ; |
|
77 mov r0, #4 ; |
|
78 bx lr ; should return to normal execution of the test thread |
|
79 |
|
80 ; |
|
81 ; LDR PC |
|
82 ; |
|
83 EXPORT RMDebug_StepTest_LDR_PC |
|
84 EXPORT RMDebug_StepTest_LDR_PC_1 |
|
85 |
|
86 RMDebug_StepTest_LDR_PC |
|
87 ldr pc, =RMDebug_StepTest_LDR_PC_1 |
|
88 mov r0, #1 ; separate the branch target so we can prove it works |
|
89 RMDebug_StepTest_LDR_PC_1 |
|
90 bx lr ; should return to normal execution of the test thread |
|
91 |
|
92 ; |
|
93 ; Stepping performance tests |
|
94 ; |
|
95 ; This counts down from 100000 to 0 |
|
96 ; This means that for all practical purposes |
|
97 ; we can single-step as much as we like |
|
98 ; in less than one second and have some likelyhood |
|
99 ; that we will not step too far from our loop |
|
100 |
|
101 EXPORT RMDebug_StepTest_Count |
|
102 EXPORT RMDebug_StepTest_Count_1 |
|
103 EXPORT RMDebug_StepTest_Count_2 |
|
104 |
|
105 RMDebug_StepTest_Count |
|
106 ldr r2, =100000 |
|
107 RMDebug_StepTest_Count_1 |
|
108 subs r2, r2, #1 |
|
109 RMDebug_StepTest_Count_2 |
|
110 bne RMDebug_StepTest_Count_1 |
|
111 bx lr |
|
112 |
|
113 ; |
|
114 ; ARM multiple-step ( 5 steps ) |
|
115 ; |
|
116 EXPORT RMDebug_StepTest_ARM_Step_Multiple |
|
117 EXPORT RMDebug_StepTest_ARM_Step_Multiple_1 |
|
118 |
|
119 RMDebug_StepTest_ARM_Step_Multiple |
|
120 mov r0,r0 ; nop |
|
121 mov r0,r0 ; nop |
|
122 mov r0,r0 ; nop |
|
123 mov r0,r0 ; nop |
|
124 mov r0,r0 ; nop |
|
125 RMDebug_StepTest_ARM_Step_Multiple_1 |
|
126 bx lr |
|
127 |
|
128 END |
|
129 |
|
130 ; End of file - d_rmdebug_step_test_armv4.s |