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1 /* |
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2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 |
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18 |
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19 #include <platform.h> |
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20 |
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21 #include "GeneralsDriver.h" |
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22 #include <kern_priv.h> //temporary |
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23 |
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24 #ifdef __SMP__ |
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25 #include <e32cia.h> |
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26 #include <arm.h> |
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27 #include <arm_gic.h> |
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28 #include <arm_tmr.h> |
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29 #endif |
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30 |
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31 #if defined(__GCC32__) |
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32 // CIA symbol macros for Gcc98r2 |
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33 #define CSM__ZN5NKern14CurrentContextEv " CurrentContext__5NKern" |
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34 #elif defined(__ARMCC__) |
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35 // CIA symbol macros for RVCT |
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36 #define CSM__ZN5NKern14CurrentContextEv " __cpp(NKern::CurrentContext)" |
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37 #else |
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38 // CIA symbol macros for EABI assemblers |
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39 #define CSM__ZN5NKern14CurrentContextEv " _ZN5NKern14CurrentContextEv" |
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40 #endif |
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41 |
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42 #ifdef __WINS__ |
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43 __NAKED__ TUint* IntStackPtr() |
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44 { |
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45 return 0; |
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46 } |
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47 |
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48 __NAKED__ TUint32 SPSR() |
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49 { |
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50 return 0; |
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51 } |
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52 __NAKED__ void UsrModLr(TUint32* a) |
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53 { |
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54 *a = 0; |
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55 } |
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56 #else |
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57 |
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58 __NAKED__ TUint* IntStackPtr() |
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59 { |
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60 #ifdef __SMP__ |
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61 asm("stmfd sp!, {r0-r12,lr} "); |
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62 #endif |
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63 asm("mrs r1, cpsr "); // copy current program status register (cpsr) to R1 |
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64 asm("bic r3, r1, #0x1f "); // compare to 0x1f, i.e. make sure that spsr is available? |
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65 #ifdef __SMP__ |
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66 __ASM_CLI_MODE(MODE_IRQ); // disable all interrupts and set to irq mode (we are in NTimer interrupt) |
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67 #else |
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68 asm("orr r3, r3, #0xd2 "); // mode_irq, all interrupts off |
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69 asm("msr cpsr, r3 "); // write result on R3 back to cpsr, irqs disabled |
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70 #endif |
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71 asm("mov r0, sp "); // read stack pointer to R0, mode r0=sp_irq |
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72 asm("msr cpsr, r1 "); // restore interrupts |
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73 #ifdef __SMP__ |
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74 asm("ldmfd sp!, {r0-r12,pc} "); |
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75 #endif |
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76 __JUMP(,lr); |
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77 } |
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78 |
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79 __NAKED__ TUint32 SPSR() |
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80 { |
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81 asm("mrs r0, spsr "); |
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82 __JUMP(,lr); |
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83 } |
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84 __NAKED__ void UsrModLr(TUint32*) |
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85 { |
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86 // r0 = address to store |
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87 asm ("stmia r0,{lr}^"); |
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88 __JUMP(,lr); |
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89 } |
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90 |
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91 #endif |