1 ; Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies). |
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2 ; All rights reserved. |
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3 ; This component and the accompanying materials are made available |
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4 ; under the terms of the License "Eclipse Public License v1.0" |
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5 ; which accompanies this distribution, and is available |
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6 ; at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 ; |
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8 ; Initial Contributors: |
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9 ; Nokia Corporation - initial contribution. |
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10 ; |
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11 ; Contributors: |
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12 ; |
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13 ; Description: |
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14 ; |
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15 ; |
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16 |
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17 |
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18 AREA |d-rmdebug-step$$Code|, CODE, READONLY, ALIGN=6 |
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19 |
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20 CODE32 |
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21 |
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22 ; ARM tests |
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23 |
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24 ; |
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25 ; Non-PC modifying |
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26 ; |
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27 EXPORT RMDebug_StepTest_Non_PC_Modifying |
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28 EXPORT RMDebug_StepTest_Non_PC_Modifying_OK |
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29 |
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30 RMDebug_StepTest_Non_PC_Modifying |
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31 mov r0,r0 ; nop |
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32 RMDebug_StepTest_Non_PC_Modifying_OK |
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33 bx lr ; should return to normal execution of the test thread |
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34 |
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35 ; |
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36 ; Branch |
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37 ; |
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38 EXPORT RMDebug_StepTest_Branch |
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39 EXPORT RMDebug_StepTest_Branch_1 |
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40 |
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41 RMDebug_StepTest_Branch |
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42 b RMDebug_StepTest_Branch_1 |
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43 mov r0, #2 ; if the pc ends up here, we know its gone wrong |
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44 RMDebug_StepTest_Branch_1 |
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45 bx lr ; return |
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46 |
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47 ; |
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48 ; Branch and Link |
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49 ; |
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50 EXPORT RMDebug_StepTest_Branch_And_Link |
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51 EXPORT RMDebug_StepTest_Branch_And_Link_1 |
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52 EXPORT RMDebug_StepTest_Branch_And_Link_2 |
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53 |
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54 RMDebug_StepTest_Branch_And_Link |
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55 mov r0, lr ; preserve lr for the moment |
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56 RMDebug_StepTest_Branch_And_Link_1 |
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57 bl RMDebug_StepTest_Branch_And_Link_2 |
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58 mov r1, #1 ; insert a gap in the instruction stream so we know we branched. |
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59 RMDebug_StepTest_Branch_And_Link_2 |
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60 mov lr, r0 ; restore lr |
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61 bx lr ; should return to normal execution of the test thread |
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62 |
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63 ; |
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64 ; MOV PC |
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65 ; |
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66 EXPORT RMDebug_StepTest_MOV_PC |
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67 EXPORT RMDebug_StepTest_MOV_PC_1 |
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68 EXPORT RMDebug_StepTest_MOV_PC_2 |
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69 |
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70 RMDebug_StepTest_MOV_PC |
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71 mov r0, #4 |
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72 RMDebug_StepTest_MOV_PC_1 |
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73 add pc, pc, r0 ; should be a jump (bear in mind reading pc = current inst + 8bytes for arm) |
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74 mov r0, #1 ; Simple instructions which allow us to test where the PC really is |
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75 mov r0, #2 ; just by reading r0. |
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76 RMDebug_StepTest_MOV_PC_2 |
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77 mov r0, #3 ; |
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78 mov r0, #4 ; |
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79 bx lr ; should return to normal execution of the test thread |
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80 |
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81 ; |
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82 ; LDR PC |
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83 ; |
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84 EXPORT RMDebug_StepTest_LDR_PC |
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85 EXPORT RMDebug_StepTest_LDR_PC_1 |
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86 |
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87 RMDebug_StepTest_LDR_PC |
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88 ldr pc, =RMDebug_StepTest_LDR_PC_1 |
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89 mov r0, #1 ; separate the branch target so we can prove it works |
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90 RMDebug_StepTest_LDR_PC_1 |
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91 bx lr ; should return to normal execution of the test thread |
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92 |
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93 ; |
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94 ; ARM -> Thumb -> ARM interworking test |
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95 ; |
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96 ; Note: We always start and finish this test |
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97 ; in ARM mode. |
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98 EXPORT RMDebug_StepTest_Interwork |
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99 EXPORT RMDebug_StepTest_Interwork_1 |
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100 EXPORT RMDebug_StepTest_Interwork_2 |
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101 EXPORT RMDebug_StepTest_Interwork_3 |
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102 RMDebug_StepTest_Interwork |
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103 mov r0, lr ; preserve lr |
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104 RMDebug_StepTest_Interwork_1 |
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105 blx RMDebug_StepTest_Interwork_2 |
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106 |
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107 CODE16 |
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108 RMDebug_StepTest_Interwork_2 |
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109 blx RMDebug_StepTest_Interwork_3 |
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110 |
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111 CODE32 |
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112 |
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113 RMDebug_StepTest_Interwork_3 |
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114 bx r0 |
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115 |
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116 ; |
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117 ; Stepping performance tests |
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118 ; |
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119 ; This counts down from 100000 to 0 |
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120 ; This means that for all practical purposes |
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121 ; we can single-step as much as we like |
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122 ; in less than one second and have some likelyhood |
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123 ; that we will not step too far from our loop |
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124 |
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125 EXPORT RMDebug_StepTest_Count |
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126 EXPORT RMDebug_StepTest_Count_1 |
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127 EXPORT RMDebug_StepTest_Count_2 |
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128 |
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129 RMDebug_StepTest_Count |
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130 ldr r2, =100000 |
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131 RMDebug_StepTest_Count_1 |
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132 subs r2, r2, #1 |
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133 RMDebug_StepTest_Count_2 |
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134 bne RMDebug_StepTest_Count_1 |
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135 bx lr |
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136 |
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137 ; Thumb tests |
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138 |
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139 ; Thumb non-pc modifying |
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140 ; |
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141 ; |
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142 RMDebug_StepTest_Thumb_Non_PC_Modifying |
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143 mov r0, lr ; preserve lr |
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144 blx RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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145 bx r0 |
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146 |
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147 ; |
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148 ; Thumb Branch |
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149 ; |
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150 RMDebug_StepTest_Thumb_Branch |
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151 mov r0, lr ; preserve lr |
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152 blx RMDebug_StepTest_Thumb_Branch_1 |
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153 bx r0 |
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154 |
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155 ; |
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156 ; Thumb Branch and link |
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157 ; |
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158 RMDebug_StepTest_Thumb_Branch_And_Link |
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159 mov r0, lr ; preserve lr |
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160 blx RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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161 bx r0 |
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162 |
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163 ; |
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164 ; Thumb Back Branch and link |
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165 ; |
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166 RMDebug_StepTest_Thumb_Back_Branch_And_Link |
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167 mov r0, lr ; preserve lr |
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168 blx RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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169 bx r0 |
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170 |
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171 ; |
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172 ; Thumb ADD PC,PC, #0 |
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173 ; |
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174 RMDebug_StepTest_Thumb_AddPC |
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175 mov r0, lr ; preserve lr |
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176 blx RMDebug_StepTest_Thumb_AddPC_1 |
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177 bx r0 |
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178 |
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179 CODE16 |
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180 |
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181 ; Thumb tests |
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182 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying |
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183 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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184 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_2 |
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185 |
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186 EXPORT RMDebug_StepTest_Thumb_Branch |
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187 EXPORT RMDebug_StepTest_Thumb_Branch_1 |
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188 EXPORT RMDebug_StepTest_Thumb_Branch_2 |
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189 |
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190 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link |
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191 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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192 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_2 |
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193 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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194 |
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195 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link |
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196 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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197 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_2 |
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198 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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199 |
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200 RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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201 mov r0, r0 ; nop |
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202 RMDebug_StepTest_Thumb_Non_PC_Modifying_2 |
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203 bx lr |
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204 |
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205 RMDebug_StepTest_Thumb_Branch_1 |
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206 b RMDebug_StepTest_Thumb_Branch_2 |
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207 mov r0, r0 |
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208 RMDebug_StepTest_Thumb_Branch_2 |
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209 bx lr |
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210 |
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211 RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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212 mov r1, lr |
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213 RMDebug_StepTest_Thumb_Branch_And_Link_2 |
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214 bl RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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215 mov r0, r0 |
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216 RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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217 bx r1 |
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218 |
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219 RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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220 bx r1 |
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221 |
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222 RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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223 mov r1, lr |
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224 RMDebug_StepTest_Thumb_Back_Branch_And_Link_2 |
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225 bl RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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226 bx r1 |
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227 |
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228 ; |
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229 ; ADD PC |
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230 ; |
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231 EXPORT RMDebug_StepTest_Thumb_AddPC |
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232 EXPORT RMDebug_StepTest_Thumb_AddPC_1 |
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233 EXPORT RMDebug_StepTest_Thumb_AddPC_2 |
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234 EXPORT RMDebug_StepTest_Thumb_AddPC_3 |
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235 |
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236 RMDebug_StepTest_Thumb_AddPC_1 |
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237 mov r1, lr |
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238 mov r2, #4 |
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239 RMDebug_StepTest_Thumb_AddPC_2 |
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240 add pc, pc, r2 ; should arrive at RMDebug_StepTest_Thumb_AddPC_3 |
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241 mov r0, r0 |
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242 mov r0, r0 |
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243 mov r0, r0 |
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244 RMDebug_StepTest_Thumb_AddPC_3 |
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245 bx r1 |
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246 |
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247 ALIGN 4 |
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248 |
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249 CODE32 |
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250 |
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251 ; |
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252 ; ARM multiple-step ( 5 steps ) |
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253 ; |
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254 EXPORT RMDebug_StepTest_ARM_Step_Multiple |
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255 EXPORT RMDebug_StepTest_ARM_Step_Multiple_1 |
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256 |
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257 RMDebug_StepTest_ARM_Step_Multiple |
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258 mov r0,r0 ; nop |
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259 mov r0,r0 ; nop |
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260 mov r0,r0 ; nop |
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261 mov r0,r0 ; nop |
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262 mov r0,r0 ; nop |
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263 RMDebug_StepTest_ARM_Step_Multiple_1 |
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264 bx lr |
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265 |
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266 END |
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267 |
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268 ; End of file - d_rmdebug_step_test.s |
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