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1 /* |
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2 * Copyright (c) 2010 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 |
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18 // Control transfer state machine. |
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19 // Generally used for Endpoint zero. |
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20 |
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21 #ifndef CONTROLTRANSFER_SM_H |
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22 #define CONTROLTRANSFER_SM_H |
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23 |
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24 #include <e32def.h> // General types definition |
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25 #include <usb/usb_peripheral_shai.h> // Peripheral SHAI Header |
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26 #include <usb/usb.h> // Usb const |
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27 |
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28 #include <usb/usbcontrolxferif.h> |
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29 |
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30 // Forward class declaration |
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31 class TControlStageSm; |
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32 |
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33 // Refer usb setup packet definition |
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34 const TUint8 KUSB_SETUPKT_DATA_DIR_MASK = 0x80; |
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35 const TUint8 KUSB_SETUPKT_REQ_TYPE_VENDOR_MASK = 0x40; |
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36 const TUint8 KUSB_SETUPKT_REQ_TYPE_CLASS_MASK = 0x20; |
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37 const TUint8 KUSB_SETUPKT_REQ_TYPE_STANDARD_MASK = 0x60; |
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38 |
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39 /** |
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40 * TUsbPeripheralSetup |
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41 * @brief A USB Setup packet's structure. |
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42 * @see ProcessSetConfiguration(const TUsbPeripheralSetup&) |
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43 * |
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44 */ |
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45 struct TUsbcSetup |
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46 { |
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47 /** bmRequestType */ |
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48 TUint8 iRequestType; |
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49 |
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50 /** bRequest */ |
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51 TUint8 iRequest; |
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52 |
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53 /** wValue */ |
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54 TUint16 iValue; |
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55 |
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56 /** wIndex */ |
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57 TUint16 iIndex; |
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58 |
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59 /** wLength */ |
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60 TUint16 iLength; |
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61 }; |
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62 |
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63 /** Valid request catogary that a client(PIL or App) can request |
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64 * via this state machine |
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65 */ |
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66 enum TControlTransferRequest |
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67 { |
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68 // Write . Data IN . From Device to Host |
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69 TControlTransferRequestWrite, |
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70 |
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71 // Read . Data OUT . From Host to Device |
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72 TControlTransferRequestRead, |
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73 |
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74 // Zero bytes status, Write . Status IN |
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75 // Status from Device to Host |
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76 TControlTransferRequestSendStatus |
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77 |
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78 // Status from Host to device will be ignored |
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79 }; |
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80 |
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81 // Data dir as spec defined |
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82 enum TUsbDataDir |
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83 { |
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84 EUsbDataDir_ToDevice, |
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85 EUsbDataDir_ToHost |
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86 }; |
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87 |
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88 // Request catogary from Host to device as spec defined |
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89 enum TUsbRequestType |
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90 { |
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91 EUsbStandardRequest, |
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92 EUsbClassRequest, |
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93 EUsbVendorRequest |
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94 }; |
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95 |
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96 // Target of the request(from host to device) |
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97 enum TUsbRequestTarget |
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98 { |
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99 EUsbRequestTargetToDevice, |
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100 EUsbRequestTargetToInterface, |
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101 EUsbRequestTargetToEndpoint, |
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102 EUsbRequestTargetToElement |
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103 }; |
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104 |
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105 typedef TUint8 TUsbRequest; |
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106 |
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107 /** Helper function which can parse a setup packet |
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108 * and explain it as what's spec required |
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109 */ |
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110 NONSHARABLE_CLASS(TSetupPkgParser) |
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111 { |
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112 public: |
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113 TSetupPkgParser(); |
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114 // Set the setup buffer |
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115 // this class does't hold this buffer, it do a bitwise copy |
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116 // assumed length is 8 bytes |
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117 static void Set(const TUint8* aSetupBuf); |
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118 |
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119 // Get what the next stage following the received setup |
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120 // packet |
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121 static UsbShai::TControlStage NextStage(); |
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122 |
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123 static TUsbDataDir DataDirection(); |
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124 |
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125 static TBool IsVendorRequest(); |
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126 static TBool IsClassRequest(); |
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127 static TBool IsStandardRequest(); |
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128 |
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129 static TUsbRequest Request(); |
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130 static TUint16 Value(); |
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131 static TUint16 Index(); |
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132 |
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133 // data length if there is a data packet(in/out) follows |
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134 // data length will be modified during a transfer |
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135 static TUint16 DataLength(); |
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136 |
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137 static TUsbcSetup& SetupPacket(); |
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138 |
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139 private: |
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140 static TUsbcSetup iSetupPkt; |
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141 }; |
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142 |
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143 |
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144 // State machine manager |
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145 // |
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146 NONSHARABLE_CLASS(DControlTransferManager) |
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147 { |
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148 friend class TControlStageSm; |
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149 |
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150 public: |
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151 DControlTransferManager(MControlTransferIf& aPktProcessor); |
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152 |
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153 // PSL will complete to PIL directly, in our cases, PIL will delegate to us via this interface |
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154 void Ep0RequestComplete(TUint8* aBuf, TInt aSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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155 |
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156 // Add a new state processor |
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157 void AddState(UsbShai::TControlStage aStage, TControlStageSm& aStageSm); |
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158 |
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159 public: |
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160 // Helper inline function |
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161 MControlTransferIf& CtrTransferIf(); |
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162 TSetupPkgParser& PktParser(); |
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163 |
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164 public: |
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165 // EP0 Access interface |
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166 // They are the same as it shows in SHAI header |
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167 // so, PIL code can delegate those task to us, we will perform a series of checking |
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168 // depending on which state we are in, if each condition meet, we will callback via |
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169 // interface MControlTransferIf to perform the real work. |
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170 TInt SetupEndpointZeroRead(); |
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171 TInt SetupEndpointZeroWrite(const TUint8* aBuffer, TInt aLength, TBool aZlpReqd=EFalse); |
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172 TInt SendEp0ZeroByteStatusPacket(); |
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173 TInt StallEndpoint(TInt aRealEndpoint); |
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174 void Ep0SetupPacketProceed(); |
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175 void Ep0DataPacketProceed(); |
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176 |
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177 // Reset state machine. |
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178 void Reset(); |
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179 |
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180 // Data received for data out stage |
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181 void DataReceived(TUint16 aCount); |
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182 TBool IsMoreBytesNeeded(); |
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183 |
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184 private: |
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185 // State machines for each stage |
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186 TControlStageSm* iState[UsbShai::EControlTransferStageMax]; |
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187 // Current stage |
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188 UsbShai::TControlStage iCurrentStage; |
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189 TSetupPkgParser iPacketParser; |
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190 |
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191 MControlTransferIf& iCtrTransferIf; |
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192 |
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193 TBool iReadPending; |
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194 |
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195 TUint16 iDataTransfered; |
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196 }; |
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197 |
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198 // Base class of state machine |
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199 NONSHARABLE_CLASS(TControlStageSm) |
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200 { |
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201 public: |
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202 |
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203 /** PSL --Ep0RequestComplete()--> PIL --Ep0RequestComplete()---------> |
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204 * | |
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205 * (ProcessXXX)PIL <-- RequestComplete()<--DControlTransferManager <- |
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206 * |
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207 * @param aPktSize the size of the packet recieved |
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208 * aError error code if something wrong |
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209 * aPktType one of the packet type specified in UsbShai::TControlPacketType |
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210 * |
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211 * @return ETrue if the packet need to be further processed |
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212 * EFalse if the packet was consumed |
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213 */ |
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214 virtual TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType) = 0; |
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215 |
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216 /** Query whether a kind of operation is allowed in specified state |
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217 * |
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218 * @param aRequest the request to be queried |
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219 * |
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220 * @return ETrue is the operation is allowed |
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221 * EFalse if not |
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222 */ |
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223 virtual TBool IsRequstAllowed(TControlTransferRequest aRequest) = 0; |
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224 |
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225 TControlStageSm(DControlTransferManager& aTransferMgr); |
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226 |
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227 protected: |
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228 // change state of SM in iTransferMgr |
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229 void ChangeToStage(UsbShai::TControlStage aToStage); |
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230 |
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231 // Clear ReadPending in ControlTransferMgr so that it won't |
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232 // block any further read operation |
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233 void ClearPendingRead(); |
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234 |
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235 protected: |
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236 DControlTransferManager& iTransferMgr; |
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237 }; |
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238 |
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239 // Concreate state class |
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240 // State of "Setup", used to wait for a setup packet |
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241 // it will ignore all non-setup-packet |
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242 NONSHARABLE_CLASS(DSetupStageSm) : public TControlStageSm |
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243 { |
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244 public: |
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245 DSetupStageSm(DControlTransferManager& aTransferMgr); |
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246 |
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247 TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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248 TBool IsRequstAllowed(TControlTransferRequest aRequest); |
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249 }; |
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250 |
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251 // State used to wait for user to write something to host |
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252 // The write is supposed to be done in one shot |
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253 NONSHARABLE_CLASS(DDataInStageSm) : public TControlStageSm |
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254 { |
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255 public: |
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256 DDataInStageSm(DControlTransferManager& aTransferMgr); |
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257 |
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258 TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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259 TBool IsRequstAllowed(TControlTransferRequest aRequest); |
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260 }; |
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261 |
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262 // State used to wait some data from Host |
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263 NONSHARABLE_CLASS(DDataOutStageSm) : public TControlStageSm |
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264 { |
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265 public: |
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266 DDataOutStageSm(DControlTransferManager& aTransferMgr); |
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267 |
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268 TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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269 TBool IsRequstAllowed(TControlTransferRequest aRequest); |
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270 }; |
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271 |
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272 NONSHARABLE_CLASS(DStatusInStageSm) : public TControlStageSm |
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273 { |
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274 public: |
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275 DStatusInStageSm(DControlTransferManager& aTransferMgr); |
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276 |
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277 TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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278 TBool IsRequstAllowed(TControlTransferRequest aRequest); |
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279 }; |
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280 |
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281 NONSHARABLE_CLASS(DStatusOutStageSm) : public TControlStageSm |
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282 { |
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283 public: |
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284 DStatusOutStageSm(DControlTransferManager& aTransferMgr); |
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285 |
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286 TBool RequestComplete(TInt aPktSize, TInt aError, UsbShai::TControlPacketType aPktType); |
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287 TBool IsRequstAllowed(TControlTransferRequest aRequest); |
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288 }; |
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289 |
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290 #include "controltransfersm.inl" |
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291 |
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292 #endif //CONTROLTRANSFER_SM_H |