sysperfana/perfinvestigator/com.nokia.carbide.cpp.pi.doc.user/html/reference/methods/saved_pgm_status_reg.htm
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6 <title>Saved Program Status Register</title> |
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10 <body> |
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11 <h3>Saved Program Status Register</h3> |
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12 <p> In ARM architecture, the saved |
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13 program status register (SPSR) is a banked register in all of the |
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14 exception modes (thus not in user mode or system mode). When |
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15 switching the processor mode from any other mode to any of the |
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16 exception modes, the value within the CPSR is stored to the SPSR |
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17 so that it can be recovered after the exception (such as an |
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18 interrupt) has been processed. When having performance measurement |
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19 instrumentation within an interrupt, it can be useful to |
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20 investigate the value within the SPSR in order to find out the |
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21 mode of the processor before the interrupt.</p> |
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22 <div id="footer">Copyright © 2009 Nokia Corporation and/or its subsidiary(-ies). All rights reserved. <br>License: <a href="http://www.eclipse.org/legal/epl-v10.html">http://www.eclipse.org/legal/epl-v10.html</a></div> |
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