PecLegend_6=Per A
PecLegend_7=Per B
PecLegend_8=Per C
PecLegendLabelProvider_4=%,.2f
PecLegendLabelProvider_5=%,.2f
PecLegendLabelProvider_6=%,.2f
PecSample_0=PEC [Time=%d ms, values=%s]
PecTrace_0=[MIPS (Million Instructions Per Second)] / [1 sampled ms]
PecTraceParser_0=[Instruction cache miss to a cachable location requires fetch from external memory] / [1 sampled ms]
PecTraceParser_1=[Stall because instruction buffer cannot deliver an instruction] / [1 sampled ms]
PecTraceParser_10=[Data cache miss] / [1 sampled ms]
PecTraceParser_11=[Data cache Write-Back] / [1 sampled ms]
PecTraceParser_12=[Software changed the PC] / [1 sampled ms]
PecTraceParser_13=[Main TLB miss] / [1 sampled ms]
PecTraceParser_14=[External memory request (Cache Refill, Noncachable, Write-Through, Write-Back)] / [1 sampled ms]
PecTraceParser_15=[Stall because of Load Store Unit request queue being full] / [1 sampled ms]
PecTraceParser_16=[Write Buffer was drained because of a Drain Write Buffer command or Strongly Ordered operation] / [1 sampled ms]
PecTraceParser_17=[ETMEXTOUT[0] signal was asserted for a cycle] / [1 sampled ms]
PecTraceParser_18=[ETMEXTOUT[1] signal was asserted for a cycle] / [1 sampled ms]
PecTraceParser_19=[Both ETMEXTOUT[0] and ETMEXTOUT[1] signals assigned] / [1 sampled ms]
PecTraceParser_2=[Stall because of a data dependency] / [1 sampled ms]
PecTraceParser_20=[Precise CPU Cycles] / [1 sampled ms]
PecTraceParser_21=[CPU Cycles (64 cycle accuracy)] / [1 sampled ms]
PecTraceParser_22=Value %d not identified as Performance counter event\!
PecTraceParser_23=[CPU clock rate (MHz)]
PecTraceParser_3=[Instruction MicroTLB miss] / [1 sampled ms]
PecTraceParser_4=[Data MicroTLB miss] / [1 sampled ms]
PecTraceParser_5=[Branch instruction executed] / [1 sampled ms]
PecTraceParser_6=[Branch mispredicted] / [1 sampled ms]
PecTraceParser_7=[Instruction executed] / [1 sampled ms]
PecTraceParser_8=[Data cache access for cachable locations] / [1 sampled ms]
PecTraceParser_9=[Data cache access for all locations] / [1 sampled ms]