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1 /* |
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2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 using System; |
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18 using System.Collections.Generic; |
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19 using System.Text; |
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20 using System.IO; |
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21 using SymbianUtils.BasicTypes; |
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22 using SymbianStackAlgorithmAccurate.CPU; |
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23 using SymbianStackAlgorithmAccurate.Prologue; |
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24 using SymbianStructuresLib.Arm; |
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25 using SymbianStructuresLib.Arm.Instructions; |
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26 using SymbianStructuresLib.Arm.Registers; |
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27 using SymbianStructuresLib.Arm.Registers.VFP; |
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28 using SymbianInstructionLib.Arm.Instructions.Common; |
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29 using SymbianInstructionLib.Arm.Instructions.Arm; |
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30 using SymbianInstructionLib.Arm.Instructions.Arm.DataTransfer; |
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31 using SymbianInstructionLib.Arm.Instructions.Thumb; |
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32 using SymbianInstructionLib.Arm.Instructions.Thumb.DataTransfer; |
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33 |
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34 namespace SymbianStackAlgorithmAccurate.Instructions.Types |
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35 { |
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36 internal class AccInstDataTransfer : AccInstruction |
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37 { |
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38 #region Constructors |
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39 public AccInstDataTransfer( IArmInstruction aInstruction ) |
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40 : base( aInstruction ) |
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41 { |
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42 System.Diagnostics.Debug.Assert( base.Instruction.AIGroup == TArmInstructionGroup.EGroupDataTransfer ); |
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43 } |
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44 #endregion |
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45 |
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46 #region API |
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47 internal override void Process( ArmPrologueHelper aProlog ) |
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48 { |
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49 IArmInstruction instruction = base.Instruction; |
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50 |
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51 // Only unconditional instructions are handled |
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52 if ( instruction.AIConditionCode == TArmInstructionCondition.AL ) |
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53 { |
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54 if ( instruction is ArmInstruction ) |
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55 { |
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56 ArmInstruction armInst = (ArmInstruction) instruction; |
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57 // |
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58 if ( armInst is Arm_LoadOrStoreMultiple ) |
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59 { |
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60 Arm_LoadOrStoreMultiple lsmInstruction = (Arm_LoadOrStoreMultiple) instruction; |
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61 |
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62 // We're looking for store operations |
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63 if ( lsmInstruction.DataTransferType == TArmDataTransferType.EStore ) |
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64 { |
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65 // We're looking for LSM's that involve SP. |
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66 if ( lsmInstruction.BaseRegister == TArmRegisterType.EArmReg_SP ) |
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67 { |
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68 if ( lsmInstruction is Arm_LoadOrStoreMultiple_GP ) |
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69 { |
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70 Arm_LoadOrStoreMultiple_GP gpLsmInstruction = (Arm_LoadOrStoreMultiple_GP) lsmInstruction; |
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71 HandleDTOperation( aProlog, gpLsmInstruction.Registers ); |
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72 } |
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73 else if ( lsmInstruction is Arm_LoadOrStoreMultiple_VFP ) |
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74 { |
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75 Arm_LoadOrStoreMultiple_VFP vfpLsmInstruction = (Arm_LoadOrStoreMultiple_VFP) lsmInstruction; |
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76 HandleDTOperation( aProlog, vfpLsmInstruction.Registers ); |
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77 } |
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78 } |
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79 } |
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80 } |
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81 } |
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82 else if ( instruction is ThumbInstruction ) |
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83 { |
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84 ThumbInstruction thumbInst = (ThumbInstruction) instruction; |
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85 // |
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86 if ( thumbInst is Thumb_LoadOrStoreMultiple ) |
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87 { |
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88 // Special case that loads or stores multiple registers |
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89 Thumb_LoadOrStoreMultiple lsmThumb = (Thumb_LoadOrStoreMultiple) thumbInst; |
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90 if ( lsmThumb.DataTransferType == TArmDataTransferType.EStore && lsmThumb.Rd == TArmRegisterType.EArmReg_SP ) |
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91 { |
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92 HandleDTOperation( aProlog, lsmThumb.Registers ); |
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93 } |
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94 else |
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95 { |
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96 } |
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97 } |
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98 else if ( thumbInst is Thumb_LDR_RelativeToPC ) |
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99 { |
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100 // When the Prologue needs to establish a working stack slurry, then often |
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101 // the scratch registers are used to build up a large subtraction from SP. |
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102 HandleDTLoad( aProlog, thumbInst as Thumb_LDR_RelativeToPC ); |
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103 } |
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104 } |
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105 else |
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106 { |
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107 throw new NotSupportedException( "Instruction type not supported" ); |
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108 } |
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109 } |
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110 } |
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111 #endregion |
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112 |
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113 #region Properties |
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114 #endregion |
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115 |
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116 #region Internal methods |
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117 private void HandleDTOperation( ArmPrologueHelper aProlog, TArmRegisterType[] aRegisterList ) |
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118 { |
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119 int count = aRegisterList.Length; |
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120 for ( int i = 0; i < count; i++ ) |
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121 { |
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122 TArmRegisterType register = aRegisterList[ i ]; |
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123 int push = aProlog.IncrementNumberOfWordsPushedOnStack( register ); |
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124 aProlog.OffsetValues[ register ].Value = (uint) push; |
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125 } |
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126 } |
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127 |
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128 private void HandleDTOperation( ArmPrologueHelper aProlog, TArmRegisterTypeVFP[] aRegisterList ) |
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129 { |
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130 int numberOfRegisters = aRegisterList.Length; |
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131 if ( numberOfRegisters > 0 ) |
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132 { |
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133 // The size of the register varies... but the list will be consistent. |
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134 TArmRegisterTypeVFP first = aRegisterList[ 0 ]; |
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135 // |
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136 int numberOfBitsPerRegister = ArmVectorFloatingPointUtils.RegisterSizeInBits( first ); |
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137 int numberOfBytesPerRegister = numberOfBitsPerRegister / 8; |
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138 int totalNumberOfBytes = numberOfBytesPerRegister * numberOfRegisters; |
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139 int numberOfWords = totalNumberOfBytes / 4; |
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140 // |
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141 aProlog.AddToNumberOfWordsPushedOnStack( numberOfWords ); |
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142 } |
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143 } |
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144 |
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145 private void HandleDTLoad( ArmPrologueHelper aProlog, Thumb_LoadOrStore_Immediate8 aInstruction ) |
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146 { |
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147 // E.g: |
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148 // |
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149 // LDR R0, [PC, #40] ; Load R0 from PC + 0x40 (= address of the LDR instruction + 8 + 0x40) |
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150 // |
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151 TArmRegisterType reg = aInstruction.Rd; |
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152 uint immed = aInstruction.Immediate * 4u; |
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153 |
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154 // PC = Is the program counter. Its value is used to calculate the memory |
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155 // address. Bit 1 of the PC value is forced to zero for the purpose of |
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156 // this calculation, so the address is always word-aligned. |
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157 uint pcAddress = aProlog.ProloguePC & 0xFFFFFFFC; |
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158 pcAddress = pcAddress + immed; |
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159 |
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160 // Read code value at specified address |
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161 uint value = aProlog.CodeHelper.LoadData( pcAddress ); |
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162 |
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163 // Set the register |
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164 aProlog.CPU[ reg ].Value = value; |
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165 } |
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166 #endregion |
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167 |
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168 #region Data members |
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169 #endregion |
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170 } |
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171 } |
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172 |