author | Graeme Price <GRAEME.PRICE@NOKIA.COM> |
Fri, 15 Oct 2010 14:32:18 +0100 | |
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<?xml version="1.0" encoding="utf-8"?> |
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<!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. --> |
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<!-- This component and the accompanying materials are made available under the terms of the License |
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"Eclipse Public License v1.0" which accompanies this distribution, |
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and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". --> |
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<!-- Initial Contributors: |
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Nokia Corporation - initial contribution. |
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Contributors: |
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--> |
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<!DOCTYPE concept |
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PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd"> |
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<concept id="GUID-654A788A-526A-4C3F-838C-05B09F0D5445" xml:lang="en"><title>Interrupt Technology Guide</title><shortdesc>Describes the concepts of the Interrupts platform service.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody> |
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<p>The Interrupt platform service provides an interface to the kernel |
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and device drivers to associate interrupt with an Interrupt Service |
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Routine (ISR). There are three levels of interrupt management: <ol> |
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<li id="GUID-74C645F7-29BE-452F-97DB-1D32134FB553"><p>CPU level: Control |
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of interrupts available only to the kernel.</p></li> |
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<li id="GUID-999F3089-0CF3-4C28-8547-0DCFD634F8B8"><p>Controller level: |
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Control provided by functions of the <codeph>Interrupt</codeph> class.</p></li> |
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<li id="GUID-47E985FB-1990-4FD8-A1B2-752A58A799A3"><p>Device level: |
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Control of hardware sources that are managed by a device specific |
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control scheme.</p></li> |
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</ol></p> |
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<section id="GUID-F80CF14A-3CB2-41B1-A3BD-DBD116FDBA8C-GENID-1-2-1-10-1-5-1-7-1-1-6-1-3-2"> |
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<title>Key concepts</title><dl> |
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<dlentry> |
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<dt>Interrupt</dt> |
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<dd><p>An interrupt is a hardware or a software event that may need |
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to be serviced. An example of a hardware interrupt is a key press |
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.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Interrupt ID</dt> |
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<dd><p>The unique ID of an interrupt source. The interrupt ID are |
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defined by the developers creating ASSP and variant.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Spurious interrupts</dt> |
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<dd><p>Interrupts not associated with an Interrupt Service Routine |
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are called the spurious interrupts. The spurious interrupts are handled |
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by a spurious interrupt handler which is only used for debugging.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>ISR</dt> |
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<dd><p>An Interrupt Service Routine (ISR ) is the function to handle |
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an interrupt. ISR is not a class member. ISR provides the minimum |
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processing such as storing data that may not be available later and |
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requests a DFC for further processing.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Interrupt priority</dt> |
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<dd><p>The Interrupt platform service allows developers to set a priority |
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for each interrupt source. The meaning of the priority value depends |
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on the hardware and the baseport implementation.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Interrupt dispatch</dt> |
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<dd><p>When an interrupt is received by the system, it calls the associated |
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ISR. This is called interrupt dispatch. The interrupt dispatch is |
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provided by the implementation of the <codeph>interrupt</codeph> class |
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in the ASSP layer.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>ISR table</dt> |
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<dd><p>The table that maps the interrupt ID and the associated ISR. |
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The ISR table is implemented by the developers creating the baseport |
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variant.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Binding</dt> |
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<dd><p>The process of associating an interrupt ID with an ISR. Unbinding |
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removes the association.</p></dd> |
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</dlentry> |
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<dlentry> |
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<dt>Chained interrupts</dt> |
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<dd><p>The output of a low priority interrupt controller is provided |
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as an input to a higher priority interrupt controller.</p></dd> |
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</dlentry> |
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</dl><dl> |
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<dlentry> |
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<dt>Pseudo-interrupts</dt> |
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<dd><p>Pseudo-interrupts correspond to multiple interrupt sources |
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sharing a single input to an interrupt controller but requiring separate |
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ISRs to service them. The ISRs cannot all be bound to the single real |
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interrupt and are therefore bound to the pseudo-interrupt instead.</p></dd> |
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</dlentry> |
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</dl><dl> |
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<dlentry> |
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<dt>IRQs and FIQs</dt> |
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<dd><p>An IRQ (interrupt request) is the signal generated by an item |
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of hardware or software to request an interrupt from the processor. |
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An FIQ (fast IRQ) is an IRQ with high priority on systems |
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which support prioritization of requests.</p></dd> |
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</dlentry> |
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</dl> </section> |
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<section id="GUID-02A23FEF-2E96-4DC7-9AFB-D836B019C37B"><title>Typical |
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uses</title><p>The Interrupt platform service allows the kernel and |
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device drivers to :</p><ul> |
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<li><p>associate an ISR with an interrupt ID</p></li> |
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<li><p>enable/disable a specific interrupt</p></li> |
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<li><p>clear pending actions on a specific interrupt</p></li> |
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<li><p>change the priority of a specific interrupt.</p></li> |
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</ul></section> |
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</conbody><related-links> |
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<link href="GUID-2E54DA7D-1094-41C6-AFB0-9999471991F8.dita"><linktext>Interrupt |
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Implementation Guide</linktext></link> |
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<link href="GUID-68446E8E-129C-444A-836A-EF8F56BFE0BC.dita"><linktext>Handling |
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Interrupts</linktext></link> |
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</related-links></concept> |