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1 <?xml version="1.0" encoding="utf-8"?> |
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2 <!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. --> |
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4 "Eclipse Public License v1.0" which accompanies this distribution, |
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6 <!-- Initial Contributors: |
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7 Nokia Corporation - initial contribution. |
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8 Contributors: |
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9 --> |
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10 <!DOCTYPE concept |
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11 PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd"> |
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12 <concept id="GUID-387E98B0-568D-4DBB-9A9E-616E41E96B58" xml:lang="en"><title>SMP |
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13 Overview</title><shortdesc>This document introduces Symmetric Multiprocessing (SMP) on the |
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14 Symbian platform.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody> |
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15 <section id="GUID-105AFE3B-F000-4548-B57E-4A5EAEBA2645"><title>Purpose</title> |
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16 <p>An SMP operating system enables any CPU to work on any task, enabling |
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17 multiple threads (processes or multiple threads within a process, and therefore |
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18 applications) to run in parallel. </p><p>A system with 2 CPUs, for example, |
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19 can allow 2 threads to run concurrently; one on each processor. This provides |
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20 better responsiveness and asynchronicity compared to a system with a single |
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21 CPU.</p><p>An SMP system can deliver a similar level of CPU performance as |
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22 a larger and faster uni-processor CPU, while using less power. SMP also provides |
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23 additional power management flexibility, running a single CPU when the system |
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24 is under utilised then switching on extra CPUs to give scalable performance |
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25 on demand for media rich applications. The ARM SMP architecture allows power |
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26 control with voltage / frequency scaling and the ability to switch individual |
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27 cores on and off.</p><p>However, the benefits of SMP come at the cost of OS |
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28 and application complexity (the requirement of extra locks and the multithreading |
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29 of code) and the associated debugging challenges of parallel processing.</p> |
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30 </section> |
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31 <section id="GUID-38C8CACC-0CCD-460B-9713-B33FF79FE75B"><title>Description</title><p>SMP |
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32 is a microprocessor architecture where two or more identical CPUs are connected |
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33 to a single shared main memory system and run a single OS instance. </p><p>The |
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34 diagram below shows how this would apply on the Symbian platform with four |
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35 CPU cores. <fig id="GUID-FBBCE840-E295-4287-BA10-DF37292D432B"> |
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36 <title>The Simplified Architecture of an SMP Platform Executing on the Symbian |
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37 Platform. </title> |
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38 <image href="GUID-85A84BAA-4FA2-4A26-A8B1-57018D8838C3_d0e638374_href.jpg" placement="inline"/> |
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39 </fig></p><p>The figure shows a simplified block diagram of an SMP system, |
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40 where 4 CPUs are connected through their own cache to shared RAM and peripherals. |
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41 The Cache Coherency Control block is responsible for ensuring that each CPU |
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42 cache is consistent with those of the other CPUs. A single instance of OS |
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43 spans the CPUs, the scheduler decides which thread to execute next and upon |
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44 which CPU it should execute. </p></section> |
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45 <section id="GUID-1672A908-7BE6-4261-997B-2495C598A6E0"><title>SMP features</title><p>The |
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46 features of the SMP platform are: <ul> |
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47 <li><p><b>Better responsiveness</b></p><p>One or more CPU cores can be dedicated |
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48 to IO related work. </p></li> |
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49 <li><p><b>High performance on demand</b></p><p>Work can be moved onto CPUs |
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50 when required. </p></li> |
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51 <li><p><b>Flexible power management</b></p><p> CPU cores can be switched on |
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52 or off, or voltage/frequency scaled, according to the current processing requirements |
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53 of the system.</p><p>This can lead to improved battery life because the system |
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54 only uses as much processing power as required at any given time.</p></li> |
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55 <li><p><b>Scalable architecture</b></p><p>SMP can work over two or more CPU |
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56 cores. </p></li> |
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57 </ul></p></section> |
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58 <section id="GUID-D4A04CA3-2E37-4DE1-BF98-C08365F8DFB0"><title>SMP limitations</title><p>The |
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59 disadvantages of using SMP are: </p><ul> |
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60 <li><p><b>The original emulator for the Symbian platform will not emulate |
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61 an SMP environment</b></p><p>The emulator is being replaced by a new emulation |
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62 environment that is capable of simulating the multiprocessor environment.</p></li> |
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63 <li><p><b>Software changes are required</b></p><p>Assumptions that can be |
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64 made in a single core environment, are not necessarily true on a multi-core |
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65 system. The SMP-safe documentation you are reading now will provide you with |
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66 guidance on a number of issues sure to come up while migrating your software |
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67 to work in an SMP environment.</p></li> |
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68 <li><p><b>Debugging Challenges</b></p><p>Debugging on a multi-processor system |
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69 is extremely difficult. The standard tooling solutions, such as the Lauterbach |
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70 debugger and BTrace2 (also known as the modified BTrace) have been revised |
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71 to handle the special requirements of an SMP system.</p></li> |
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72 <li><p><b>Access to memory is serialized</b></p><p>All the CPU cores use the |
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73 same memory, memory access must occur serially. This can cause a performance |
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74 lag. </p></li> |
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75 </ul></section> |
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76 </conbody><related-links> |
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77 <link href="GUID-242D9F27-401B-4230-B3A6-11E2D9D3DE17.dita"><linktext>SMP - Threading |
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78 Model</linktext></link> |
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79 <link href="GUID-16AED228-539F-4BF7-A7FD-9A01FF1A9A84.dita"><linktext>SMP - Locking</linktext> |
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80 </link> |
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81 <link href="GUID-9D93F895-B975-4F2D-A2A3-817033EA5C12.dita"><linktext>SMP - Data |
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82 Integrity and memory barriers</linktext></link> |
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83 <link href="GUID-A3647D6A-4B5E-4A31-8A53-AC822E669AB6.dita"><linktext>SMP - SMP |
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84 Scheduling</linktext></link> |
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85 <link href="GUID-821C254A-40C6-45F9-B2F9-2CF28CAEB8CC.dita"><linktext>SMP - Interrupt |
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86 Handling</linktext></link> |
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87 <link href="GUID-734588CA-5644-438A-9CC9-77ECBE0C1EEA.dita"><linktext>SMP - Obsolete |
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88 Mechanisms</linktext></link> |
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89 <link href="GUID-EE019780-130A-4469-924D-E83D74C2ABE5.dita"><linktext>SMP - Building |
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90 For An SMP Platform</linktext></link> |
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91 <link href="GUID-F44ED3DD-F74F-4C79-8E56-1CBBCCA90C91.dita"><linktext>SMP - Porting |
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92 Guide</linktext></link> |
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93 <link href="GUID-6B8B45E5-1594-455E-9FAE-0A7768305F95.dita"><linktext>SMP - Development |
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94 Tips For Making Code SMP Safe</linktext></link> |
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95 <link href="GUID-C8E61F9D-54E7-4B93-9726-6E96D79334F9.dita"><linktext>SMP - Hardware |
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96 Platforms</linktext></link> |
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97 <link href="GUID-F23E0D38-65C2-40B9-AC19-F5AEBBEB2E82.dita"><linktext>SMP - Debugging |
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98 In An SMP Environment</linktext></link> |
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99 <link href="GUID-23BD6377-CE67-46CC-8311-D40D34BCFB6A.dita"><linktext>SMP - Tutorial |
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100 Overview</linktext></link> |
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101 </related-links></concept> |