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22 disabled or modified under software control. </p> |
22 disabled or modified under software control. </p> |
23 <p>The following hardware block diagram is an example of the way power resources |
23 <p>The following hardware block diagram is an example of the way power resources |
24 might be arranged: </p> |
24 might be arranged: </p> |
25 <fig id="GUID-41113C18-2C87-5DEA-9D05-31083F51269A"> |
25 <fig id="GUID-41113C18-2C87-5DEA-9D05-31083F51269A"> |
26 <title>Example power resource arrangement</title> |
26 <title>Example power resource arrangement</title> |
27 <image href="GUID-622D6337-E60A-5252-8B2B-BA8232927453_d0e389421_href.png" placement="inline"/> |
27 <image href="GUID-622D6337-E60A-5252-8B2B-BA8232927453_d0e395274_href.png" placement="inline"/> |
28 </fig> |
28 </fig> |
29 <p>There is no default support or default implementation for controllable |
29 <p>There is no default support or default implementation for controllable |
30 power resources in the generic layers of Symbian platform. They must be managed |
30 power resources in the generic layers of Symbian platform. They must be managed |
31 by the base port. </p> |
31 by the base port. </p> |
32 <p>We suggest that the management of controllable power resources (the resource |
32 <p>We suggest that the management of controllable power resources (the resource |
158 power controller DLL. </p> <p>The following base port software architecture |
158 power controller DLL. </p> <p>The following base port software architecture |
159 could be applied to the power supply arrangement as illustrated in the hardware |
159 could be applied to the power supply arrangement as illustrated in the hardware |
160 block diagram above (see the beginning of this section at <xref href="GUID-3B6544CD-FA6E-5AB2-AA63-61186F52167D.dita">Controllable |
160 block diagram above (see the beginning of this section at <xref href="GUID-3B6544CD-FA6E-5AB2-AA63-61186F52167D.dita">Controllable |
161 Power Resources</xref>): </p> <fig id="GUID-309A6C5E-A347-5E04-B2C8-426A81755226"> |
161 Power Resources</xref>): </p> <fig id="GUID-309A6C5E-A347-5E04-B2C8-426A81755226"> |
162 <title>Base port software architecture</title> |
162 <title>Base port software architecture</title> |
163 <image href="GUID-EE2F64B2-A2E3-524F-8E04-68BE9AA9EA36_d0e389647_href.png" placement="inline"/> |
163 <image href="GUID-EE2F64B2-A2E3-524F-8E04-68BE9AA9EA36_d0e395500_href.png" placement="inline"/> |
164 </fig> </section> |
164 </fig> </section> |
165 <section id="GUID-C4C67612-C5CD-5D64-B257-259FD12443C9"><title>Multi-level, |
165 <section id="GUID-C4C67612-C5CD-5D64-B257-259FD12443C9"><title>Multi-level, |
166 composite and asynchronous power resources</title> <p>Some power resources |
166 composite and asynchronous power resources</title> <p>Some power resources |
167 may have more than one operational level. For example, it is possible that |
167 may have more than one operational level. For example, it is possible that |
168 an input clock to a peripheral can be operated at a nominal value corresponding |
168 an input clock to a peripheral can be operated at a nominal value corresponding |