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1 <?xml version="1.0" encoding="utf-8"?> |
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2 <!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. --> |
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3 <!-- This component and the accompanying materials are made available under the terms of the License |
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4 "Eclipse Public License v1.0" which accompanies this distribution, |
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5 and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". --> |
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6 <!-- Initial Contributors: |
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7 Nokia Corporation - initial contribution. |
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8 Contributors: |
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9 --> |
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10 <!DOCTYPE concept |
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11 PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd"> |
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12 <concept id="GUID-C92CC81A-35A1-5860-AA08-C8C08B39804C" xml:lang="en"><title>Boot |
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13 Table MMU Permission and Cache Attribute Definitions</title><shortdesc>Lists MMU attributes that the bootstrap implementation must provide.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody> |
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14 <p>The definitions are summarised in the following table. Each entry type |
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15 is identified by its <codeph>TBootTableEntry</codeph> enumerator value that |
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16 defines its position within the table. This group of entries always follows |
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17 the function entries. </p> |
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18 <table id="GUID-6145893A-57CA-5E96-A61B-18AF2DF44EC3"> |
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19 <tgroup cols="2"><colspec colname="col0"/><colspec colname="col1"/> |
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20 <tbody> |
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21 <row> |
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22 <entry><p> <b>Enumerator symbol</b> </p> </entry> |
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23 <entry><p> <b>Summary description</b> </p> </entry> |
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24 </row> |
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25 <row> |
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26 <entry><p> <codeph> BTP_Rom</codeph> </p> </entry> |
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27 <entry><p>Defines permissions for XIP ROM areas, including RAM used as ROM. </p> </entry> |
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28 </row> |
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29 <row> |
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30 <entry><p> <codeph> BTP_Kernel</codeph> </p> </entry> |
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31 <entry><p>Defines permissions for kernel data, initial kernel stack and initial |
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32 kernel heap. </p> </entry> |
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33 </row> |
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34 <row> |
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35 <entry><p> <codeph> BTP_SuperCPU</codeph> </p> </entry> |
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36 <entry><p>Defines permissions for super page and CPU page. </p> </entry> |
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37 </row> |
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38 <row> |
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39 <entry><p> <codeph> BTP_PageTable</codeph> </p> </entry> |
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40 <entry><p>Defines permissions for page directory and page tables. </p> </entry> |
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41 </row> |
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42 <row> |
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43 <entry><p> <codeph> BTP_Vector</codeph> </p> </entry> |
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44 <entry><p>Defines permissions for ARM exception vector mapping. </p> </entry> |
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45 </row> |
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46 <row> |
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47 <entry><p> <codeph>BTP_Hw</codeph> </p> </entry> |
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48 <entry><p>Defines permissions for I/O mappings. </p> </entry> |
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49 </row> |
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50 <row> |
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51 <entry><p> <codeph> BTP_MiniCache</codeph> </p> </entry> |
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52 <entry><p>Defines permissions for mini cache flush area, if required. </p> </entry> |
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53 </row> |
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54 <row> |
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55 <entry><p> <codeph>BTP_MainCache</codeph> </p> </entry> |
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56 <entry><p>Defines permissions for main cache flush area, if required. </p> </entry> |
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57 </row> |
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58 <row> |
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59 <entry><p> <codeph> BTP_PtInfo</codeph> </p> </entry> |
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60 <entry><p>Defines permissions for page table info and, for the multiple memory |
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61 model, ASID info. </p> </entry> |
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62 </row> |
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63 <row> |
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64 <entry><p> <codeph> BTP_User</codeph> </p> </entry> |
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65 <entry><p>Defines permissions for user memory area in direct memory model. </p> </entry> |
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66 </row> |
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67 <row> |
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68 <entry><p> <codeph> BTP_Temp</codeph> </p> </entry> |
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69 <entry><p>Defines permissions for temporary identity mapping of code while |
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70 enabling MMU. </p> </entry> |
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71 </row> |
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72 <row> |
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73 <entry><p> <codeph> BTP_Uncached</codeph> </p> </entry> |
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74 <entry><p>Defines permissions for dummy uncached area mapping on moving or |
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75 multiple model and for identity RAM mapping on direct memory model. </p> </entry> |
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76 </row> |
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77 </tbody> |
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78 </tgroup> |
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79 </table> |
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80 <p>Each entry is defined using the <xref href="GUID-25941CD2-D124-55DD-8716-ACC93E3F1D6C.dita#GUID-25941CD2-D124-55DD-8716-ACC93E3F1D6C/GUID-B5EC22B5-B995-5D54-8F33-1B6FCE11BB3F">BTP_ENTRY</xref> macro. See this macro for a detailed description of the syntax and meanings. </p> |
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81 <p>Take the template port, in <filepath>os/kernelhwsrv/bsptemplate/asspandvariant/template_variant/bootstrap/template.s</filepath> as |
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82 an example. The first two entries, at position <codeph>BTP_Rom</codeph> and |
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83 position <codeph>BTP_Kernel</codeph> in the boot table, follow the last function |
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84 entry at position <xref href="GUID-B3F6FC45-3BF0-5F92-8325-44C705BA47AE.dita#GUID-B3F6FC45-3BF0-5F92-8325-44C705BA47AE/GUID-37E8A845-6326-52F1-9607-5488B1E009A8">BTF_EnableMMU</xref> within |
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85 the table. This gives the following code: </p> |
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86 <codeblock id="GUID-CB1D0496-61E0-5C48-BDA4-D3D64FEFE967" xml:space="preserve">BootTable |
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87 DCD DoWriteC ; output a debug character |
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88 ... |
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89 |
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90 IF CFG_MMUPresent |
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91 |
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92 BTP_ENTRY CLIENT_DOMAIN, PERM_RORO, CACHE_WTRA, 0 ; ROM |
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93 BTP_ENTRY CLIENT_DOMAIN, PERM_RWNO, CACHE_WBRA, 0 ; kernel data/stack/heap |
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94 ... |
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95 </codeblock> |
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96 </conbody></concept> |