56 attributes </title> <p>ARMv6 architecture uses a large number of bits in the |
56 attributes </title> <p>ARMv6 architecture uses a large number of bits in the |
57 page table to describe all of the options for inner and outer cachability. |
57 page table to describe all of the options for inner and outer cachability. |
58 No applications use all of these options simultaneously so a smaller number |
58 No applications use all of these options simultaneously so a smaller number |
59 of configurable options has been implemented to meet the needs of the system. </p> <p>This |
59 of configurable options has been implemented to meet the needs of the system. </p> <p>This |
60 alternative cache mapping allows up to eight different mappings in page tables. |
60 alternative cache mapping allows up to eight different mappings in page tables. |
61 The Symbian OS kernel and device drivers do not need more than four or five |
61 The Symbian platform kernel and device drivers do not need more |
62 different cache mappings. </p> <p>Cache mapping cannot be altered during run-time. |
62 than four or five different cache mappings. </p> <p>Cache mapping cannot be |
63 It must be configured before the MMU is initialised. </p> <p>See the Bootstrap <xref href="GUID-5EB03086-A87D-5588-8927-7A7F8DB38366.dita">Port Implementation Tutorial</xref>. </p> <p id="GUID-EDFD1FE0-ACD7-54B4-9633-0149E3FDF551"><b>Types of memory supported</b> </p> <p>The |
63 altered during run-time. It must be configured before the MMU is initialised. </p> <p>See |
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64 the Bootstrap <xref href="GUID-5EB03086-A87D-5588-8927-7A7F8DB38366.dita">Port |
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65 Implementation Tutorial</xref>. </p> <p id="GUID-EDFD1FE0-ACD7-54B4-9633-0149E3FDF551"><b>Types of memory supported</b> </p> <p>The |
64 kernel supports the following types of memory: </p> <table id="GUID-23FAD8A6-579B-5E3D-A705-A53BA304D529"> |
66 kernel supports the following types of memory: </p> <table id="GUID-23FAD8A6-579B-5E3D-A705-A53BA304D529"> |
65 <tgroup cols="2"><colspec colname="col0"/><colspec colname="col1"/> |
67 <tgroup cols="2"><colspec colname="col0"/><colspec colname="col1"/> |
66 <tbody> |
68 <tbody> |
67 <row> |
69 <row> |
68 <entry><p> <b>Memory type</b> </p> </entry> |
70 <entry><p> <b>Memory type</b> </p> </entry> |