diff -r 89d6a7a84779 -r 25a17d01db0c Symbian3/PDK/Source/GUID-821C254A-40C6-45F9-B2F9-2CF28CAEB8CC.dita --- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/Symbian3/PDK/Source/GUID-821C254A-40C6-45F9-B2F9-2CF28CAEB8CC.dita Fri Jan 22 18:26:19 2010 +0000 @@ -0,0 +1,82 @@ + + + + + +Interrupt +HandlingDescribes how interrupts are handled in the SMP environment. +

An interrupt is a signal from a hardware device or from an executable which +causes a CPU to suspend normal execution, enter the interrupt handling state +and jump to an interrupt handler. An interrupt handler, or ISR (interrupt +service routine), schedules a DFC (delayed function call) on a DFC queue.

+
SMP-Safe Interrupt +Handling

Interrupt handlers are used to implement the functionality +of device drivers.

When a DFC executes on a unicore system, it disables +interrupts to avoid clashing with its own ISR.

On a multicore system +this is not sufficient to maintain data integrity. To maintain data integrity +on an SMP system the code must:

    +
  1. acquire a spin lock +on any data to be written, to block other cores from accessing the data.

  2. +
  3. Interrupts must be disabled, +as on unicore, before the spin lock is acquired.

  4. +

Although these are conceptually two separate tasks, you use the spin +lock API TSpinLock in nkern.h to perform +both tasks at the same time.

The following macros provide SMP-safe interrupt +handling in most situations.

    +
  • __SPIN_LOCK_IRQSAVE

  • +
  • __SPIN_LOCK_IRQRESTORE

  • +

If code using these macros is executed on a unicore system, they will +disable interrupts in the normal way.

There are several other macros +that can be used in the non standard situations or when you require greater +control over the ordering of the delayed function call.

    +
  • __SPIN_LOCK_IRQSAVE(lock)

    Standard SMP-safe +macro

  • +
  • __SPIN_UNLOCK_IRQRESTORE(lock,irq)

    Standard +SMP-safe macro

  • +
  • __SPIN_FLASH_IRQRESTORE(lock,irq)

  • +
  • __SPIN_LOCK(lock) __SPIN_UNLOCK(lock)

  • +
  • __SPIN_FLASH_PREEMPT(lock)

  • +
  • __SPIN_LOCK_IRQ(lock)

  • +
  • __SPIN_UNLOCK_IRQ(lock)

  • +
  • __SPIN_FLASH_IRQ(lock)

  • +

To ensure SMP Safety in Symbian^3, the kernel ensures that +device driver, ISR and DFC are all tied to the same CPU. CPU0 has been stipulated +for this purpose.

+
Making your +device driver SMP safe

Once a device driver has been migrated to +be SMP Safe using the advice above, the mmp file of each driver's binaries +must be updated with the keyword SMPSAFE. As stated earlier, +all kernel side threads and associated interrupts are locked to CPU0 for Symbian^3. +Starting in Symbian^4 any binaries with SMPSAFE will be +unlocked from CPU0 so they can be executed on any core.

SMPSAFE only +has any effect when Compatibility Mode (see general impacts page) is being +used. For interim testing of device driver migration, the CPU affinity API’s +may be used to test driver thread migration. For example,

NKern::ThreadSetCpuAffinity(NKern::CurrentThread(),KCpuAffinityAny);
+

In the following example, a spin lock protects memory being written +by DfcFun() on CPU0 from corruption by ISRFun() running +on a different core.

This code runs on CPU0:void DfcFun(TAny* aPtr) + { + … + irq = __SPIN_LOCK_IRQSAVE(iLock); + iState = EProcessed; + __SPIN_UNLOCK_IRQRESTORE(iLock,irq); + + ... + } +

This code runs on a different core:void ISRFun(TAny* aPtr) + { + __SPIN_LOCK(iLock); + iState = EProcessing; + __SPIN_UNLOCK(iLock); + } +

+
+SMP Overview + +
\ No newline at end of file