diff -r 4816d766a08a -r f345bda72bc4 Symbian3/PDK/Source/GUID-D2163920-D448-5BFC-B655-B654FD657A94.dita --- a/Symbian3/PDK/Source/GUID-D2163920-D448-5BFC-B655-B654FD657A94.dita Tue Mar 30 11:42:04 2010 +0100 +++ b/Symbian3/PDK/Source/GUID-D2163920-D448-5BFC-B655-B654FD657A94.dita Tue Mar 30 11:56:28 2010 +0100 @@ -1,35 +1,35 @@ - - - - - -Level -2 CacheLevel 2 cache is cache memory that is external to the microprocessor. -The kernel provides functions to perform operations on this cache. -

In general, the presence of Level 2 cache is transparent to device drivers. -The cache is physically indexed and physically tagged, and this means that -L2 cache is not affected by the remapping of virtual-to-physical addresses -in the MMU.

-

However, where data is being transferred using DMA, then cached information -in the data buffers involved in a DMA transfer must be flushed before a DMA -write operation, for example when transferring data from memory to a peripheral, -and both before and after a DMA read operation, for example when transferring -data from a peripheral into memory.

-

The kernel provides three functions for this:

- -

All three functions are defined and implemented as part of the Cache class, -defined in ...\e32\e32\include\kernel\cache.h.

-

See also DMA -buffers in the Device -Driver Tutorial.

+ + + + + +Level +2 CacheLevel 2 cache is cache memory that is external to the microprocessor. +The kernel provides functions to perform operations on this cache. +

In general, the presence of Level 2 cache is transparent to device drivers. +The cache is physically indexed and physically tagged, and this means that +L2 cache is not affected by the remapping of virtual-to-physical addresses +in the MMU.

+

However, where data is being transferred using DMA, then cached information +in the data buffers involved in a DMA transfer must be flushed before a DMA +write operation, for example when transferring data from memory to a peripheral, +and both before and after a DMA read operation, for example when transferring +data from a peripheral into memory.

+

The kernel provides three functions for this:

+
    +

  • Cache::SyncMemoryBeforeDmaWrite()

    • +

  • Cache::SyncMemoryBeforeDmaRead()

    • +

  • Cache::SyncMemoryAfterDmaRead()

    • +
+

All three functions are defined and implemented as part of the Cache class, +defined in ...\e32\e32\include\kernel\cache.h.

+

See also DMA +buffers in the Device +Driver Tutorial.

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