|
1 #ifndef _CYASHALBEAGLEBOARD_SPI_H_ |
|
2 #define _CYASHALBEAGLEBOARD_SPI_H_ |
|
3 |
|
4 #include <kern_priv.h> |
|
5 #include <beagle/beagle_gpio.h> |
|
6 #include <beagle/variant.h> |
|
7 #include <assp/omap3530_assp/omap3530_assp_priv.h> |
|
8 #include <assp/omap3530_assp/omap3530_irqmap.h> // GPIO interrupts |
|
9 #include <assp/omap3530_assp/omap3530_gpio.h> |
|
10 |
|
11 #include <assp.h> // Required for definition of TIsr |
|
12 |
|
13 const TUint KGPIO_183 = 183; |
|
14 const TUint KGPIO_INT = 168; |
|
15 |
|
16 //#define SINGLE_CHANNEL_MASTER_MODE |
|
17 |
|
18 /* PRCM registers */ |
|
19 const TUint KCM_FCLKEN1_CORE = Omap3530HwBase::TVirtual<0x48004A00>::Value; |
|
20 const TUint KCM_ICLKEN1_CORE = Omap3530HwBase::TVirtual<0x48004A10>::Value; |
|
21 |
|
22 const TUint32 KCONTROL_SEC_CTRL = Omap3530HwBase::TVirtual<0x480022B0>::Value; |
|
23 |
|
24 /* Pad configuration registers */ |
|
25 const TUint32 KPADCONFIG_McSPI4_SIMO_P12_0 = Omap3530HwBase::TVirtual<0x48002190>::Value; |
|
26 const TUint32 KPADCONFIG_McSPI4_SIMO_P18_16 = Omap3530HwBase::TVirtual<0x48002190>::Value; |
|
27 const TUint32 KPADCONFIG_McSPI4_CS0_P16_16 = Omap3530HwBase::TVirtual<0x48002194>::Value; |
|
28 const TUint32 KPADCONFIG_McSPI4_CLK_P20_0 = Omap3530HwBase::TVirtual<0x4800218c>::Value; |
|
29 const TUint32 KPADCONFIG_GPIO157_P22_16 = Omap3530HwBase::TVirtual<0x4800218c>::Value; |
|
30 const TUint32 KPADCONFIG_GPIO183_P23_0 = Omap3530HwBase::TVirtual<0x480021c0>::Value; |
|
31 const TUint32 KPADCONFIG_GPIO168_P24_16 = Omap3530HwBase::TVirtual<0x480021bc>::Value; |
|
32 |
|
33 /* SPI configuration registers */ |
|
34 const TUint32 KMcSPI4_SYSCONFIG = Omap3530HwBase::TVirtual<0x480BA010>::Value; |
|
35 const TUint32 KMcSPI4_SYSSTATUS = Omap3530HwBase::TVirtual<0x480BA014>::Value; |
|
36 const TUint32 KMcSPI4_IRQSTATUS = Omap3530HwBase::TVirtual<0x480BA018>::Value; |
|
37 const TUint32 KMcSPI4_IRQENABLE = Omap3530HwBase::TVirtual<0x480BA01c>::Value; |
|
38 const TUint32 KMcSPI4_WAKEUPEN = Omap3530HwBase::TVirtual<0x480BA020>::Value; |
|
39 const TUint32 KMcSPI4_SYST = Omap3530HwBase::TVirtual<0x480BA024>::Value; |
|
40 const TUint32 KMcSPI4_MODULCTRL = Omap3530HwBase::TVirtual<0x480BA028>::Value; |
|
41 const TUint32 KMcSPI4_CH0CONF = Omap3530HwBase::TVirtual<0x480BA02c>::Value; |
|
42 const TUint32 KMcSPI4_CH0STAT = Omap3530HwBase::TVirtual<0x480BA030>::Value; |
|
43 const TUint32 KMcSPI4_CH0CTRL = Omap3530HwBase::TVirtual<0x480BA034>::Value; |
|
44 const TUint32 KMcSPI4_TX0 = Omap3530HwBase::TVirtual<0x480BA038>::Value; |
|
45 const TUint32 KMcSPI4_RX0 = Omap3530HwBase::TVirtual<0x480BA03c>::Value; |
|
46 const TUint32 KMcSPI4_XFERLEVEL = Omap3530HwBase::TVirtual<0x480BA07c>::Value; |
|
47 /**/ |
|
48 |
|
49 extern int |
|
50 CyAsHalBeagleBoard__ConfigureSPI(void); |
|
51 |
|
52 extern int |
|
53 CyAsHalBeagleBoard__SetupISR(void* handler, void* ptr); |
|
54 |
|
55 extern void |
|
56 CyAsHalBeagleBoardMcSPI4Ch0_ReadReg(TUint32 addr, TUint16* value); |
|
57 |
|
58 extern void |
|
59 CyAsHalBeagleBoardMcSPI4Ch0_WriteReg(TUint32 addr, TUint16 value); |
|
60 |
|
61 extern void |
|
62 CyAsHalBeagleBoardMcSPI4Ch0_ReadEP(TUint32 addr, TUint8* buff, TUint16 size); |
|
63 |
|
64 extern void |
|
65 CyAsHalBeagleBoardMcSPI4Ch0_WriteEP(TUint32 addr, TUint8* buff, TUint16 size); |
|
66 |
|
67 #endif |