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1 /* Cypress West Bridge API header file (cyasprotocol.h) |
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2 ## =========================== |
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3 ## |
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4 ## Copyright Cypress Semiconductor Corporation, 2006-2009, |
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5 ## All Rights Reserved |
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6 ## UNPUBLISHED, LICENSED SOFTWARE. |
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7 ## |
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8 ## CONFIDENTIAL AND PROPRIETARY INFORMATION |
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9 ## WHICH IS THE PROPERTY OF CYPRESS. |
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10 ## |
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11 ## Use of this file is governed |
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12 ## by the license agreement included in the file |
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13 ## |
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14 ## <install>/license/license.txt |
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15 ## |
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16 ## where <install> is the Cypress software |
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17 ## installation root directory path. |
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18 ## |
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19 ## =========================== |
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20 */ |
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21 |
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22 #ifndef _INCLUDED_CYASPROTOCOL_H_ |
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23 #define _INCLUDED_CYASPROTOCOL_H_ |
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24 |
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25 /* |
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26 * Constants defining the per context buffer sizes |
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27 */ |
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28 #ifndef __doxygen__ |
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29 #define CY_CTX_GEN_MAX_DATA_SIZE (8) |
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30 #define CY_CTX_RES_MAX_DATA_SIZE (8) |
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31 #define CY_CTX_STR_MAX_DATA_SIZE (64) |
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32 #define CY_CTX_USB_MAX_DATA_SIZE (130 + 23) |
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33 #define CY_CTX_TUR_MAX_DATA_SIZE (12) |
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34 #endif |
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35 |
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36 /* Summary |
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37 This response indicates a command has been processed and returned a status. |
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38 |
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39 Direction |
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40 West Bridge -> P Port Processor |
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41 P Port Processor -> West Bridge |
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42 |
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43 Length (in transfers) |
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44 1 |
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45 |
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46 Mailbox0 |
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47 * Context = all |
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48 * Response Code = 0 |
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49 |
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50 D0 |
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51 * 0 = success (CY_AS_ERROR_SUCCESS) |
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52 * non-zero = error code |
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53 |
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54 Description |
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55 This response indicates that a request was processed and no data |
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56 was generated as a result of the request beyond a single 16 bit |
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57 status value. This response contains the 16 bit data value. |
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58 */ |
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59 #define CY_RESP_SUCCESS_FAILURE (0) |
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60 |
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61 /* Summary |
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62 This response indicates an invalid request was sent |
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63 |
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64 Direction |
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65 West Bridge -> P Port Processor |
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66 P Port Processor -> West Bridge |
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67 |
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68 Length (in transfers) |
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69 1 |
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70 |
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71 Mailbox0 |
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72 * Context = all |
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73 * Response Code = 1 |
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74 |
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75 D0 |
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76 * Mailbox contents for invalid request |
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77 |
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78 Description |
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79 This response is returned when a request is sent that contains an invalid |
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80 context or request code. |
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81 */ |
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82 #define CY_RESP_INVALID_REQUEST (1) |
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83 |
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84 /* Summary |
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85 This response indicates a request of invalid length was sent |
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86 |
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87 Direction |
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88 West Bridge -> P Port Processor |
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89 P Port Processor -> West Bridge |
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90 |
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91 Length (in transfers) |
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92 1 |
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93 |
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94 Mailbox0 |
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95 * Context = all |
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96 * Response Code = 2 |
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97 |
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98 D0 |
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99 * Mailbox contenxt for invalid request |
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100 * Length for invalid request |
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101 |
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102 Description |
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103 The software API and firmware sends requests across the P Port to West Bridge |
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104 interface on different contexts. Each contexts has a maximum size of the |
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105 request packet that can be received. The size of a request can be determined |
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106 during the first cycle of a request transfer. If the request is larger |
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107 than can be handled by the receiving context this response is returned. Note |
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108 that the complete request is received before this response is sent, but that |
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109 the request is dropped after this response is sent. |
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110 */ |
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111 #define CY_RESP_INVALID_LENGTH (2) |
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112 |
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113 |
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114 /* Summary |
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115 This response indicates a request was made to an invalid storage address. |
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116 |
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117 Direction |
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118 West Bridge -> P Port Processor |
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119 |
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120 Length (in transfers) |
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121 1 |
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122 |
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123 Mailbox0 |
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124 * Context = all |
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125 * Response Code = 0 |
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126 |
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127 D0 |
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128 Bits 15 - 12 : Media Type |
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129 * 0 = NAND |
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130 * 1 = SD Flash |
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131 * 2 = MMC Flash |
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132 * 3 = CE-ATA |
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133 |
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134 Bits 11 - 8 : Zero based device index |
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135 |
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136 Bits 7 - 0 : Zero based unit index |
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137 |
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138 D1 |
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139 Upper 16 bits of block address |
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140 |
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141 D2 |
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142 Lower 16 bits of block address |
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143 |
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144 D3 |
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145 Portion of address that is invalid |
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146 * 0 = Media Type |
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147 * 1 = Device Index |
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148 * 2 = Unit Index |
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149 * 3 = Block Address |
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150 |
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151 Description |
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152 This response indicates a request to an invalid storage media |
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153 address |
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154 */ |
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155 #define CY_RESP_NO_SUCH_ADDRESS (3) |
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156 |
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157 |
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158 /******************************************************/ |
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159 |
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160 /*@@General requests |
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161 Summary |
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162 The general requests include: |
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163 * CY_RQT_GET_FIRMWARE_VERSION |
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164 * CY_RQT_SET_TRACE_LEVEL |
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165 * CY_RQT_INITIALIZATION_COMPLETE |
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166 * CY_RQT_READ_MCU_REGISTER |
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167 * CY_RQT_WRITE_MCU_REGISTER |
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168 * CY_RQT_STORAGE_MEDIA_CHANGED |
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169 * CY_RQT_CONTROL_ANTIOCH_HEARTBEAT |
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170 * CY_RQT_PREPARE_FOR_STANDBY |
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171 * CY_RQT_ENTER_SUSPEND_MODE |
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172 * CY_RQT_OUT_OF_SUSPEND |
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173 * CY_RQT_GET_GPIO_STATE |
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174 * CY_RQT_SET_GPIO_STATE |
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175 * CY_RQT_SET_SD_CLOCK_FREQ |
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176 * CY_RQT_WB_DEVICE_MISMATCH |
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177 * CY_RQT_BOOTLOAD_NO_FIRMWARE |
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178 * CY_RQT_RESERVE_LNA_BOOT_AREA |
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179 * CY_RQT_ABORT_P2S_XFER |
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180 */ |
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181 |
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182 #ifndef __doxygen__ |
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183 #define CY_RQT_GENERAL_RQT_CONTEXT (0) |
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184 #endif |
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185 |
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186 /* Summary |
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187 This command returns the firmware version number, media types supported and |
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188 debug/release mode information. |
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189 |
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190 Direction |
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191 P Port Processor-> West Bridge |
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192 |
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193 Length (in transfers) |
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194 1 |
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195 |
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196 MailBox0 |
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197 * Context = 0 |
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198 * Request Code = 0 |
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199 |
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200 Description |
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201 The response contains the 16-bit major version, the 16-bit minor version, |
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202 the 16 bit build number, media types supported and release/debug mode |
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203 information. |
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204 |
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205 Responses |
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206 * CY_RESP_FIRMWARE_VERSION |
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207 */ |
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208 #define CY_RQT_GET_FIRMWARE_VERSION (0) |
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209 |
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210 |
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211 /* Summary |
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212 This command changes the trace level and trace information destination within |
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213 the West Bridge firmware. |
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214 |
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215 Direction |
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216 P Port Processor-> West Bridge |
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217 |
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218 Length (in transfers) |
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219 1 |
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220 |
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221 MailBox0 |
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222 * Context = 0 |
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223 * Request Code = 1 |
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224 |
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225 D0 |
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226 Trace Level |
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227 * 0 = no trace information |
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228 * 1 = state information |
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229 * 2 = function call |
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230 * 3 = function call with args/return value |
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231 |
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232 D1 |
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233 Bits 12 - 15 : MediaType |
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234 * 0 = NAND |
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235 * 1 = SDIO Flash |
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236 * 2 = MMC Flash |
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237 * 3 = CE-ATA |
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238 |
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239 Bits 8 - 11 : Zero based device index |
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240 |
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241 Bits 0 - 7 : Zero based unit index |
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242 |
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243 Description |
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244 The West Bridge firmware contains debugging facilities that can be used to trace the |
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245 execution of the firmware. This request sets the level of tracing information that |
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246 is stored and the location where it is stored. |
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247 |
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248 Responses |
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249 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
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250 * CY_RESP_NO_SUCH_ADDRESS |
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251 */ |
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252 #define CY_RQT_SET_TRACE_LEVEL (1) |
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253 |
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254 /* Summary |
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255 This command indicates that the firmware is up and ready for communications with the |
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256 P port processor. |
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257 |
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258 Direction |
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259 West Bridge -> P Port Processor |
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260 |
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261 Length (in transfers) |
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262 2 |
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263 |
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264 Mailbox0 |
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265 * Context = 0 |
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266 * Request Code = 3 |
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267 |
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268 D0 |
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269 Major Version |
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270 |
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271 D1 |
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272 Minor Version |
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273 |
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274 D2 |
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275 Build Number |
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276 |
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277 D3 |
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278 Bits 15-8: Media types supported on Bus 1. |
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279 Bits 7-0: Media types supported on Bus 0. |
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280 Bits 8, 0: NAND support. |
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281 * 0: NAND is not supported. |
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282 * 1: NAND is supported. |
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283 Bits 9, 1: SD memory card support. |
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284 * 0: SD memory card is not supported. |
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285 * 1: SD memory card is supported. |
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286 Bits 10, 2: MMC card support. |
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287 * 0: MMC card is not supported. |
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288 * 1: MMC card is supported. |
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289 Bits 11, 3: CEATA drive support |
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290 * 0: CEATA drive is not supported. |
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291 * 1: CEATA drive is supported. |
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292 Bits 12, 4: SD IO card support. |
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293 * 0: SD IO card is not supported. |
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294 * 1: SD IO card is supported. |
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295 |
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296 D4 |
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297 Bits 15 - 8 : MTP information |
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298 * 0 : MTP not supported in firmware |
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299 * 1 : MTP supported in firmware |
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300 Bits 7 - 0 : Debug/Release mode information. |
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301 * 0 : Release mode |
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302 * 1 : Debug mode |
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303 |
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304 Description |
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305 When the West Bridge firmware is loaded it being by performing initialization. Initialization must |
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306 be complete before West Bridge is ready to accept requests from the P port processor. This request |
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307 is sent from West Bridge to the P port processor to indicate that initialization is complete. |
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308 |
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309 Responses |
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310 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
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311 */ |
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312 #define CY_RQT_INITIALIZATION_COMPLETE (3) |
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313 |
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314 /* Summary |
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315 This command requests the firmware to read and return the contents of a MCU accessible |
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316 register. |
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317 |
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318 Direction |
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319 P Port Processor -> West Bridge |
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320 |
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321 Length (in transfers) |
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322 1 |
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323 |
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324 Mailbox0 |
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325 * Context = 0 |
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326 * Request code = 4 |
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327 |
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328 D0 |
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329 Address of register to read |
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330 |
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331 Description |
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332 This debug command allows the processor to read the contents of a MCU accessible register. |
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333 |
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334 Responses |
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335 * CY_RESP_MCU_REGISTER_DATA |
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336 */ |
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337 #define CY_RQT_READ_MCU_REGISTER (4) |
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338 |
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339 /* Summary |
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340 This command requests the firmware to write to an MCU accessible register. |
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341 |
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342 Direction |
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343 P Port Processor -> West Bridge |
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344 |
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345 Length (in transfers) |
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346 1 |
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347 |
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348 Mailbox0 |
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349 * Context = 0 |
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350 * Request code = 5 |
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351 |
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352 D0 |
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353 Address of register to be written |
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354 |
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355 D1 |
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356 Bits 15 - 8 : Mask to be applied to existing data. |
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357 Bits 7 - 0 : Data to be ORed with masked data. |
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358 |
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359 Description |
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360 This debug command allows the processor to write to an MCU accessible register. |
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361 Note: This has to be used with caution, and is supported by the firmware only |
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362 in special debug builds. |
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363 |
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364 Responses |
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365 * CY_RESP_SUCCESS_FAILURE |
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366 */ |
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367 #define CY_RQT_WRITE_MCU_REGISTER (5) |
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368 |
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369 /* Summary |
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370 This command tells the West Bridge firmware that a change in storage media has been detected. |
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371 |
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372 Direction |
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373 P Port Processor -> West Bridge |
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374 |
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375 Length (in transfers) |
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376 1 |
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377 |
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378 Mailbox0 |
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379 * Context = 0 |
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380 * Request code = 6 |
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381 |
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382 Description |
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383 If the insertion or removal of SD or MMC cards is detected by hardware external to West Bridge, |
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384 this command is used to tell the West Bridge firmware to re-initialize the storage controlled by |
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385 the device. |
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386 |
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387 Responses |
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388 * CY_RESP_SUCCESS_FAILURE |
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389 */ |
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390 #define CY_RQT_STORAGE_MEDIA_CHANGED (6) |
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391 |
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392 /* Summary |
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393 This command enables/disables the periodic heartbeat message from the West Bridge firmware to |
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394 the processor. |
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395 |
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396 Direction |
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397 P Port Processor -> West Bridge |
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398 |
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399 Length (in transfers) |
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400 1 |
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401 |
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402 Mailbox0 |
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403 * Context = 0 |
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404 * Request code = 7 |
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405 |
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406 Description |
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407 This command enables/disables the periodic heartbeat message from the West Bridge firmware to |
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408 the processor. The heartbeat message is left enabled by default, and can lead to a loss |
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409 in performance on the P port interface. |
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410 |
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411 Responses |
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412 * CY_RESP_SUCCESS_FAILURE |
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413 */ |
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414 #define CY_RQT_CONTROL_ANTIOCH_HEARTBEAT (7) |
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415 |
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416 /* Summary |
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417 This command requests the West Bridge firmware to prepare for the device going into standby |
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418 mode. |
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419 |
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420 Direction |
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421 P Port Processor -> West Bridge |
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422 |
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423 Length (in transfers) |
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424 1 |
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425 |
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426 Mailbox0 |
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427 * Context = 0 |
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428 * Request code = 8 |
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429 |
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430 Description |
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431 This command is sent by the processor to the West Bridge as preparation for going into |
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432 standby mode. The request allows the firmware to complete any pending/cached storage |
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433 operations before going into the low power state. |
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434 |
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435 Responses |
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436 * CY_RESP_SUCCESS_FAILURE |
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437 */ |
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438 #define CY_RQT_PREPARE_FOR_STANDBY (8) |
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439 |
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440 /* Summary |
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441 Requests the firmware to go into suspend mode. |
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442 |
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443 Direction |
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444 P Port Processor -> West Bridge |
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445 |
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446 Length (in transfers) |
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447 1 |
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448 |
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449 Mailbox0 |
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450 * Context = 0 |
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451 * Request code = 9 |
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452 |
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453 D0 |
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454 Bits 7-0: Wakeup control information. |
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455 |
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456 Description |
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457 This command is sent by the processor to the West Bridge to request the device |
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458 to be placed in suspend mode. The firmware will complete any pending/cached storage |
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459 operations before going into the low power state. |
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460 |
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461 Responses |
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462 * CY_RESP_SUCCESS_FAILURE |
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463 */ |
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464 #define CY_RQT_ENTER_SUSPEND_MODE (9) |
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465 |
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466 /* Summary |
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467 Indicates that the device has left suspend mode. |
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468 |
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469 Direction |
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470 West Bridge -> P Port Processor |
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471 |
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472 Length (in transfers) |
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473 1 |
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474 |
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475 Mailbox0 |
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476 * Context = 0 |
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477 * Request code = 10 |
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478 |
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479 Description |
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480 This message is sent by the West Bridge to the Processor to indicate that the device |
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481 has woken up from suspend mode, and is ready to accept new requests. |
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482 |
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483 Responses |
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484 * CY_RESP_SUCCESS_FAILURE |
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485 */ |
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486 #define CY_RQT_OUT_OF_SUSPEND (10) |
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487 |
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488 /* Summary |
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489 Request to get the current state of an West Bridge GPIO pin. |
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490 |
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491 Direction |
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492 P Port Processor -> West Bridge |
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493 |
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494 Length (in transfers) |
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495 1 |
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496 |
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497 Mailbox0 |
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498 * Context = 0 |
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499 * Request code = 11 |
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500 |
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501 D0 |
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502 Bits 15 - 8 : GPIO pin identifier |
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503 |
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504 Responses |
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505 * CY_RESP_GPIO_STATE |
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506 |
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507 Description |
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508 Request from the processor to get the current state of an West Bridge GPIO pin. |
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509 */ |
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510 #define CY_RQT_GET_GPIO_STATE (11) |
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511 |
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512 /* Summary |
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513 Request to update the output value on an West Bridge GPIO pin. |
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514 |
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515 Direction |
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516 P Port Processor -> West Bridge |
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517 |
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518 Length (in transfers) |
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519 1 |
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520 |
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521 Mailbox0 |
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522 * Context = 0 |
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523 * Request code = 12 |
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524 |
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525 D0 |
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526 Bits 15 - 8 : GPIO pin identifier |
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527 Bit 0 : Desired output state |
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528 |
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529 Responses |
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530 * CY_RESP_SUCCESS_FAILURE |
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531 |
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532 Description |
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533 Request from the processor to update the output value on an West Bridge GPIO pin. |
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534 */ |
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535 #define CY_RQT_SET_GPIO_STATE (12) |
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536 |
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537 /* Summary |
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538 Set the clock frequency on the SD interface of the West Bridge device. |
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539 |
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540 Direction |
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541 P Port Processor -> West Bridge |
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542 |
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543 Length (in transfers) |
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544 1 |
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545 |
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546 Mailbox0 |
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547 * Context = 0 |
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548 * Request code = 13 |
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549 |
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550 D0 |
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551 Bit 8: Type of SD/MMC media |
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552 0 = low speed media |
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553 1 = high speed media |
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554 Bit 0: Clock frequency selection |
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555 0 = Default frequency |
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556 1 = Alternate frequency (24 MHz in both cases) |
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557 |
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558 Description |
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559 This request is sent by the processor to set the operating clock |
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560 frequency used on the SD interface of the device. |
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561 |
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562 Responses |
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563 * CY_RESP_SUCCESS_FAILURE |
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564 */ |
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565 #define CY_RQT_SET_SD_CLOCK_FREQ (13) |
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566 |
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567 /* Summary |
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568 Indicates the firmware downloaded to West Bridge cannot run on the active device. |
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569 |
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570 Direction |
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571 West Bridge -> P Port processor |
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572 |
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573 Length (in transfers) |
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574 1 |
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575 |
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576 Mailbox0 |
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577 * Context = 0 |
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578 * Request code = 14 |
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579 |
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580 Description |
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581 Some versions of West Bridge firmware can only run on specific types/versions of |
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582 the West Bridge device. This error is returned when a firmware image is downloaded |
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583 onto a device that does not support it. |
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584 |
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585 Responses |
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586 * None |
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587 */ |
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588 #define CY_RQT_WB_DEVICE_MISMATCH (14) |
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589 |
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590 /* Summary |
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591 This command is indicates that no firmware was found in the storage media. |
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592 |
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593 Direction |
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594 West Bridge -> P Port Processor |
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595 |
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596 Length (in transfers) |
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597 1 |
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598 |
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599 Mailbox0 |
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600 * Context = 0 |
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601 * Request code = 15 |
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602 |
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603 Description |
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604 The command is received only in case of silicon with bootloader ROM. The device sends |
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605 the request if there is no firmware image found in the storage media or the image is |
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606 corrupted. The device is waiting for P port to download a valid firmware image. |
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607 |
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608 Responses |
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609 * None |
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610 */ |
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611 #define CY_RQT_BOOTLOAD_NO_FIRMWARE (15) |
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612 |
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613 /* Summary |
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614 This command reserves first numzones zones of nand device for storing processor boot image. |
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615 |
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616 Direction |
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617 P Port Processor-> West Bridge |
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618 |
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619 Length (in transfers) |
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620 1 |
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621 |
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622 MailBox0 |
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623 * Context = 0 |
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624 * Request Code = 16 |
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625 |
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626 D0 |
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627 Bits 7-0: numzones |
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628 |
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629 Description |
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630 The first numzones zones in nand device will be used for storing proc boot image. LNA firmware in Astoria will |
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631 work on this nand area and boots the processor which will then use the remaining nand for usual purposes. |
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632 |
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633 Responses |
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634 * CY_RESP_SUCCESS_FAILURE |
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635 */ |
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636 #define CY_RQT_RESERVE_LNA_BOOT_AREA (16) |
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637 |
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638 /* Summary |
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639 This command cancels the processing of a P2S operation in firmware. |
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640 |
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641 Direction |
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642 P Port Processor -> West Bridge |
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643 |
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644 Length (in transfers) |
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645 1 |
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646 |
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647 MailBox0 |
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648 * Context = 0 |
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649 * Request Code = 17 |
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650 |
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651 Responses |
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652 * CY_RESP_SUCCESS_FAILURE |
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653 */ |
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654 #define CY_RQT_ABORT_P2S_XFER (17) |
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655 |
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656 /* |
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657 * Used for debugging, ignore for normal operations |
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658 */ |
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659 #ifndef __doxygen__ |
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660 #define CY_RQT_DEBUG_MESSAGE (127) |
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661 #endif |
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662 |
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663 /******************************************************/ |
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664 |
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665 /*@@General responses |
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666 Summary |
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667 The general responses include: |
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668 * CY_RESP_FIRMWARE_VERSION |
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669 * CY_RESP_MCU_REGISTER_DATA |
|
670 * CY_RESP_GPIO_STATE |
|
671 */ |
|
672 |
|
673 |
|
674 /* Summary |
|
675 This response indicates success and contains the firmware version number, media types supported |
|
676 by the firmware and release/debug mode information. |
|
677 |
|
678 Direction |
|
679 West Bridge -> P Port Processor |
|
680 |
|
681 Length (in transfers) |
|
682 2 |
|
683 |
|
684 MailBox0 |
|
685 * Context = 0 |
|
686 * Response Code = 16 |
|
687 |
|
688 D0 |
|
689 Major Version |
|
690 |
|
691 D1 |
|
692 Minor Version |
|
693 |
|
694 D2 |
|
695 Build Number |
|
696 |
|
697 D3 |
|
698 Bits 15-8: Media types supported on Bus 1. |
|
699 Bits 7-0: Media types supported on Bus 0. |
|
700 Bits 8, 0: NAND support. |
|
701 * 0: NAND is not supported. |
|
702 * 1: NAND is supported. |
|
703 Bits 9, 1: SD memory card support. |
|
704 * 0: SD memory card is not supported. |
|
705 * 1: SD memory card is supported. |
|
706 Bits 10, 2: MMC card support. |
|
707 * 0: MMC card is not supported. |
|
708 * 1: MMC card is supported. |
|
709 Bits 11, 3: CEATA drive support |
|
710 * 0: CEATA drive is not supported. |
|
711 * 1: CEATA drive is supported. |
|
712 Bits 12, 4: SD IO card support. |
|
713 * 0: SD IO card is not supported. |
|
714 * 1: SD IO card is supported. |
|
715 |
|
716 D4 |
|
717 Bits 15 - 8 : MTP information |
|
718 * 0 : MTP not supported in firmware |
|
719 * 1 : MTP supported in firmware |
|
720 Bits 7 - 0 : Debug/Release mode information. |
|
721 * 0 : Release mode |
|
722 * 1 : Debug mode |
|
723 |
|
724 Description |
|
725 This reponse is sent to return the firmware version number to the requestor. |
|
726 */ |
|
727 #define CY_RESP_FIRMWARE_VERSION (16) |
|
728 |
|
729 /* Summary |
|
730 This response returns the contents of a MCU accessible register to the processor. |
|
731 |
|
732 Direction |
|
733 West Bridge -> P Port Processor |
|
734 |
|
735 Length (in transfers) |
|
736 1 |
|
737 |
|
738 MailBox0 |
|
739 * Context = 0 |
|
740 * Response code = 17 |
|
741 |
|
742 D0 |
|
743 Bits 7 - 0 : MCU register contents |
|
744 |
|
745 Description |
|
746 This response is sent by the firmware in response to the CY_RQT_READ_MCU_REGISTER |
|
747 command. |
|
748 */ |
|
749 #define CY_RESP_MCU_REGISTER_DATA (17) |
|
750 |
|
751 /* Summary |
|
752 Reports the current state of an West Bridge GPIO pin. |
|
753 |
|
754 Direction |
|
755 West Bridge -> P Port Processor |
|
756 |
|
757 Length (in transfers) |
|
758 1 |
|
759 |
|
760 MailBox0 |
|
761 * Context = 0 |
|
762 * Request code = 18 |
|
763 |
|
764 D0 |
|
765 Bit 0: Current state of the GP input pin |
|
766 |
|
767 Description |
|
768 This response is sent by the West Bridge to report the current state observed on |
|
769 a general purpose input pin. |
|
770 */ |
|
771 #define CY_RESP_GPIO_STATE (18) |
|
772 |
|
773 |
|
774 /* Summary |
|
775 This command notifies West Bridge the polarity of the SD power pin |
|
776 |
|
777 Direction |
|
778 P Port Processor -> West Bridge |
|
779 |
|
780 Length (in transfers) |
|
781 1 |
|
782 |
|
783 MailBox0 |
|
784 * Context = 0 |
|
785 * Request Code = 19 |
|
786 D0: CyAnMiscActivehigh / CyAnMiscActivelow |
|
787 |
|
788 Responses |
|
789 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
790 |
|
791 */ |
|
792 |
|
793 #define CY_RQT_SDPOLARITY (19) |
|
794 |
|
795 /********************************************************************/ |
|
796 |
|
797 /*@@Resource requests |
|
798 Summary |
|
799 |
|
800 The resource requests include: |
|
801 * CY_RQT_ACQUIRE_RESOURCE |
|
802 * CY_RQT_RELEASE_RESOURCE |
|
803 */ |
|
804 |
|
805 |
|
806 |
|
807 |
|
808 |
|
809 #ifndef __doxygen__ |
|
810 #define CY_RQT_RESOURCE_RQT_CONTEXT (1) |
|
811 #endif |
|
812 |
|
813 |
|
814 /* Summary |
|
815 This command is a request from the P port processor for ownership |
|
816 of a resource. |
|
817 |
|
818 Direction |
|
819 P Port Processor -> West Bridge |
|
820 |
|
821 Length (in transfers) |
|
822 1 |
|
823 |
|
824 MailBox0 |
|
825 * Context = 1 |
|
826 * Request Code = 0 |
|
827 |
|
828 D0 |
|
829 Resource |
|
830 * 0 = USB |
|
831 * 1 = SDIO/MMC |
|
832 * 2 = NAND |
|
833 |
|
834 D1 |
|
835 Force Flag |
|
836 * 0 = Normal |
|
837 * 1 = Force |
|
838 |
|
839 Description |
|
840 The resource may be the USB pins, the SDIO/MMC bus, or the NAND bus. |
|
841 |
|
842 Responses |
|
843 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
844 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RELEASED |
|
845 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_RESOURCE |
|
846 */ |
|
847 #define CY_RQT_ACQUIRE_RESOURCE (0) |
|
848 |
|
849 |
|
850 /* Summary |
|
851 This command is a request from the P port processor to release |
|
852 ownership of a resource. |
|
853 |
|
854 Direction |
|
855 P Port Processor -> West Bridge |
|
856 |
|
857 Length (in transfers) |
|
858 1 |
|
859 |
|
860 MailBox0 |
|
861 * Context = 1 |
|
862 * Request Code = 1 |
|
863 |
|
864 D0 |
|
865 Resource |
|
866 * 0 = USB |
|
867 * 1 = SDIO/MMC |
|
868 * 2 = NAND |
|
869 |
|
870 Description |
|
871 The resource may be the USB pins, the SDIO/MMC bus, or the NAND bus. |
|
872 |
|
873 Responses |
|
874 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
875 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_OWNER |
|
876 */ |
|
877 #define CY_RQT_RELEASE_RESOURCE (1) |
|
878 |
|
879 |
|
880 /******************************************************/ |
|
881 |
|
882 /*@@Storage requests |
|
883 Summary |
|
884 The storage commands include: |
|
885 * CY_RQT_START_STORAGE |
|
886 * CY_RQT_STOP_STORAGE |
|
887 * CY_RQT_CLAIM_STORAGE |
|
888 * CY_RQT_RELEASE_STORAGE |
|
889 * CY_RQT_QUERY_MEDIA |
|
890 * CY_RQT_QUERY_DEVICE |
|
891 * CY_RQT_QUERY_UNIT |
|
892 * CY_RQT_READ_BLOCK |
|
893 * CY_RQT_WRITE_BLOCK |
|
894 * CY_RQT_MEDIA_CHANGED |
|
895 * CY_RQT_ANTIOCH_CLAIM |
|
896 * CY_RQT_ANTIOCH_RELEASE |
|
897 * CY_RQT_SD_INTERFACE_CONTROL |
|
898 * CY_RQT_SD_REGISTER_READ |
|
899 * CY_RQT_CHECK_CARD_LOCK |
|
900 * CY_RQT_QUERY_BUS |
|
901 * CY_RQT_PARTITION_STORAGE |
|
902 * CY_RQT_PARTITION_ERASE |
|
903 * CY_RQT_GET_TRANSFER_AMOUNT |
|
904 * CY_RQT_ERASE |
|
905 * CY_RQT_SDIO_READ_DIRECT |
|
906 * CY_RQT_SDIO_WRITE_DIRECT |
|
907 * CY_RQT_SDIO_READ_EXTENDED |
|
908 * CY_RQT_SDIO_WRITE_EXTENDED |
|
909 * CY_RQT_SDIO_INIT_FUNCTION |
|
910 * CY_RQT_SDIO_QUERY_CARD |
|
911 * CY_RQT_SDIO_GET_TUPLE |
|
912 * CY_RQT_SDIO_ABORT_IO |
|
913 * CY_RQT_SDIO_INTR |
|
914 * CY_RQT_SDIO_SUSPEND |
|
915 * CY_RQT_SDIO_RESUME |
|
916 * CY_RQT_SDIO_RESET_DEV |
|
917 * CY_RQT_P2S_DMA_START |
|
918 */ |
|
919 #ifndef __doxygen__ |
|
920 #define CY_RQT_STORAGE_RQT_CONTEXT (2) |
|
921 #endif |
|
922 |
|
923 /* Summary |
|
924 This command requests initialization of the storage stack. |
|
925 |
|
926 Direction |
|
927 P Port Processor -> West Bridge |
|
928 |
|
929 Length (in transfers) |
|
930 1 |
|
931 |
|
932 MailBox0 |
|
933 * Context = 2 |
|
934 * Request Code = 0 |
|
935 |
|
936 Description |
|
937 This command is required before any other storage related command |
|
938 can be send to the West Bridge firmware. |
|
939 |
|
940 Responses |
|
941 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
942 * CY_RESP_SUCCESS_FAILURE:CY_ERR_ALREADY_RUNNING |
|
943 */ |
|
944 #define CY_RQT_START_STORAGE (0) |
|
945 |
|
946 |
|
947 /* Summary |
|
948 This command requests shutdown of the storage stack. |
|
949 |
|
950 Direction |
|
951 P Port Processor -> West Bridge |
|
952 |
|
953 Length (in transfers) |
|
954 1 |
|
955 |
|
956 MailBox0 |
|
957 * Context = 2 |
|
958 * Request Code = 1 |
|
959 |
|
960 Responses |
|
961 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
962 * CY_RESP_SUCCESS_FAILURE:CY_ERR_NOT_RUNNING |
|
963 */ |
|
964 #define CY_RQT_STOP_STORAGE (1) |
|
965 |
|
966 |
|
967 /* Summary |
|
968 This command requests ownership of the given media type by the P port processor. |
|
969 |
|
970 Direction |
|
971 P Port Processor -> West Bridge |
|
972 |
|
973 Length (in transfers) |
|
974 1 |
|
975 |
|
976 MailBox0 |
|
977 * Context = 2 |
|
978 * Request Code = 2 |
|
979 |
|
980 D0 |
|
981 Bits 12 - 15 : Bus Index |
|
982 Bits 8 - 11 : Zero based device index |
|
983 |
|
984 Responses |
|
985 * CY_RESP_MEDIA_CLAIMED_RELEASED |
|
986 * CY_RESP_NO_SUCH_ADDRESS |
|
987 */ |
|
988 #define CY_RQT_CLAIM_STORAGE (2) |
|
989 |
|
990 |
|
991 /* Summary |
|
992 This command releases ownership of a given media type by the P port processor. |
|
993 |
|
994 Direction |
|
995 P Port Processor -> West Bridge |
|
996 |
|
997 Length (in transfers) |
|
998 1 |
|
999 |
|
1000 MailBox0 |
|
1001 * Context = 2 |
|
1002 * Request Code = 3 |
|
1003 |
|
1004 D0 |
|
1005 Bits 12 - 15 : Bus Index |
|
1006 Bits 8 - 11 : Zero based device index |
|
1007 |
|
1008 Responses |
|
1009 * CY_RESP_MEDIA_CLAIMED_RELEASED |
|
1010 * CY_RESP_NO_SUCH_ADDRESS |
|
1011 */ |
|
1012 #define CY_RQT_RELEASE_STORAGE (3) |
|
1013 |
|
1014 |
|
1015 /* Summary |
|
1016 This command returns the total number of logical devices of the given type of media. |
|
1017 |
|
1018 Direction |
|
1019 P Port Processor -> West Bridge |
|
1020 |
|
1021 Length (in transfers) |
|
1022 1 |
|
1023 |
|
1024 MailBox0 |
|
1025 * Context = 2 |
|
1026 * Request Code = 4 |
|
1027 |
|
1028 D0 |
|
1029 Bits 12 - 15 : MediaType |
|
1030 * 0 = NAND |
|
1031 * 1 = SDIO Flash |
|
1032 * 2 = MMC Flash |
|
1033 * 3 = CE-ATA |
|
1034 |
|
1035 Bits 8 - 11 : Not Used |
|
1036 |
|
1037 Bits 0 - 7 : Not Used |
|
1038 |
|
1039 Responses |
|
1040 * CY_RESP_MEDIA_DESCRIPTOR |
|
1041 * CY_RESP_NO_SUCH_ADDRESS |
|
1042 */ |
|
1043 #define CY_RQT_QUERY_MEDIA (4) |
|
1044 |
|
1045 |
|
1046 /* Summary |
|
1047 This command queries a given device to determine information about the number |
|
1048 of logical units on the given device. |
|
1049 |
|
1050 Direction |
|
1051 P Port Processor -> West Bridge |
|
1052 |
|
1053 Length (in transfers) |
|
1054 1 |
|
1055 |
|
1056 MailBox0 |
|
1057 * Context = 2 |
|
1058 * Request Code = 5 |
|
1059 |
|
1060 D0 |
|
1061 Bits 12 - 15 : Bus index |
|
1062 Bits 8 - 11 : Zero based device index |
|
1063 Bits 0 - 7 : Not Used |
|
1064 |
|
1065 Responses |
|
1066 * CY_RESP_DEVICE_DESCRIPTOR |
|
1067 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE |
|
1068 * CY_RESP_NO_SUCH_ADDRESS |
|
1069 */ |
|
1070 #define CY_RQT_QUERY_DEVICE (5) |
|
1071 |
|
1072 |
|
1073 /* Summary |
|
1074 This command queries a given device to determine information about the size |
|
1075 and location of a logical unit located on a physical device. |
|
1076 |
|
1077 Direction |
|
1078 P Port Processor -> West Bridge |
|
1079 |
|
1080 Length (in transfers) |
|
1081 1 |
|
1082 |
|
1083 MailBox0 |
|
1084 * Context = 2 |
|
1085 * Request Code = 6 |
|
1086 |
|
1087 D0 |
|
1088 Bits 12 - 15 : Bus index |
|
1089 Bits 8 - 11 : Zero based device index |
|
1090 Bits 0 - 7 : Zero based unit index |
|
1091 |
|
1092 Responses |
|
1093 * CY_RESP_UNIT_DESCRIPTOR |
|
1094 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_PARTITION_TABLE |
|
1095 * CY_RESP_NO_SUCH_ADDRESS |
|
1096 */ |
|
1097 #define CY_RQT_QUERY_UNIT (6) |
|
1098 |
|
1099 |
|
1100 /* Summary |
|
1101 This command initiates the read of a specific block from the given media, |
|
1102 device and unit. |
|
1103 |
|
1104 Direction |
|
1105 P Port Processor -> West Bridge |
|
1106 |
|
1107 Length (in transfers) |
|
1108 2 |
|
1109 |
|
1110 MailBox0 |
|
1111 * Context = 2 |
|
1112 * Request Code = 7 |
|
1113 |
|
1114 D0 |
|
1115 Bits 12 - 15 : Bus index |
|
1116 Bits 8 - 11 : Zero based device index |
|
1117 Bits 0 - 7 : Zero based unit index |
|
1118 |
|
1119 D1 |
|
1120 Upper 16 bits of block address |
|
1121 |
|
1122 D2 |
|
1123 Lower 16 bits of block address |
|
1124 |
|
1125 D3 |
|
1126 BIT 8 - 15 : Upper 8 bits of Number of blocks |
|
1127 |
|
1128 BIT 0 - 7 : Reserved |
|
1129 |
|
1130 * D4 * |
|
1131 BITS 8 - 15 : Lower 8 bits of Number of blocks |
|
1132 BITS 1 - 7 : Not Used |
|
1133 BIT 0 : Indicates whether this command is a part of a P2S only burst. |
|
1134 |
|
1135 Responses |
|
1136 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1137 * CY_RESP_ANTIOCH_DEFERRED_ERROR |
|
1138 */ |
|
1139 #define CY_RQT_READ_BLOCK (7) |
|
1140 |
|
1141 |
|
1142 /* Summary |
|
1143 This command initiates the write of a specific block from the given media, |
|
1144 device and unit. |
|
1145 |
|
1146 Direction |
|
1147 P Port Processor -> West Bridge |
|
1148 |
|
1149 Length (in transfers) |
|
1150 2 |
|
1151 |
|
1152 MailBox0 |
|
1153 * Context = 2 |
|
1154 * Request Code = 8 |
|
1155 |
|
1156 D0 |
|
1157 Bits 12 - 15 : Bus index |
|
1158 Bits 8 - 11 : Zero based device index |
|
1159 Bits 0 - 7 : Zero based unit index |
|
1160 |
|
1161 D1 |
|
1162 Upper 16 bits of block address |
|
1163 |
|
1164 D2 |
|
1165 Lower 16 bits of block address |
|
1166 |
|
1167 D3 |
|
1168 BIT 8 - 15 : Upper 8 bits of Number of blocks |
|
1169 |
|
1170 BIT 0 - 7 : Reserved |
|
1171 |
|
1172 * D4 * |
|
1173 BITS 8 - 15 : Lower 8 bits of Number of blocks |
|
1174 BITS 1 - 7 : Not Used |
|
1175 BIT 0 : Indicates whether this command is a part of a P2S only burst. |
|
1176 |
|
1177 Responses |
|
1178 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1179 * CY_RESP_ANTIOCH_DEFERRED_ERROR |
|
1180 */ |
|
1181 #define CY_RQT_WRITE_BLOCK (8) |
|
1182 |
|
1183 /* Summary |
|
1184 This request is sent when the West Bridge device detects a change in the status |
|
1185 of the media. |
|
1186 |
|
1187 Direction |
|
1188 West Bridge -> P Port Processor |
|
1189 |
|
1190 Length (in transfers) |
|
1191 1 |
|
1192 |
|
1193 Mailbox0 |
|
1194 * Context = 2 |
|
1195 * Request Code = 9 |
|
1196 |
|
1197 D0 |
|
1198 Bits 12 - 15 : Bus index |
|
1199 Bits 0 - 7 : Media type |
|
1200 |
|
1201 D1 |
|
1202 Bit 0 : Action |
|
1203 * 0 = Inserted |
|
1204 * 1 = Removed |
|
1205 |
|
1206 Description |
|
1207 When the media manager detects the insertion or removal of a media from the West Bridge |
|
1208 port, this request is sent from the West Bridge device to the P Port processor to inform |
|
1209 the processor of the change in status of the media. This request is sent for both an |
|
1210 insert operation and a removal operation. |
|
1211 |
|
1212 Responses |
|
1213 * CY_RESPO_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1214 */ |
|
1215 #define CY_RQT_MEDIA_CHANGED (9) |
|
1216 |
|
1217 /* Summary |
|
1218 This request is sent when the USB module wishes to claim storage media. |
|
1219 |
|
1220 Direction |
|
1221 West Bridge -> P Port Processor |
|
1222 |
|
1223 Length (in transfers) |
|
1224 1 |
|
1225 |
|
1226 Mailbox0 |
|
1227 * Context = 2 |
|
1228 * Request Code = 10 |
|
1229 |
|
1230 D0 |
|
1231 Bit 0: |
|
1232 * 0 = do not release NAND |
|
1233 * 1 = release NAND |
|
1234 |
|
1235 Bit 1: |
|
1236 * 0 = do not release SD Flash |
|
1237 * 1 = release SD Flash |
|
1238 |
|
1239 Bit 2: |
|
1240 * 0 = do not release MMC flash |
|
1241 * 1 = release MMC flash |
|
1242 |
|
1243 Bit 3: |
|
1244 * 0 = do not release CE-ATA storage |
|
1245 * 1 = release CE-ATA storage |
|
1246 |
|
1247 Bit 8: |
|
1248 * 0 = do not release storage on bus 0 |
|
1249 * 1 = release storage on bus 0 |
|
1250 |
|
1251 Bit 9: |
|
1252 * 0 = do not release storage on bus 1 |
|
1253 * 1 = release storage on bus 1 |
|
1254 |
|
1255 Description |
|
1256 When the USB cable is attached to the West Bridge device, West Bridge will enumerate the storage |
|
1257 devices per the USB initialization of West Bridge. In order for West Bridge to respond to requests |
|
1258 received via USB for the mass storage devices, the USB module must claim the storeage. This |
|
1259 request is a request to the P port processor to release the storage medium. The medium will |
|
1260 not be visible on the USB host, until it has been released by the processor. |
|
1261 */ |
|
1262 #define CY_RQT_ANTIOCH_CLAIM (10) |
|
1263 |
|
1264 /* Summary |
|
1265 This request is sent when the P port has asked West Bridge to release storage media, and the |
|
1266 West Bridge device has completed this. |
|
1267 |
|
1268 Direction |
|
1269 West Bridge -> P Port Processor |
|
1270 |
|
1271 Length (in transfers) |
|
1272 1 |
|
1273 |
|
1274 Mailbox0 |
|
1275 * Context = 2 |
|
1276 * Request Code = 11 |
|
1277 |
|
1278 D0 |
|
1279 Bit 0: |
|
1280 * 0 = No change in ownership of NAND storage |
|
1281 * 1 = NAND ownership has been given to processor |
|
1282 |
|
1283 Bit 1: |
|
1284 * 0 = No change in ownership of SD storage |
|
1285 * 1 = SD ownership has been given to processor |
|
1286 |
|
1287 Bit 2: |
|
1288 * 0 = No change in ownership of MMC storage |
|
1289 * 1 = MMC ownership has been given to processor |
|
1290 |
|
1291 Bit 3: |
|
1292 * 0 = No change in ownership of CE-ATA storage |
|
1293 * 1 = CE-ATA ownership has been given to processor |
|
1294 |
|
1295 Bit 4: |
|
1296 * 0 = No change in ownership of SD IO device |
|
1297 * 1 = SD IO device ownership has been given to processor |
|
1298 |
|
1299 Bit 8: |
|
1300 * 0 = No change in ownership of storage on bus 0 |
|
1301 * 1 = Bus 0 ownership has been given to processor |
|
1302 |
|
1303 Bit 9: |
|
1304 * 0 = No change in ownership of storage on bus 1 |
|
1305 * 1 = Bus 1 ownership has been given to processor |
|
1306 |
|
1307 Description |
|
1308 When the P port asks for control of a particular media, West Bridge may be able to release the |
|
1309 media immediately. West Bridge may also need to complete the flush of buffers before releasing |
|
1310 the media. In the later case, West Bridge will indicated a release is not possible immediately |
|
1311 and West Bridge will send this request to the P port when the release has been completed. |
|
1312 */ |
|
1313 #define CY_RQT_ANTIOCH_RELEASE (11) |
|
1314 |
|
1315 /* Summary |
|
1316 This request is sent by the Processor to enable/disable the handling of SD card |
|
1317 detection and SD card write protection by the firmware. |
|
1318 |
|
1319 Direction |
|
1320 P Port Processor -> West Bridge |
|
1321 |
|
1322 Length (in transfers) |
|
1323 1 |
|
1324 |
|
1325 Mailbox0 |
|
1326 * Context = 2 |
|
1327 * Request code = 12 |
|
1328 |
|
1329 D0 |
|
1330 Bit 8: Enable/disable handling of card detection. |
|
1331 Bit 1: SDAT_3 = 0, GIPO_0 = 1 |
|
1332 Bit 0: Enable/disable handling of write protection. |
|
1333 |
|
1334 Description |
|
1335 This request is sent by the Processor to enable/disable the handling of SD card |
|
1336 detection and SD card write protection by the firmware. |
|
1337 */ |
|
1338 #define CY_RQT_SD_INTERFACE_CONTROL (12) |
|
1339 |
|
1340 /* Summary |
|
1341 Request from the processor to read a register on the SD card, and return the |
|
1342 contents. |
|
1343 |
|
1344 Direction |
|
1345 P Port Processor -> West Bridge |
|
1346 |
|
1347 Length (in transfers) |
|
1348 1 |
|
1349 |
|
1350 Mailbox0 |
|
1351 * Context = 2 |
|
1352 * Request code = 13 |
|
1353 |
|
1354 D0 |
|
1355 Bits 12 - 15 : MediaType |
|
1356 * 0 = Reserved |
|
1357 * 1 = SDIO Flash |
|
1358 * 2 = MMC Flash |
|
1359 * 3 = Reserved |
|
1360 |
|
1361 Bits 8 - 11 : Zero based device index |
|
1362 Bits 0 - 7 : Type of register to read |
|
1363 |
|
1364 Description |
|
1365 This request is sent by the processor to instruct the West Bridge to read a register |
|
1366 on the SD/MMC card, and send the contents back through the CY_RESP_SD_REGISTER_DATA |
|
1367 response. |
|
1368 */ |
|
1369 #define CY_RQT_SD_REGISTER_READ (13) |
|
1370 |
|
1371 /* Summary |
|
1372 Check if the SD/MMC card connected to West Bridge is password locked. |
|
1373 |
|
1374 Direction |
|
1375 P Port Processor -> West Bridge |
|
1376 |
|
1377 Length (in transfers) |
|
1378 1 |
|
1379 |
|
1380 Mailbox0 |
|
1381 * Context = 2 |
|
1382 * Request code = 14 |
|
1383 |
|
1384 D0 |
|
1385 Bits 12 - 15 : Bus index |
|
1386 Bits 8 - 11 : Zero based device index |
|
1387 |
|
1388 Description |
|
1389 This request is sent by the processor to check if the SD/MMC connected to the West Bridge |
|
1390 is locked with a password. |
|
1391 */ |
|
1392 #define CY_RQT_CHECK_CARD_LOCK (14) |
|
1393 |
|
1394 /* Summary |
|
1395 This command returns the total number of logical devices on the given bus |
|
1396 |
|
1397 Direction |
|
1398 P Port Processor -> West Bridge |
|
1399 |
|
1400 Length (in transfers) |
|
1401 1 |
|
1402 |
|
1403 MailBox0 |
|
1404 * Context = 2 |
|
1405 * Request Code = 15 |
|
1406 |
|
1407 D0 |
|
1408 Bits 12 - 15 : Bus Number |
|
1409 |
|
1410 Bits 0 - 11: Not Used |
|
1411 |
|
1412 Responses |
|
1413 * CY_RESP_BUS_DESCRIPTOR |
|
1414 * CY_RESP_NO_SUCH_BUS |
|
1415 */ |
|
1416 #define CY_RQT_QUERY_BUS (15) |
|
1417 |
|
1418 /* Summary |
|
1419 Divide a storage device into two partitions. |
|
1420 |
|
1421 Direction |
|
1422 P Port Processor -> West Bridge |
|
1423 |
|
1424 Length (in transfers) |
|
1425 1 |
|
1426 |
|
1427 MailBox0 |
|
1428 * Context = 2 |
|
1429 * Request code = 16 |
|
1430 |
|
1431 D0 |
|
1432 Bits 12 - 15 : Bus number |
|
1433 Bits 8 - 11 : Device number |
|
1434 Bits 0 - 7 : Not used |
|
1435 |
|
1436 D1 |
|
1437 Size of partition 0 (MS word) |
|
1438 |
|
1439 D2 |
|
1440 Size of partition 0 (LS word) |
|
1441 |
|
1442 Responses |
|
1443 * CY_RESP_SUCCESS_FAILURE |
|
1444 */ |
|
1445 #define CY_RQT_PARTITION_STORAGE (16) |
|
1446 |
|
1447 /* Summary |
|
1448 Remove the partition table and unify all partitions on a storage device. |
|
1449 |
|
1450 Direction |
|
1451 P Port Processor -> West Bridge |
|
1452 |
|
1453 Length (in transfers) |
|
1454 1 |
|
1455 |
|
1456 MailBox0 |
|
1457 * Context = 2 |
|
1458 * Request code = 17 |
|
1459 |
|
1460 D0 |
|
1461 Bits 12 - 15 : Bus number |
|
1462 Bits 8 - 11 : Device number |
|
1463 |
|
1464 Responses |
|
1465 * CY_RESP_SUCCESS_FAILURE |
|
1466 */ |
|
1467 #define CY_RQT_PARTITION_ERASE (17) |
|
1468 |
|
1469 /* Summary |
|
1470 Requests the current transfer amount. |
|
1471 |
|
1472 Direction |
|
1473 P Port Processor -> West Bridge |
|
1474 |
|
1475 Length (in transfers) |
|
1476 1 |
|
1477 |
|
1478 MailBox0 |
|
1479 * Context = 2 |
|
1480 * Request code = 18 |
|
1481 |
|
1482 D0 |
|
1483 Bits 12 - 15 : Bus number |
|
1484 Bits 8 - 11 : Device number |
|
1485 |
|
1486 Responses |
|
1487 * CY_RESP_TRANSFER_COUNT |
|
1488 */ |
|
1489 #define CY_RQT_GET_TRANSFER_AMOUNT (18) |
|
1490 |
|
1491 /* Summary |
|
1492 Erases. |
|
1493 |
|
1494 Direction |
|
1495 P Port Processor -> West Bridge |
|
1496 |
|
1497 Length (in transfers) |
|
1498 2 |
|
1499 |
|
1500 MailBox0 |
|
1501 * Context = 2 |
|
1502 * Request code = 19 |
|
1503 |
|
1504 D0 |
|
1505 Bits 12 - 15 : Bus index |
|
1506 Bits 8 - 11 : Zero based device index |
|
1507 Bits 0 - 7 : Zero based unit index |
|
1508 |
|
1509 D1 |
|
1510 Upper 16 bits of erase unit |
|
1511 |
|
1512 D2 |
|
1513 Lower 16 bits of erase unit |
|
1514 |
|
1515 D3 |
|
1516 BIT 8 - 15 : Upper 8 bits of Number of erase units |
|
1517 BIT 0 - 7 : Reserved |
|
1518 |
|
1519 * D4 * |
|
1520 BIT 8 - 15 : Lower 8 bits of Number of erase units |
|
1521 BIT 0 - 7 : Not Used |
|
1522 |
|
1523 Responses |
|
1524 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1525 */ |
|
1526 #define CY_RQT_ERASE (19) |
|
1527 |
|
1528 /* Summary |
|
1529 This command reads 1 byte from an SDIO card. |
|
1530 |
|
1531 Direction |
|
1532 P Port Processor -> West Bridge |
|
1533 |
|
1534 Length (in transfers) |
|
1535 1 |
|
1536 |
|
1537 MailBox0 |
|
1538 * Context = 2 |
|
1539 * Request Code = 23 |
|
1540 |
|
1541 D0 |
|
1542 Bits 12 - 15 : Bus index |
|
1543 Bits 8 - 11 : Zero based device index |
|
1544 Bits 0 - 7 : Zero based function number |
|
1545 |
|
1546 D1 |
|
1547 Bits 8 - 15 : 0 |
|
1548 Bit 7 : 0 to indicate a read |
|
1549 Bits 4 - 6 : Function number |
|
1550 Bit 3 : 0 |
|
1551 Bit 2 : 1 if SDIO interrupt needs to be re-enabled. |
|
1552 Bits 0 - 1 : Two Most significant bits of Read address |
|
1553 |
|
1554 D2 |
|
1555 Bits 1 - 15 : 15 Least significant bits of Read address |
|
1556 Bit 0 : 0 |
|
1557 |
|
1558 |
|
1559 Responses |
|
1560 * CY_RESP_SUCCESS_FAILURE |
|
1561 * CY_RESP_SDIO_DIRECT |
|
1562 */ |
|
1563 #define CY_RQT_SDIO_READ_DIRECT (23) |
|
1564 |
|
1565 /* Summary |
|
1566 This command writes 1 byte to an SDIO card. |
|
1567 |
|
1568 Direction |
|
1569 P Port Processor -> West Bridge |
|
1570 |
|
1571 Length (in transfers) |
|
1572 1 |
|
1573 |
|
1574 MailBox0 |
|
1575 * Context = 2 |
|
1576 * Request Code = 24 |
|
1577 |
|
1578 D0 |
|
1579 Bits 12 - 15 : Bus index |
|
1580 Bits 8 - 11 : Zero based device index |
|
1581 Bits 0 - 7 : Zero based function number |
|
1582 |
|
1583 D1 |
|
1584 Bits 8 - 15 : Data to write |
|
1585 Bit 7 : 1 to indicate a write |
|
1586 Bits 4 - 6 : Function number |
|
1587 Bit 3 : 1 if Read after write is enabled |
|
1588 Bit 2 : 1 if SDIO interrupt needs to be re-enabled. |
|
1589 Bits 0 - 1 : Two Most significant bits of write address |
|
1590 |
|
1591 D2 |
|
1592 Bits 1 - 15 : 15 Least significant bits of write address |
|
1593 Bit 0 : 0 |
|
1594 |
|
1595 |
|
1596 Responses |
|
1597 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1598 * CY_RESP_SDIO_DIRECT |
|
1599 */ |
|
1600 #define CY_RQT_SDIO_WRITE_DIRECT (24) |
|
1601 |
|
1602 /* Summary |
|
1603 This command reads performs a multi block/byte read from an SDIO card. |
|
1604 |
|
1605 Direction |
|
1606 P Port Processor -> West Bridge |
|
1607 |
|
1608 Length (in transfers) |
|
1609 1 |
|
1610 |
|
1611 MailBox0 |
|
1612 * Context = 2 |
|
1613 * Request Code = 25 |
|
1614 |
|
1615 D0 |
|
1616 Bits 12 - 15 : Bus index |
|
1617 Bits 8 - 11 : Zero based device index |
|
1618 Bits 0 - 7 : Zero based function number |
|
1619 |
|
1620 D1 |
|
1621 Bit 15 : 0 to indicate a read |
|
1622 Bit 12 - 14 : Function Number |
|
1623 Bit 11 : Block Mode |
|
1624 Bit 10 : OpCode |
|
1625 Bits 0 - 9 : 10 Most significant bits of Read address |
|
1626 |
|
1627 D2 |
|
1628 Bits 9 - 15 : 7 Least significant bits of address |
|
1629 Bits 0 - 8 : Block/Byte Count |
|
1630 |
|
1631 |
|
1632 Responses |
|
1633 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1634 * CY_RESP_SDIO_EXT |
|
1635 */ |
|
1636 #define CY_RQT_SDIO_READ_EXTENDED (25) |
|
1637 |
|
1638 /* Summary |
|
1639 This command reads performs a multi block/byte write to an SDIO card. |
|
1640 |
|
1641 Direction |
|
1642 P Port Processor -> West Bridge |
|
1643 |
|
1644 Length (in transfers) |
|
1645 1 |
|
1646 |
|
1647 MailBox0 |
|
1648 * Context = 2 |
|
1649 * Request Code = 26 |
|
1650 |
|
1651 D0 |
|
1652 Bits 12 - 15 : Bus index |
|
1653 Bits 8 - 11 : Zero based device index |
|
1654 Bits 0 - 7 : Zero based function number |
|
1655 |
|
1656 D1 |
|
1657 Bit 15 : 1 to indicate a write |
|
1658 Bit 12 - 14 : Function Number |
|
1659 Bit 11 : Block Mode |
|
1660 Bit 10 : OpCode |
|
1661 Bits 0 - 9 : 10 Most significant bits of Read address |
|
1662 |
|
1663 D2 |
|
1664 Bits 9 - 15 : 7 Least significant bits of address |
|
1665 Bits 0 - 8 : Block/Byte Count |
|
1666 |
|
1667 |
|
1668 Responses |
|
1669 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1670 * CY_RESP_SDIO_EXT |
|
1671 */ |
|
1672 #define CY_RQT_SDIO_WRITE_EXTENDED (26) |
|
1673 |
|
1674 /* Summary |
|
1675 This command initialises an IO function on the SDIO card. |
|
1676 |
|
1677 Direction |
|
1678 P Port Processor -> West Bridge |
|
1679 |
|
1680 Length (in transfers) |
|
1681 1 |
|
1682 |
|
1683 MailBox0 |
|
1684 * Context = 2 |
|
1685 * Request Code = 27 |
|
1686 |
|
1687 D0 |
|
1688 Bits 12 - 15 : Bus index |
|
1689 Bits 8 - 11 : Zero based device index |
|
1690 Bits 0 - 7 : Zero based function number |
|
1691 |
|
1692 |
|
1693 Responses |
|
1694 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1695 */ |
|
1696 #define CY_RQT_SDIO_INIT_FUNCTION (27) |
|
1697 |
|
1698 /* Summary |
|
1699 This command gets properties of the SDIO card. |
|
1700 |
|
1701 Direction |
|
1702 P Port Processor -> West Bridge |
|
1703 |
|
1704 Length (in transfers) |
|
1705 1 |
|
1706 |
|
1707 MailBox0 |
|
1708 * Context = 2 |
|
1709 * Request Code = 28 |
|
1710 |
|
1711 D0 |
|
1712 Bits 12 - 15 : Bus index |
|
1713 Bits 8 - 11 : Zero based device index |
|
1714 Bits 0 - 7 : Zero |
|
1715 |
|
1716 Responses |
|
1717 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1718 * CY_RESP_QUERY_CARD |
|
1719 */ |
|
1720 #define CY_RQT_SDIO_QUERY_CARD (28) |
|
1721 |
|
1722 /* Summary |
|
1723 This command reads a tuple from the CIS of an SDIO card. |
|
1724 |
|
1725 Direction |
|
1726 P Port Processor -> West Bridge |
|
1727 |
|
1728 Length (in transfers) |
|
1729 1 |
|
1730 |
|
1731 MailBox0 |
|
1732 * Context = 2 |
|
1733 * Request Code = 29 |
|
1734 |
|
1735 D0 |
|
1736 Bits 12 - 15 : Bus index |
|
1737 Bits 8 - 11 : Zero based device index |
|
1738 Bits 0 - 7 : Zero based function number |
|
1739 |
|
1740 D1 |
|
1741 Bits 8 - 15 : Tuple ID to read |
|
1742 |
|
1743 Responses |
|
1744 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1745 * CY_RESP_SDIO_GET_TUPLE |
|
1746 */ |
|
1747 #define CY_RQT_SDIO_GET_TUPLE (29) |
|
1748 |
|
1749 /* Summary |
|
1750 This command Aborts an IO operation. |
|
1751 |
|
1752 Direction |
|
1753 P Port Processor -> West Bridge |
|
1754 |
|
1755 Length (in transfers) |
|
1756 1 |
|
1757 |
|
1758 MailBox0 |
|
1759 * Context = 2 |
|
1760 * Request Code = 30 |
|
1761 |
|
1762 D0 |
|
1763 Bits 12 - 15 : Bus index |
|
1764 Bits 8 - 11 : Zero based device index |
|
1765 Bits 0 - 7 : Zero based function number |
|
1766 |
|
1767 |
|
1768 Responses |
|
1769 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1770 */ |
|
1771 #define CY_RQT_SDIO_ABORT_IO (30) |
|
1772 |
|
1773 /* Summary |
|
1774 SDIO Interrupt request sent to the processor from the West Bridge device. |
|
1775 |
|
1776 Direction |
|
1777 West Bridge ->P Port Processor |
|
1778 |
|
1779 Length (in transfers) |
|
1780 1 |
|
1781 |
|
1782 MailBox0 |
|
1783 * Context = 2 |
|
1784 * Request Code = 31 |
|
1785 |
|
1786 D0 |
|
1787 Bits 0 - 7 : Bus Index |
|
1788 |
|
1789 Responses |
|
1790 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1791 */ |
|
1792 #define CY_RQT_SDIO_INTR (31) |
|
1793 |
|
1794 /* Summary |
|
1795 This command Suspends an IO operation. |
|
1796 |
|
1797 Direction |
|
1798 P Port Processor -> West Bridge |
|
1799 |
|
1800 Length (in transfers) |
|
1801 1 |
|
1802 |
|
1803 MailBox0 |
|
1804 * Context = 2 |
|
1805 * Request Code = 32 |
|
1806 |
|
1807 D0 |
|
1808 Bits 12 - 15 : Bus index |
|
1809 Bits 8 - 11 : Zero based device index |
|
1810 Bits 0 - 7 : Zero based function number |
|
1811 |
|
1812 Responses |
|
1813 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1814 */ |
|
1815 #define CY_RQT_SDIO_SUSPEND (32) |
|
1816 |
|
1817 /* Summary |
|
1818 This command resumes a suspended operation. |
|
1819 |
|
1820 Direction |
|
1821 P Port Processor -> West Bridge |
|
1822 |
|
1823 Length (in transfers) |
|
1824 1 |
|
1825 |
|
1826 MailBox0 |
|
1827 * Context = 2 |
|
1828 * Request Code = 33 |
|
1829 |
|
1830 D0 |
|
1831 Bits 12 - 15 : Bus index |
|
1832 Bits 8 - 11 : Zero based device index |
|
1833 Bits 0 - 7 : Zero based function number |
|
1834 |
|
1835 Responses |
|
1836 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1837 * CY_RESP_SDIO_RESUME |
|
1838 */ |
|
1839 #define CY_RQT_SDIO_RESUME (33) |
|
1840 |
|
1841 /* Summary |
|
1842 This command resets an SDIO device. |
|
1843 |
|
1844 Direction |
|
1845 P Port Processor -> West Bridge |
|
1846 |
|
1847 Length (in transfers) |
|
1848 1 |
|
1849 |
|
1850 MailBox0 |
|
1851 * Context = 2 |
|
1852 * Request Code = 34 |
|
1853 |
|
1854 D0 |
|
1855 Bits 12 - 15 : Bus index |
|
1856 Bits 8 - 11 : Zero based device index |
|
1857 Bits 0 - 7 : 0 |
|
1858 |
|
1859 Responses |
|
1860 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1861 */ |
|
1862 #define CY_RQT_SDIO_RESET_DEV (34) |
|
1863 |
|
1864 /* Summary |
|
1865 This command asks the API to start the DMA transfer for a P2S operation. |
|
1866 |
|
1867 Direction |
|
1868 West Bridge -> P Port Processor |
|
1869 |
|
1870 Length (in transfers) |
|
1871 1 |
|
1872 |
|
1873 MailBox0 |
|
1874 * Context = 2 |
|
1875 * Request code = 35 |
|
1876 |
|
1877 Responses |
|
1878 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
1879 */ |
|
1880 #define CY_RQT_P2S_DMA_START (35) |
|
1881 |
|
1882 /******************************************************/ |
|
1883 |
|
1884 /*@@Storage responses |
|
1885 Summary |
|
1886 The storage responses include: |
|
1887 * CY_RESP_MEDIA_CLAIMED_RELEASED |
|
1888 * CY_RESP_MEDIA_DESCRIPTOR |
|
1889 * CY_RESP_DEVICE_DESCRIPTOR |
|
1890 * CY_RESP_UNIT_DESCRIPTOR |
|
1891 * CY_RESP_ANTIOCH_DEFERRED_ERROR |
|
1892 * CY_RESP_SD_REGISTER_DATA |
|
1893 * CY_RESP_SD_LOCK_STATUS |
|
1894 * CY_RESP_BUS_DESCRIPTOR |
|
1895 * CY_RESP_TRANSFER_COUNT |
|
1896 * CY_RESP_SDIO_EXT |
|
1897 * CY_RESP_SDIO_INIT_FUNCTION |
|
1898 * CY_RESP_SDIO_QUERY_CARD |
|
1899 * CY_RESP_SDIO_GET_TUPLE |
|
1900 * CY_RESP_SDIO_DIRECT |
|
1901 * CY_RESP_SDIO_INVALID_FUNCTION |
|
1902 * CY_RESP_SDIO_RESUME |
|
1903 */ |
|
1904 |
|
1905 /* Summary |
|
1906 Based on the request sent, the state of a given media was changed as indicated |
|
1907 by this response. |
|
1908 |
|
1909 Direction |
|
1910 West Bridge -> P Port Processor |
|
1911 |
|
1912 Length (in transfers) |
|
1913 1 |
|
1914 |
|
1915 MailBox0 |
|
1916 * Context = 2 |
|
1917 * Response Code = 16 |
|
1918 |
|
1919 D0 |
|
1920 Bits 12 - 15 : Bus index |
|
1921 Bits 8 - 11 : Zero based device index |
|
1922 |
|
1923 D1 |
|
1924 State of Media |
|
1925 * 0 = released |
|
1926 * 1 = claimed |
|
1927 */ |
|
1928 #define CY_RESP_MEDIA_CLAIMED_RELEASED (16) |
|
1929 |
|
1930 |
|
1931 /* Summary |
|
1932 This response gives the number of physical devices associated with a given |
|
1933 media type. |
|
1934 |
|
1935 Direction |
|
1936 West Bridge -> P Port Processor |
|
1937 |
|
1938 Length (in transfers) |
|
1939 1 |
|
1940 |
|
1941 MailBox0 |
|
1942 * Context = 2 |
|
1943 * Response Code = 17 |
|
1944 |
|
1945 D0 |
|
1946 Media Type |
|
1947 Bits 12 - 15 |
|
1948 * 0 = NAND |
|
1949 * 1 = SDIO Flash |
|
1950 * 2 = MMC Flash |
|
1951 * 3 = CE-ATA |
|
1952 |
|
1953 D1 |
|
1954 Number of devices |
|
1955 */ |
|
1956 #define CY_RESP_MEDIA_DESCRIPTOR (17) |
|
1957 |
|
1958 |
|
1959 /* Summary |
|
1960 This response gives description of a physical device. |
|
1961 |
|
1962 Direction |
|
1963 West Bridge -> P Port Processor |
|
1964 |
|
1965 Length (in transfers) |
|
1966 2 |
|
1967 |
|
1968 MailBox0 |
|
1969 * Context = 2 |
|
1970 * Response Code = 18 |
|
1971 |
|
1972 D0 |
|
1973 Bits 12 - 15 : Bus index |
|
1974 Bits 8 - 11 : Zero based device index |
|
1975 Bits 0 - 7 : Type of media present on bus |
|
1976 |
|
1977 D1 |
|
1978 Block Size in bytes |
|
1979 |
|
1980 D2 |
|
1981 Bit 15 : Is device removable |
|
1982 Bit 9 : Is device password locked |
|
1983 Bit 8 : Is device writeable |
|
1984 Bits 0 - 7 : Number Of Units |
|
1985 |
|
1986 D3 |
|
1987 ERASE_UNIT_SIZE high 16 bits |
|
1988 |
|
1989 D4 |
|
1990 ERASE_UNIT_SIZE low 16 bits |
|
1991 |
|
1992 */ |
|
1993 #define CY_RESP_DEVICE_DESCRIPTOR (18) |
|
1994 |
|
1995 |
|
1996 /* Summary |
|
1997 This response gives description of a unit on a physical device. |
|
1998 |
|
1999 Direction |
|
2000 West Bridge -> P Port Processor |
|
2001 |
|
2002 Length (in transfers) |
|
2003 6 |
|
2004 |
|
2005 MailBox0 |
|
2006 * Context = 2 |
|
2007 * Response Code = 19 |
|
2008 |
|
2009 D0 |
|
2010 Bits 12 - 15 : Bus index |
|
2011 Bits 8 - 11 : Zero based device index |
|
2012 Bits 0 - 7 : Zero based unit index |
|
2013 |
|
2014 D1 |
|
2015 Bits 0 - 7 : Media type |
|
2016 * 1 = NAND |
|
2017 * 2 = SD FLASH |
|
2018 * 4 = MMC FLASH |
|
2019 * 8 = CEATA |
|
2020 * 16 = SD IO |
|
2021 |
|
2022 D2 |
|
2023 Block Size in bytes |
|
2024 |
|
2025 D3 |
|
2026 Start Block Low 16 bits |
|
2027 |
|
2028 D4 |
|
2029 Start Block High 16 bits |
|
2030 |
|
2031 D5 |
|
2032 Unit Size Low 16 bits |
|
2033 |
|
2034 D6 |
|
2035 Unit Size High 16 bits |
|
2036 */ |
|
2037 #define CY_RESP_UNIT_DESCRIPTOR (19) |
|
2038 |
|
2039 |
|
2040 /* Summary |
|
2041 This response is sent as error status for P2S |
|
2042 Storage operation. |
|
2043 |
|
2044 Direction |
|
2045 West Bridge -> P Port Processor |
|
2046 |
|
2047 Length (in transfers) |
|
2048 2 |
|
2049 |
|
2050 Mailbox0 |
|
2051 * Context = 2 |
|
2052 * Request Code = 20 |
|
2053 |
|
2054 D0 |
|
2055 Bit 8 : Type of operation (Read / Write) |
|
2056 Bits 7 - 0 : Error code |
|
2057 |
|
2058 D1 |
|
2059 Bits 12 - 15 : Bus index |
|
2060 Bits 8 - 11 : Zero based device index |
|
2061 Bits 0 - 7 : Zero based unit index |
|
2062 |
|
2063 *D2 - D3* |
|
2064 Address where the error occurred. |
|
2065 |
|
2066 D4 |
|
2067 Length of the operation in blocks. |
|
2068 |
|
2069 Description |
|
2070 This error is returned by the West Bridge to the processor if a |
|
2071 storage operation fails due to a medium error. |
|
2072 */ |
|
2073 #define CY_RESP_ANTIOCH_DEFERRED_ERROR (20) |
|
2074 |
|
2075 /* Summary |
|
2076 Contents of a register on the SD/MMC card connected to West Bridge. |
|
2077 |
|
2078 Direction |
|
2079 West Bridge -> P Port Processor |
|
2080 |
|
2081 Length (in transfers) |
|
2082 Variable |
|
2083 |
|
2084 Mailbox0 |
|
2085 * Context = 2 |
|
2086 * Request code = 21 |
|
2087 |
|
2088 D0 |
|
2089 Length of data in bytes |
|
2090 |
|
2091 D1 - Dn |
|
2092 The register contents |
|
2093 |
|
2094 Description |
|
2095 This is the response to a CY_RQT_SD_REGISTER_READ request. |
|
2096 */ |
|
2097 #define CY_RESP_SD_REGISTER_DATA (21) |
|
2098 |
|
2099 /* Summary |
|
2100 Status of whether the SD card is password locked. |
|
2101 |
|
2102 Direction |
|
2103 West Bridge -> P Port Processor |
|
2104 |
|
2105 Length (in transfers) |
|
2106 1 |
|
2107 |
|
2108 Mailbox0 |
|
2109 * Context = 2 |
|
2110 * Request code = 22 |
|
2111 |
|
2112 D0 |
|
2113 Bit 0 : The card's lock status |
|
2114 |
|
2115 Description |
|
2116 Status of whether the SD card is password locked. |
|
2117 */ |
|
2118 #define CY_RESP_SD_LOCK_STATUS (22) |
|
2119 |
|
2120 |
|
2121 /* Summary |
|
2122 This response gives the types of physical devices attached to a given bus. |
|
2123 |
|
2124 Direction |
|
2125 West Bridge -> P Port Processor |
|
2126 |
|
2127 Length (in transfers) |
|
2128 1 |
|
2129 |
|
2130 MailBox0 |
|
2131 * Context = 2 |
|
2132 * Response Code = 23 |
|
2133 |
|
2134 D0 |
|
2135 Bus Number |
|
2136 Bits 12 - 15 |
|
2137 |
|
2138 D1 |
|
2139 Media present on addressed bus |
|
2140 */ |
|
2141 #define CY_RESP_BUS_DESCRIPTOR (23) |
|
2142 |
|
2143 /* Summary |
|
2144 Amount of data read/written through the USB mass storage/MTP device. |
|
2145 |
|
2146 Direction |
|
2147 West Bridge -> P Port Processor |
|
2148 |
|
2149 Length (in transfers) |
|
2150 2 |
|
2151 |
|
2152 MailBox0 |
|
2153 * Context = 2 |
|
2154 * Request code = 24 |
|
2155 |
|
2156 D0 |
|
2157 MS 16 bits of number of sectors written |
|
2158 |
|
2159 D1 |
|
2160 LS 16 bits of number of sectors written |
|
2161 |
|
2162 D2 |
|
2163 MS 16 bits of number of sectors read |
|
2164 |
|
2165 D3 |
|
2166 LS 16 bits of number of sectors read |
|
2167 |
|
2168 Description |
|
2169 This is the response to the CY_RQT_GET_TRANSFER_AMOUNT request, and |
|
2170 represents the number of sectors of data that has been written to or |
|
2171 read from the storage device through the USB Mass storage or MTP |
|
2172 interface. |
|
2173 */ |
|
2174 #define CY_RESP_TRANSFER_COUNT (24) |
|
2175 |
|
2176 /* Summary |
|
2177 Status of SDIO Extended read/write operation. |
|
2178 |
|
2179 Direction |
|
2180 West Bridge -> P Port Processor |
|
2181 |
|
2182 Length (in transfers) |
|
2183 1 |
|
2184 |
|
2185 Mailbox0 |
|
2186 * Context = 2 |
|
2187 * Request code = 34 |
|
2188 |
|
2189 D0 |
|
2190 Bit 8 : 1 if Read response, 0 if write response |
|
2191 Bits 0-7: Error Status |
|
2192 |
|
2193 Description |
|
2194 Status of SDIO Extended read write operation. |
|
2195 */ |
|
2196 |
|
2197 #define CY_RESP_SDIO_EXT (34) |
|
2198 |
|
2199 /* Summary |
|
2200 Status of SDIO operation to Initialize a function |
|
2201 |
|
2202 Direction |
|
2203 West Bridge -> P Port Processor |
|
2204 |
|
2205 Length (in transfers) |
|
2206 2 |
|
2207 |
|
2208 Mailbox0 |
|
2209 * Context = 2 |
|
2210 * Request code = 35 |
|
2211 |
|
2212 |
|
2213 D0 |
|
2214 Bits 8-15 : Function Interface Code |
|
2215 Bits 0-7: Extended Function Interface Code |
|
2216 |
|
2217 D1 |
|
2218 Bits 0-15 : Function Block Size |
|
2219 |
|
2220 D2 |
|
2221 Bits 0-15 : Most significant Word of Function PSN |
|
2222 |
|
2223 D3 |
|
2224 Bits 0-15 : Least significant Word of Function PSN |
|
2225 |
|
2226 D4 |
|
2227 Bit 15 : CSA Enabled Status |
|
2228 Bit 14 : CSA Support Status |
|
2229 Bit 9 : CSA No Format Status |
|
2230 Bit 8 : CSA Write Protect Status |
|
2231 Bit 0 : Function Wake Up Support status |
|
2232 |
|
2233 Description |
|
2234 Status of SDIO Function Initialization operation. |
|
2235 */ |
|
2236 #define CY_RESP_SDIO_INIT_FUNCTION (35) |
|
2237 |
|
2238 /* Summary |
|
2239 Status of SDIO operation to query the Card |
|
2240 |
|
2241 Direction |
|
2242 West Bridge -> P Port Processor |
|
2243 |
|
2244 Length (in transfers) |
|
2245 2 |
|
2246 |
|
2247 Mailbox0 |
|
2248 * Context = 2 |
|
2249 * Request code = 36 |
|
2250 |
|
2251 |
|
2252 D0 |
|
2253 Bits 8-15 : Number of IO functions present |
|
2254 Bit 0: 1 if memory is present |
|
2255 |
|
2256 D1 |
|
2257 Bits 0-15 : Card Manufacturer ID |
|
2258 |
|
2259 D2 |
|
2260 Bits 0-15 : Card Manufacturer Additional Information |
|
2261 |
|
2262 D3 |
|
2263 Bits 0-15 : Function 0 Block Size |
|
2264 |
|
2265 D4 |
|
2266 Bits 8-15 :SDIO Card Capability register |
|
2267 Bits 0-7: SDIO Version |
|
2268 |
|
2269 |
|
2270 Description |
|
2271 Status of SDIO Card Query operation. |
|
2272 */ |
|
2273 #define CY_RESP_SDIO_QUERY_CARD (36) |
|
2274 /* Summary |
|
2275 Status of SDIO CIS read operation |
|
2276 |
|
2277 Direction |
|
2278 West Bridge -> P Port Processor |
|
2279 |
|
2280 Length (in transfers) |
|
2281 1 |
|
2282 |
|
2283 Mailbox0 |
|
2284 * Context = 2 |
|
2285 * Request code = 37 |
|
2286 |
|
2287 D0 |
|
2288 Bit 8 : 1 |
|
2289 Bits 0-7: Error Status |
|
2290 |
|
2291 D1 |
|
2292 Bits 0 - 7 : Size of data read. |
|
2293 |
|
2294 Description |
|
2295 Status of SDIO Get Tuple Read operation. |
|
2296 */ |
|
2297 #define CY_RESP_SDIO_GET_TUPLE (37) |
|
2298 |
|
2299 /* Summary |
|
2300 Status of SDIO Direct read/write operation. |
|
2301 |
|
2302 Direction |
|
2303 West Bridge -> P Port Processor |
|
2304 |
|
2305 Length (in transfers) |
|
2306 1 |
|
2307 |
|
2308 Mailbox0 |
|
2309 * Context = 2 |
|
2310 * Request code = 38 |
|
2311 |
|
2312 D0 |
|
2313 Bit 8 : Error Status |
|
2314 Bits 0-7: Data Read(If any) |
|
2315 |
|
2316 Description |
|
2317 Status of SDIO Direct read write operation. |
|
2318 |
|
2319 */ |
|
2320 #define CY_RESP_SDIO_DIRECT (38) |
|
2321 |
|
2322 /* Summary |
|
2323 Indicates an un-initialized function has been used for IO |
|
2324 |
|
2325 Direction |
|
2326 West Bridge -> P Port Processor |
|
2327 |
|
2328 Length (in transfers) |
|
2329 1 |
|
2330 |
|
2331 Mailbox0 |
|
2332 * Context = 2 |
|
2333 * Request code = 39 |
|
2334 |
|
2335 Description |
|
2336 Indicates an IO request on an uninitialized function. |
|
2337 */ |
|
2338 #define CY_RESP_SDIO_INVALID_FUNCTION (39) |
|
2339 |
|
2340 /* Summary |
|
2341 Response to a Resume request |
|
2342 |
|
2343 Direction |
|
2344 West Bridge -> P Port Processor |
|
2345 |
|
2346 Length (in transfers) |
|
2347 1 |
|
2348 |
|
2349 Mailbox0 |
|
2350 * Context = 2 |
|
2351 * Request code = 40 |
|
2352 |
|
2353 D0 |
|
2354 Bits 8-15 : Error Status |
|
2355 Bit 0: 1 if data is available. 0 otherwise. |
|
2356 |
|
2357 Description |
|
2358 Response to a Resume request. Indicates if data is available after resum or not. |
|
2359 */ |
|
2360 #define CY_RESP_SDIO_RESUME (40) |
|
2361 |
|
2362 /******************************************************/ |
|
2363 |
|
2364 /*@@USB requests |
|
2365 Summary |
|
2366 The USB requests include: |
|
2367 * CY_RQT_START_USB |
|
2368 * CY_RQT_STOP_USB |
|
2369 * CY_RQT_SET_CONNECT_STATE |
|
2370 * CY_RQT_GET_CONNECT_STATE |
|
2371 * CY_RQT_SET_USB_CONFIG |
|
2372 * CY_RQT_GET_USB_CONFIG |
|
2373 * CY_RQT_STALL_ENDPOINT |
|
2374 * CY_RQT_GET_STALL |
|
2375 * CY_RQT_SET_DESCRIPTOR |
|
2376 * CY_RQT_GET_DESCRIPTOR |
|
2377 * CY_RQT_SET_USB_CONFIG_REGISTERS |
|
2378 * CY_RQT_USB_EVENT |
|
2379 * CY_RQT_USB_EP_DATA |
|
2380 * CY_RQT_ENDPOINT_SET_NAK |
|
2381 * CY_RQT_GET_ENDPOINT_NAK |
|
2382 * CY_RQT_ACK_SETUP_PACKET |
|
2383 * CY_RQT_SCSI_INQUIRY_COMMAND |
|
2384 * CY_RQT_SCSI_START_STOP_COMMAND |
|
2385 * CY_RQT_SCSI_UNKNOWN_COMMAND |
|
2386 * CY_RQT_USB_REMOTE_WAKEUP |
|
2387 * CY_RQT_CLEAR_DESCRIPTORS |
|
2388 * CY_RQT_USB_STORAGE_MONITOR |
|
2389 * CY_RQT_USB_ACTIVITY_UPDATE |
|
2390 * CY_RQT_MS_PARTITION_SELECT |
|
2391 */ |
|
2392 #ifndef __doxygen__ |
|
2393 #define CY_RQT_USB_RQT_CONTEXT (3) |
|
2394 #endif |
|
2395 |
|
2396 /* Summary |
|
2397 This command requests initialization of the USB stack. |
|
2398 |
|
2399 Direction |
|
2400 P Port Processor -> West Bridge |
|
2401 |
|
2402 Length (in transfers) |
|
2403 1 |
|
2404 |
|
2405 MailBox0 |
|
2406 * Context = 3 |
|
2407 * Request Code = 0 |
|
2408 |
|
2409 Description |
|
2410 This command is required before any other USB related command can be |
|
2411 sent to the West Bridge firmware. |
|
2412 |
|
2413 Responses |
|
2414 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2415 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING |
|
2416 */ |
|
2417 #define CY_RQT_START_USB (0) |
|
2418 |
|
2419 |
|
2420 /* Summary |
|
2421 This command requests shutdown of the USB stack. |
|
2422 |
|
2423 Direction |
|
2424 P Port Processor -> West Bridge |
|
2425 |
|
2426 Length (in transfers) |
|
2427 1 |
|
2428 |
|
2429 MailBox0 |
|
2430 * Context = 3 |
|
2431 * Request Code = 1 |
|
2432 |
|
2433 Responses |
|
2434 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2435 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
2436 */ |
|
2437 #define CY_RQT_STOP_USB (1) |
|
2438 |
|
2439 |
|
2440 /* Summary |
|
2441 This command requests that the USB pins be connected or disconnected to/from |
|
2442 the West Bridge device. |
|
2443 |
|
2444 Direction |
|
2445 P Port Processor -> West Bridge |
|
2446 |
|
2447 Length (in transfers) |
|
2448 1 |
|
2449 |
|
2450 MailBox0 |
|
2451 * Context = 3 |
|
2452 * Request Code = 2 |
|
2453 |
|
2454 D0 |
|
2455 Desired Connect State |
|
2456 * 0 = DISCONNECTED |
|
2457 * 1 = CONNECTED |
|
2458 |
|
2459 Responses |
|
2460 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2461 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
2462 */ |
|
2463 #define CY_RQT_SET_CONNECT_STATE (2) |
|
2464 |
|
2465 |
|
2466 /* Summary |
|
2467 This command requests the connection state of the West Bridge USB pins. |
|
2468 |
|
2469 Direction |
|
2470 P Port Processor -> West Bridge |
|
2471 |
|
2472 Length (in transfers) |
|
2473 1 |
|
2474 |
|
2475 MailBox0 |
|
2476 * Context = 3 |
|
2477 * Request Code = 3 |
|
2478 |
|
2479 Responses |
|
2480 * CY_RESP_CONNECT_STATE |
|
2481 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
2482 */ |
|
2483 #define CY_RQT_GET_CONNECT_STATE (3) |
|
2484 |
|
2485 |
|
2486 /* Summary |
|
2487 This request configures the USB subsystem. |
|
2488 |
|
2489 Direction |
|
2490 P Port Processor -> West Bridge |
|
2491 |
|
2492 Length (in transfers) |
|
2493 2 |
|
2494 |
|
2495 MailBox0 |
|
2496 * Context = 3 |
|
2497 * Request Code = 4 |
|
2498 |
|
2499 D0 |
|
2500 Bits 8 - 15: Media to enumerate (bit mask) |
|
2501 Bits 0 - 7: Enumerate Mass Storage (bit mask) |
|
2502 * 1 = Enumerate device on bus 0 |
|
2503 * 2 = Enumerate device on bus 1 |
|
2504 |
|
2505 D1 |
|
2506 Enumeration Methodology |
|
2507 * 1 = West Bridge enumeration |
|
2508 * 0 = P Port enumeration |
|
2509 |
|
2510 D2 |
|
2511 Mass storage interface number - Interface number to be used for the mass storage interface |
|
2512 |
|
2513 D3 |
|
2514 Mass storage callbacks |
|
2515 * 1 = relay to P port |
|
2516 * 0 = completely handle in firmware |
|
2517 |
|
2518 Description |
|
2519 This indicates how enumeration should be handled. Enumeration can be handled by the |
|
2520 West Bridge device or by the P port processor. |
|
2521 |
|
2522 Responses |
|
2523 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2524 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_MASK |
|
2525 * CY_RESP_SUCCESS_FAILURE:CY_ERR_INVALID_STORAGE_MEDIA |
|
2526 */ |
|
2527 #define CY_RQT_SET_USB_CONFIG (4) |
|
2528 |
|
2529 |
|
2530 /* Summary |
|
2531 This request retrieves the current USB configuration from the West Bridge device. |
|
2532 |
|
2533 Direction |
|
2534 P Port Processor -> West Bridge |
|
2535 |
|
2536 Length (in transfers) |
|
2537 1 |
|
2538 |
|
2539 MailBox0 |
|
2540 * Context = 3 |
|
2541 * Request Code = 5 |
|
2542 |
|
2543 Responses |
|
2544 * CY_RESP_USB_CONFIG |
|
2545 */ |
|
2546 #define CY_RQT_GET_USB_CONFIG (5) |
|
2547 |
|
2548 |
|
2549 /* Summary |
|
2550 This request stalls the given endpoint. |
|
2551 |
|
2552 Direction |
|
2553 P Port Processor -> West Bridge |
|
2554 |
|
2555 Length (in transfers) |
|
2556 1 |
|
2557 |
|
2558 MailBox0 |
|
2559 * Context = 3 |
|
2560 * Request Code = 6 |
|
2561 |
|
2562 D0 |
|
2563 Endpoint Number |
|
2564 |
|
2565 D1 |
|
2566 * 1 = Stall Endpoint |
|
2567 * 0 = Clear Stall |
|
2568 |
|
2569 Responses |
|
2570 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2571 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT |
|
2572 */ |
|
2573 #define CY_RQT_STALL_ENDPOINT (6) |
|
2574 |
|
2575 |
|
2576 /* Summary |
|
2577 This request retrieves the stall status of the requested endpoint. |
|
2578 |
|
2579 Direction |
|
2580 P Port Processor -> West Bridge |
|
2581 |
|
2582 Length (in transfers) |
|
2583 1 |
|
2584 |
|
2585 MailBox0 |
|
2586 * Context = 3 |
|
2587 * Request Code = 7 |
|
2588 |
|
2589 D0 |
|
2590 Endpoint number |
|
2591 |
|
2592 Responses |
|
2593 * CY_RESP_ENDPOINT_STALL |
|
2594 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT |
|
2595 */ |
|
2596 #define CY_RQT_GET_STALL (7) |
|
2597 |
|
2598 |
|
2599 /* Summary |
|
2600 This command sets the contents of a descriptor. |
|
2601 |
|
2602 Direction |
|
2603 P Port Processor -> West Bridge |
|
2604 |
|
2605 Length (in transfers) |
|
2606 1 |
|
2607 |
|
2608 MailBox0 |
|
2609 * Context = 3 |
|
2610 * Request Code = 8 |
|
2611 |
|
2612 D0 |
|
2613 Bit 15 - Bit 8 |
|
2614 Descriptor Index |
|
2615 |
|
2616 Bit 7 - Bit 0 |
|
2617 Descriptor Type |
|
2618 * Device = 1 |
|
2619 * Device Qualifier = 2 |
|
2620 * Full Speed Configuration = 3 |
|
2621 * High Speed Configuration = 4 |
|
2622 |
|
2623 * D1 - DN * |
|
2624 Actual data for the descriptor |
|
2625 |
|
2626 Responses |
|
2627 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2628 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE |
|
2629 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX |
|
2630 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_LENGTH |
|
2631 */ |
|
2632 #define CY_RQT_SET_DESCRIPTOR (8) |
|
2633 |
|
2634 /* Summary |
|
2635 This command gets the contents of a descriptor. |
|
2636 |
|
2637 Direction |
|
2638 P Port Processor -> West Bridge |
|
2639 |
|
2640 Length (in transfers) |
|
2641 1 |
|
2642 |
|
2643 MailBox0 |
|
2644 * Context = 3 |
|
2645 * Request Code = 9 |
|
2646 |
|
2647 D0 |
|
2648 Bit 15 - Bit 8 |
|
2649 Descriptor Index |
|
2650 |
|
2651 Bit 7 - Bit 0 |
|
2652 Descriptor Type |
|
2653 * Device = 1 |
|
2654 * Device Qualifier = 2 |
|
2655 * Full Speed Configuration = 3 |
|
2656 * High Speed Configuration = 4 |
|
2657 |
|
2658 Responses |
|
2659 * CY_RESP_USB_DESCRIPTOR |
|
2660 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_TYPE |
|
2661 * CY_RESP_SUCCESS_FAILURE:CY_ERR_BAD_INDEX |
|
2662 */ |
|
2663 #define CY_RQT_GET_DESCRIPTOR (9) |
|
2664 |
|
2665 /* Summary |
|
2666 This request is sent from the P port processor to the West Bridge device to |
|
2667 physically configure the endpoints in the device. |
|
2668 |
|
2669 Direction |
|
2670 P Port Processor -> West Bridge |
|
2671 |
|
2672 Length (in transfers) |
|
2673 3 |
|
2674 |
|
2675 MailBox0 |
|
2676 * Context = 3 |
|
2677 * Request Code = 10 |
|
2678 |
|
2679 D0 |
|
2680 Bit 15 - Bit 8 |
|
2681 EP1OUTCFG register value |
|
2682 Bit 7 - Bit 0 |
|
2683 EP1INCFG register value |
|
2684 |
|
2685 * D1 - D2 * |
|
2686 PEPxCFS register values where x = 3, 5, 7, 9 |
|
2687 |
|
2688 * D3 - D7 * |
|
2689 LEPxCFG register values where x = 3, 5, 7, 9, 10, 11, 12, 13, 14, 15 |
|
2690 |
|
2691 Responses |
|
2692 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2693 */ |
|
2694 #define CY_RQT_SET_USB_CONFIG_REGISTERS (10) |
|
2695 |
|
2696 /* Summary |
|
2697 This request is sent to the P port processor when a USB event occurs |
|
2698 and needs to be relayed to the P port. |
|
2699 |
|
2700 Direction |
|
2701 West Bridge -> P Port Processor |
|
2702 |
|
2703 Length (in transfers) |
|
2704 1 |
|
2705 |
|
2706 Mailbox0 |
|
2707 * Context = 3 |
|
2708 * Request Code = 11 |
|
2709 |
|
2710 D0 |
|
2711 Event Type |
|
2712 * 0 = Reserved |
|
2713 * 1 = Reserved |
|
2714 * 2 = USB Suspend |
|
2715 * 3 = USB Resume |
|
2716 * 4 = USB Reset |
|
2717 * 5 = USB Set Configuration |
|
2718 * 6 = USB Speed change |
|
2719 |
|
2720 D1 |
|
2721 If EventTYpe is USB Speed change |
|
2722 * 0 = Full Speed |
|
2723 * 1 = High Speed |
|
2724 |
|
2725 If EventType is USB Set Configuration |
|
2726 * The number of the configuration to use (may be zero to unconfigure) |
|
2727 |
|
2728 Responses |
|
2729 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2730 */ |
|
2731 #define CY_RQT_USB_EVENT (11) |
|
2732 |
|
2733 /* Summary |
|
2734 This request is sent in both directions to transfer endpoint data for |
|
2735 endpoints 0 and 1. |
|
2736 |
|
2737 Direction |
|
2738 West Bridge -> P Port Processor |
|
2739 P Port Processor -> West Bridge |
|
2740 |
|
2741 Length (in transfers) |
|
2742 Variable |
|
2743 |
|
2744 Mailbox0 |
|
2745 * Context = 3 |
|
2746 * Request Code = 12 |
|
2747 |
|
2748 D0 |
|
2749 Bit 15 - 14 Data Type |
|
2750 * 0 = Setup (payload should be the 8 byte setup packet) |
|
2751 * 1 = Data |
|
2752 * 2 = Status (payload should be empty) |
|
2753 |
|
2754 Bit 13 Endpoint Number (only 0 and 1 supported) |
|
2755 Bit 12 First Packet (only supported for Host -> West Bridge traffic) |
|
2756 Bit 11 Last Packet (only supported for Host -> West Bridge traffic) |
|
2757 |
|
2758 Bit 9 - 0 Data Length (real max data length is 64 bytes for EP0 and EP1) |
|
2759 |
|
2760 *D1-Dn* |
|
2761 Endpoint data |
|
2762 */ |
|
2763 #define CY_RQT_USB_EP_DATA (12) |
|
2764 |
|
2765 |
|
2766 /* Summary |
|
2767 This request sets the NAK bit on an endpoint. |
|
2768 |
|
2769 Direction |
|
2770 P Port Processor -> West Bridge |
|
2771 |
|
2772 Length (in transfers) |
|
2773 1 |
|
2774 |
|
2775 MailBox0 |
|
2776 * Context = 3 |
|
2777 * Request Code = 13 |
|
2778 |
|
2779 D0 |
|
2780 Endpoint Number |
|
2781 |
|
2782 D1 |
|
2783 * 1 = NAK Endpoint |
|
2784 * 0 = Clear NAK |
|
2785 |
|
2786 Responses |
|
2787 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2788 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT |
|
2789 */ |
|
2790 #define CY_RQT_ENDPOINT_SET_NAK (13) |
|
2791 |
|
2792 |
|
2793 /* Summary |
|
2794 This request retrieves the NAK config status of the requested endpoint. |
|
2795 |
|
2796 Direction |
|
2797 P Port Processor -> West Bridge |
|
2798 |
|
2799 Length (in transfers) |
|
2800 1 |
|
2801 |
|
2802 MailBox0 |
|
2803 * Context = 3 |
|
2804 * Request Code = 14 |
|
2805 |
|
2806 D0 |
|
2807 Endpoint number |
|
2808 |
|
2809 Responses |
|
2810 * CY_RESP_ENDPOINT_NAK |
|
2811 * CY_RESP_SUCCESS_FAILURE:CY_RESP_INVALID_ENDPOINT |
|
2812 */ |
|
2813 #define CY_RQT_GET_ENDPOINT_NAK (14) |
|
2814 |
|
2815 /* Summary |
|
2816 This request acknowledges a setup packet that does not require any data transfer. |
|
2817 |
|
2818 Direction |
|
2819 P Port Processor -> West Bridge |
|
2820 |
|
2821 Length (in transfers) |
|
2822 1 |
|
2823 |
|
2824 MailBox |
|
2825 * Context = 3 |
|
2826 * Request Code = 15 |
|
2827 |
|
2828 Responses |
|
2829 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
2830 */ |
|
2831 #define CY_RQT_ACK_SETUP_PACKET (15) |
|
2832 |
|
2833 /* Summary |
|
2834 This request is sent when the USB storage driver within West Bridge receives an Inquiry request. |
|
2835 |
|
2836 Direction |
|
2837 West Bridge -> P Port Processor |
|
2838 |
|
2839 Length (in transfers) |
|
2840 x - variable |
|
2841 |
|
2842 Mailbox0 |
|
2843 * Context = 3 |
|
2844 * Request Code = 16 |
|
2845 |
|
2846 D0 |
|
2847 Bits 12 - 15 : Bus index |
|
2848 Bits 8 - 11 : Zero based device index |
|
2849 Bits 0 - 7 : Media type being addressed |
|
2850 |
|
2851 D1 |
|
2852 Bits 8 : EVPD bit from request |
|
2853 Bits 0 - 7 : Codepage from the inquiry request |
|
2854 |
|
2855 D2 |
|
2856 Length of the inquiry response in bytes |
|
2857 |
|
2858 * D3 - Dn * |
|
2859 The inquiry response |
|
2860 |
|
2861 Description |
|
2862 When the West Bridge firmware receives an SCSI Inquiry request from the USB host, the response to this |
|
2863 mass storage command is created by West Bridge and forwarded to the P port processor. The P port processor |
|
2864 may change this response before it is returned to the USB host. This request is the method by which |
|
2865 this may happen. |
|
2866 */ |
|
2867 #define CY_RQT_SCSI_INQUIRY_COMMAND (16) |
|
2868 |
|
2869 /* Summary |
|
2870 This request is sent when the USB storage driver within West Bridge receives a Start/Stop request. |
|
2871 |
|
2872 Direction |
|
2873 West Bridge -> P Port Processor |
|
2874 |
|
2875 Length (in transfers) |
|
2876 1 |
|
2877 |
|
2878 Mailbox0 |
|
2879 * Context = 3 |
|
2880 * Request Code = 17 |
|
2881 |
|
2882 D0 |
|
2883 Bits 12 - 15 : Bus index |
|
2884 Bits 8 - 11 : Zero based device index |
|
2885 Bits 0 - 7 : Media type being addressed |
|
2886 |
|
2887 D1 |
|
2888 Bit 1 |
|
2889 * LoEj Bit (See SCSI-3 specification) |
|
2890 |
|
2891 Bit 0 |
|
2892 * Start Bit (See SCSI-3 specification) |
|
2893 |
|
2894 Description |
|
2895 When the West Bridge firmware received a SCSI Start/Stop request from the USB host, this request is relayed to |
|
2896 the P port processor. This request is used to relay the command. The USB firmware will not response to the |
|
2897 USB command until the response to this request is recevied by the firmware. |
|
2898 */ |
|
2899 #define CY_RQT_SCSI_START_STOP_COMMAND (17) |
|
2900 |
|
2901 /* Summary |
|
2902 This request is sent when the USB storage driver receives an unknown CBW on mass storage. |
|
2903 |
|
2904 Direction |
|
2905 West Bridge -> P Port Processor |
|
2906 |
|
2907 Length (in transfers) |
|
2908 4 |
|
2909 |
|
2910 Mailbox0 |
|
2911 * Context = 3 |
|
2912 * Request Code = 18 |
|
2913 |
|
2914 D0 |
|
2915 Bits 12 - 15 : MediaType |
|
2916 * 0 = NAND |
|
2917 * 1 = SDIO Flash |
|
2918 * 2 = MMC Flash |
|
2919 * 3 = CE-ATA |
|
2920 |
|
2921 D1 |
|
2922 The length of the request in bytes |
|
2923 |
|
2924 D2 - Dn |
|
2925 CBW command block from the SCSI host controller. |
|
2926 |
|
2927 Description |
|
2928 When the firmware recevies a SCSI request that is not understood, this request is relayed to the |
|
2929 P port processor. |
|
2930 */ |
|
2931 #define CY_RQT_SCSI_UNKNOWN_COMMAND (18) |
|
2932 |
|
2933 /* Summary |
|
2934 Request the West Bridge to signal remote wakeup to the USB host. |
|
2935 |
|
2936 Direction |
|
2937 P Port Processor -> West Bridge |
|
2938 |
|
2939 Length (in transfers) |
|
2940 1 |
|
2941 |
|
2942 Mailbox0 |
|
2943 * Context = 3 |
|
2944 * Request code = 19 |
|
2945 |
|
2946 Description |
|
2947 Request from the processor to West Bridge, to signal remote wakeup to the USB host. |
|
2948 |
|
2949 Responses |
|
2950 * CY_RESP_SUCCESS_FAILURE |
|
2951 */ |
|
2952 #define CY_RQT_USB_REMOTE_WAKEUP (19) |
|
2953 |
|
2954 /* Summary |
|
2955 Request the West Bridge to clear all descriptors that were set previously |
|
2956 using the Set Descriptor calls. |
|
2957 |
|
2958 Direction |
|
2959 P Port Processor -> West Bridge |
|
2960 |
|
2961 Length (in transfers) |
|
2962 1 |
|
2963 |
|
2964 Mailbox0 |
|
2965 * Context = 3 |
|
2966 * Request code = 20 |
|
2967 |
|
2968 Description |
|
2969 Request from the processor to West Bridge, to clear all descriptor information |
|
2970 that was previously stored on the West Bridge using CyAnUsbSetDescriptor calls. |
|
2971 |
|
2972 Responses |
|
2973 * CY_RESP_SUCCESS_FAILURE |
|
2974 */ |
|
2975 #define CY_RQT_CLEAR_DESCRIPTORS (20) |
|
2976 |
|
2977 /* Summary |
|
2978 Request the West Bridge to monitor USB to storage activity and send |
|
2979 periodic updates. |
|
2980 |
|
2981 Direction |
|
2982 P Port Processor -> West Bridge |
|
2983 |
|
2984 Length (in transfers) |
|
2985 2 |
|
2986 |
|
2987 Mailbox0 |
|
2988 * Context = 3 |
|
2989 * Request code = 21 |
|
2990 |
|
2991 D0 |
|
2992 Upper 16 bits of write threshold |
|
2993 |
|
2994 D1 |
|
2995 Lower 16 bits of write threshold |
|
2996 |
|
2997 D2 |
|
2998 Upper 16 bits of read threshold |
|
2999 |
|
3000 D3 |
|
3001 Lower 16 bits of read threshold |
|
3002 |
|
3003 Description |
|
3004 Request from the processor to West Bridge, to start monitoring the level |
|
3005 of read/write activity on the USB mass storage drive and to set the |
|
3006 threshold level at which progress reports are sent. |
|
3007 |
|
3008 Responses |
|
3009 * CY_RESP_SUCCESS_FAILURE |
|
3010 */ |
|
3011 #define CY_RQT_USB_STORAGE_MONITOR (21) |
|
3012 |
|
3013 /* Summary |
|
3014 Event from the West Bridge showing that U2S activity since the last event has |
|
3015 crossed the threshold. |
|
3016 |
|
3017 Direction |
|
3018 West Bridge -> P Port Processor |
|
3019 |
|
3020 Length (in transfers) |
|
3021 2 |
|
3022 |
|
3023 Mailbox0 |
|
3024 * Context = 3 |
|
3025 * Request code = 22 |
|
3026 |
|
3027 D0 |
|
3028 Upper 16 bits of sectors written since last event. |
|
3029 |
|
3030 D1 |
|
3031 Lower 16 bits of sectors written since last event. |
|
3032 |
|
3033 D2 |
|
3034 Upper 16 bits of sectors read since last event. |
|
3035 |
|
3036 D3 |
|
3037 Lower 16 bits of sectors read since last event. |
|
3038 |
|
3039 Description |
|
3040 Event notification from the West Bridge indicating that the number of |
|
3041 read/writes on the USB mass storage device have crossed a pre-defined |
|
3042 threshold level. |
|
3043 |
|
3044 Responses |
|
3045 * CY_RESP_SUCCESS_FAILURE |
|
3046 */ |
|
3047 #define CY_RQT_USB_ACTIVITY_UPDATE (22) |
|
3048 |
|
3049 /* Summary |
|
3050 Request to select the partitions to be enumerated on a storage device with |
|
3051 partitions. |
|
3052 |
|
3053 Direction |
|
3054 P Port Processor -> West Bridge |
|
3055 |
|
3056 Length (in transfers) |
|
3057 1 |
|
3058 |
|
3059 Mailbox0 |
|
3060 * Context = 3 |
|
3061 * Request code = 23 |
|
3062 |
|
3063 D0 |
|
3064 Bits 8-15 : Bus index |
|
3065 Bits 0- 7 : Device index |
|
3066 |
|
3067 D1 |
|
3068 Bits 8-15 : Control whether to enumerate partition 1. |
|
3069 Bits 0- 7 : Control whether to enumerate partition 0. |
|
3070 |
|
3071 Responses |
|
3072 * CY_RESP_SUCCESS_FAILURE |
|
3073 */ |
|
3074 #define CY_RQT_MS_PARTITION_SELECT (23) |
|
3075 |
|
3076 /******************************************************/ |
|
3077 |
|
3078 /*@@USB responses |
|
3079 Summary |
|
3080 The USB responses include: |
|
3081 * CY_RESP_USB_CONFIG |
|
3082 * CY_RESP_ENDPOINT_CONFIG |
|
3083 * CY_RESP_ENDPOINT_STALL |
|
3084 * CY_RESP_CONNECT_STATE |
|
3085 * CY_RESP_USB_DESCRIPTOR |
|
3086 * CY_RESP_USB_INVALID_EVENT |
|
3087 * CY_RESP_ENDPOINT_NAK |
|
3088 * CY_RESP_INQUIRY_DATA |
|
3089 * CY_RESP_UNKNOWN_SCSI_COMMAND |
|
3090 */ |
|
3091 |
|
3092 /* Summary |
|
3093 This response contains the enumeration configuration information for the USB module. |
|
3094 |
|
3095 Direction |
|
3096 8051->P |
|
3097 |
|
3098 Length (in transfers) |
|
3099 1 |
|
3100 |
|
3101 MailBox0 |
|
3102 * Context = 3 |
|
3103 * Response Code = 32 |
|
3104 |
|
3105 D0 |
|
3106 Bits 8 - 15: Media to enumerate (bit mask) |
|
3107 Bits 0 - 7: Buses to enumerate (bit mask) |
|
3108 * 1 = Bus 0 |
|
3109 * 2 = Bus 1 |
|
3110 |
|
3111 D1 |
|
3112 Enumeration Methodology |
|
3113 * 0 = West Bridge enumeration |
|
3114 * 1 = P Port enumeration |
|
3115 |
|
3116 D2 |
|
3117 Bits 7 - 0 : Interface Count - the number of interfaces |
|
3118 Bits 15 - 8 : Mass storage callbacks |
|
3119 |
|
3120 */ |
|
3121 #define CY_RESP_USB_CONFIG (32) |
|
3122 |
|
3123 |
|
3124 /* Summary |
|
3125 This response contains the configuration information for the specified endpoint. |
|
3126 |
|
3127 Direction |
|
3128 8051->P |
|
3129 |
|
3130 Length (in transfers) |
|
3131 1 |
|
3132 |
|
3133 MailBox0 |
|
3134 * Context = 3 |
|
3135 * Response Code = 33 |
|
3136 |
|
3137 D0 |
|
3138 Bits 15 - 12 : Endpoint Number (0 - 15) |
|
3139 |
|
3140 Bits 11 - 10 : Endpoint Type |
|
3141 * 0 = Control |
|
3142 * 1 = Bulk |
|
3143 * 2 = Interrupt |
|
3144 * 3 = Isochronous |
|
3145 |
|
3146 Bits 9 : Endpoint Size |
|
3147 * 0 = 512 |
|
3148 * 1 = 1024 |
|
3149 |
|
3150 Bits 8 - 7 : Buffering |
|
3151 * 0 = Double |
|
3152 * 1 = Triple |
|
3153 * 2 = Quad |
|
3154 |
|
3155 Bits 6 : Bit Direction |
|
3156 * 0 = Input |
|
3157 * 1 = Output |
|
3158 */ |
|
3159 #define CY_RESP_ENDPOINT_CONFIG (33) |
|
3160 |
|
3161 |
|
3162 /* Summary |
|
3163 This response contains the stall status for the specified endpoint. |
|
3164 |
|
3165 Direction |
|
3166 8051->P |
|
3167 |
|
3168 Length (in transfers) |
|
3169 1 |
|
3170 |
|
3171 MailBox0 |
|
3172 * Context = 3 |
|
3173 * Response Code = 34 |
|
3174 |
|
3175 D0 |
|
3176 Stall status |
|
3177 * 0 = Active |
|
3178 * 1 = Stalled |
|
3179 */ |
|
3180 #define CY_RESP_ENDPOINT_STALL (34) |
|
3181 |
|
3182 |
|
3183 /* Summary |
|
3184 This response contains the connected/disconnected state of the West Bridge USB pins. |
|
3185 |
|
3186 Direction |
|
3187 8051->P |
|
3188 |
|
3189 Length (in transfers) |
|
3190 1 |
|
3191 |
|
3192 MailBox0 |
|
3193 * Context = 3 |
|
3194 * Response Code = 35 |
|
3195 |
|
3196 D0 |
|
3197 Connect state |
|
3198 * 0 = Disconnected |
|
3199 * 1 = Connected |
|
3200 */ |
|
3201 #define CY_RESP_CONNECT_STATE (35) |
|
3202 |
|
3203 /* Summary |
|
3204 This response contains the information about the USB configuration |
|
3205 |
|
3206 Direction |
|
3207 West Bridge -> P Port Processor |
|
3208 |
|
3209 Length |
|
3210 x bytes |
|
3211 |
|
3212 Mailbox0 |
|
3213 * Context = 3 |
|
3214 * Response Code = 36 |
|
3215 |
|
3216 D0 |
|
3217 Length in bytes of the descriptor |
|
3218 |
|
3219 * D1 - DN * |
|
3220 Descriptor contents |
|
3221 */ |
|
3222 #define CY_RESP_USB_DESCRIPTOR (36) |
|
3223 |
|
3224 /* Summary |
|
3225 This response is sent in response to a bad USB event code |
|
3226 |
|
3227 Direction |
|
3228 P Port Processor -> West Bridge |
|
3229 |
|
3230 Length |
|
3231 1 word (2 bytes) |
|
3232 |
|
3233 Mailbox0 |
|
3234 * Context = 3 |
|
3235 * Response Code = 37 |
|
3236 |
|
3237 D0 |
|
3238 The invalid event code in the request |
|
3239 */ |
|
3240 #define CY_RESP_USB_INVALID_EVENT (37) |
|
3241 |
|
3242 /* Summary |
|
3243 This response contains the current NAK status of a USB endpoint. |
|
3244 |
|
3245 Direction |
|
3246 West Bridge -> P port processor |
|
3247 |
|
3248 Length |
|
3249 1 transfer |
|
3250 |
|
3251 Mailbox0 |
|
3252 * Context = 3 |
|
3253 * Response Code = 38 |
|
3254 |
|
3255 D0 |
|
3256 The NAK status of the endpoint |
|
3257 1 : NAK bit set |
|
3258 0 : NAK bit clear |
|
3259 */ |
|
3260 #define CY_RESP_ENDPOINT_NAK (38) |
|
3261 |
|
3262 /* Summary |
|
3263 This response gives the contents of the inquiry data back to West Bridge to |
|
3264 returns to the USB host. |
|
3265 |
|
3266 Direction |
|
3267 West Bridge -> P Port Processor |
|
3268 |
|
3269 Length |
|
3270 Variable |
|
3271 |
|
3272 MailBox0 |
|
3273 * Context = 3 |
|
3274 * Response Code = 39 |
|
3275 |
|
3276 D0 |
|
3277 Length of the inquiry response |
|
3278 |
|
3279 *D1 - Dn* |
|
3280 Inquiry data |
|
3281 */ |
|
3282 #define CY_RESP_INQUIRY_DATA (39) |
|
3283 |
|
3284 /* Summary |
|
3285 This response gives the status of an unknown SCSI command. This also gives three |
|
3286 bytes of sense information. |
|
3287 |
|
3288 Direction |
|
3289 P Port Processor -> West Bridge |
|
3290 |
|
3291 Length (in transfers) |
|
3292 1 |
|
3293 |
|
3294 Mailbox0 |
|
3295 * Context = 3 |
|
3296 * Response Code = 40 |
|
3297 |
|
3298 D0 |
|
3299 The length of the reply in bytes |
|
3300 |
|
3301 D1 |
|
3302 * Status of the command |
|
3303 * Sense Key |
|
3304 |
|
3305 D2 |
|
3306 * Additional Sense Code (ASC) |
|
3307 * Additional Sense Code Qualifier (ASCQ) |
|
3308 */ |
|
3309 #define CY_RESP_UNKNOWN_SCSI_COMMAND (40) |
|
3310 /*******************************************************/ |
|
3311 |
|
3312 /*@@Turbo requests |
|
3313 Summary |
|
3314 The Turbo requests include: |
|
3315 * CY_RQT_START_MTP |
|
3316 * CY_RQT_STOP_MTP |
|
3317 * CY_RQT_INIT_SEND_OBJECT |
|
3318 * CY_RQT_CANCEL_SEND_OBJECT |
|
3319 * CY_RQT_INIT_GET_OBJECT |
|
3320 * CY_RQT_CANCEL_GET_OBJECT |
|
3321 * CY_RQT_SEND_BLOCK_TABLE |
|
3322 * CY_RQT_MTP_EVENT |
|
3323 * CY_RQT_TURBO_CMD_FROM_HOST |
|
3324 * CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST |
|
3325 * CY_RQT_TURBO_SWITCH_ENDPOINT |
|
3326 * CY_RQT_TURBO_START_WRITE_DMA |
|
3327 * CY_RQT_ENABLE_USB_PATH |
|
3328 * CY_RQT_CANCEL_ASYNC_TRANSFER |
|
3329 */ |
|
3330 #ifndef __doxygen__ |
|
3331 #define CY_RQT_TUR_RQT_CONTEXT (4) |
|
3332 #endif |
|
3333 |
|
3334 /* Summary |
|
3335 This command requests initialization of the MTP stack. |
|
3336 |
|
3337 Direction |
|
3338 P Port Processor -> West Bridge |
|
3339 |
|
3340 Length (in transfers) |
|
3341 1 |
|
3342 |
|
3343 MailBox0 |
|
3344 * Context = 4 |
|
3345 * Request Code = 0 |
|
3346 |
|
3347 Description |
|
3348 This command is required before any other MTP related command can be |
|
3349 sent to the West Bridge firmware. |
|
3350 |
|
3351 Responses |
|
3352 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3353 * CY_RESP_SUCCESS_FAILURE:CY_RESP_ALREADY_RUNNING |
|
3354 */ |
|
3355 #define CY_RQT_START_MTP (0) |
|
3356 |
|
3357 /* Summary |
|
3358 This command requests shutdown of the MTP stack. |
|
3359 |
|
3360 Direction |
|
3361 P Port Processor -> West Bridge |
|
3362 |
|
3363 Length (in transfers) |
|
3364 1 |
|
3365 |
|
3366 MailBox0 |
|
3367 * Context = 4 |
|
3368 * Request Code = 1 |
|
3369 |
|
3370 Responses |
|
3371 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3372 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3373 */ |
|
3374 #define CY_RQT_STOP_MTP (1) |
|
3375 |
|
3376 /* Summary |
|
3377 This command sets up an MTP SendObject operation. |
|
3378 |
|
3379 Direction |
|
3380 P Port Processor -> West Bridge |
|
3381 |
|
3382 Length (in transfers) |
|
3383 1 |
|
3384 |
|
3385 MailBox0 |
|
3386 * Context = 4 |
|
3387 * Request Code = 2 |
|
3388 |
|
3389 D0 |
|
3390 Total bytes for send object Low 16 bits |
|
3391 |
|
3392 D1 |
|
3393 Total bytes for send object High 16 bits |
|
3394 |
|
3395 Responses |
|
3396 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3397 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3398 */ |
|
3399 #define CY_RQT_INIT_SEND_OBJECT (2) |
|
3400 |
|
3401 /* Summary |
|
3402 This command cancels West Bridges handling of |
|
3403 an ongoing MTP SendObject operation. This |
|
3404 does NOT send an MTP response. |
|
3405 |
|
3406 Direction |
|
3407 P Port Processor -> West Bridge |
|
3408 |
|
3409 Length (in transfers) |
|
3410 1 |
|
3411 |
|
3412 MailBox0 |
|
3413 * Context = 4 |
|
3414 * Request Code = 3 |
|
3415 |
|
3416 Responses |
|
3417 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3418 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3419 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING |
|
3420 */ |
|
3421 #define CY_RQT_CANCEL_SEND_OBJECT (3) |
|
3422 |
|
3423 /* Summary |
|
3424 This command sets up an MTP GetObject operation. |
|
3425 |
|
3426 Direction |
|
3427 P Port Processor -> West Bridge |
|
3428 |
|
3429 Length (in transfers) |
|
3430 2 |
|
3431 |
|
3432 MailBox0 |
|
3433 * Context = 4 |
|
3434 * Request Code = 4 |
|
3435 |
|
3436 D0 |
|
3437 Total bytes for get object Low 16 bits |
|
3438 |
|
3439 D1 |
|
3440 Total bytes for get object High 16 bits |
|
3441 |
|
3442 D2 |
|
3443 Transaction Id for get object Low 16 bits |
|
3444 |
|
3445 D3 |
|
3446 Transaction Id for get object High 16 bits |
|
3447 |
|
3448 Responses |
|
3449 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3450 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3451 */ |
|
3452 #define CY_RQT_INIT_GET_OBJECT (4) |
|
3453 |
|
3454 /* Summary |
|
3455 This command notifies West Bridge of a new |
|
3456 BlockTable transfer. |
|
3457 |
|
3458 Direction |
|
3459 P Port Processor -> West Bridge |
|
3460 |
|
3461 Length (in transfers) |
|
3462 1 |
|
3463 |
|
3464 MailBox0 |
|
3465 * Context = 4 |
|
3466 * Request Code = 5 |
|
3467 |
|
3468 Responses |
|
3469 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3470 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3471 */ |
|
3472 #define CY_RQT_SEND_BLOCK_TABLE (5) |
|
3473 |
|
3474 /* Summary |
|
3475 This request is sent to the P port processor when a MTP event occurs |
|
3476 and needs to be relayed to the P port. |
|
3477 |
|
3478 Direction |
|
3479 West Bridge -> P Port Processor |
|
3480 |
|
3481 Length (in transfers) |
|
3482 2 |
|
3483 |
|
3484 Mailbox0 |
|
3485 * Context = 4 |
|
3486 * Request Code = 6 |
|
3487 |
|
3488 D0 |
|
3489 Bits 15 - 8 : Return Status for GetObject/SendObject |
|
3490 Bits 7 - 0 : Event Type |
|
3491 * 0 = MTP SendObject Complete |
|
3492 * 1 = MTP GetObject Complete |
|
3493 * 2 = BlockTable Needed |
|
3494 |
|
3495 D1 |
|
3496 Lower 16 bits of the length of the data that got transferred in the Turbo Endpoint. |
|
3497 (Applicable to "MTP SendObject Complete" and "MTP GetObject Complete" events) |
|
3498 |
|
3499 D2 |
|
3500 Upper 16 bits of the length of the data that got transferred in the Turbo Endpoint. |
|
3501 (Applicable to "MTP SendObject Complete" and "MTP GetObject Complete" events) |
|
3502 |
|
3503 D3 |
|
3504 Lower 16 bits of the Transaction Id of the MTP_SEND_OBJECT command. |
|
3505 (Applicable to "MTP SendObject Complete" event) |
|
3506 |
|
3507 D4 |
|
3508 Upper 16 bits of the Transaction Id of the MTP_SEND_OBJECT command. |
|
3509 (Applicable to "MTP SendObject Complete" event) |
|
3510 |
|
3511 Responses |
|
3512 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3513 */ |
|
3514 #define CY_RQT_MTP_EVENT (6) |
|
3515 |
|
3516 /* Summary |
|
3517 This request is sent to the P port processor when a command is received |
|
3518 from Host in a Turbo Endpoint. Upon receiving this event, P port should |
|
3519 read the data from the endpoint as soon as possible. |
|
3520 |
|
3521 Direction |
|
3522 West Bridge -> P Port Processor |
|
3523 |
|
3524 Length (in transfers) |
|
3525 1 |
|
3526 |
|
3527 Mailbox0 |
|
3528 * Context = 4 |
|
3529 * Request Code = 7 |
|
3530 |
|
3531 D0 |
|
3532 This contains the EP number. (This will be always two now). |
|
3533 |
|
3534 D1 |
|
3535 Length of the data available in the Turbo Endpoint. |
|
3536 |
|
3537 Responses |
|
3538 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3539 */ |
|
3540 #define CY_RQT_TURBO_CMD_FROM_HOST (7) |
|
3541 |
|
3542 /* Summary |
|
3543 This request is sent to the West Bridge when the P port needs to send |
|
3544 data to the Host in a Turbo Endpoint. Upon receiving this event, |
|
3545 Firmware will make the end point avilable for the P port. If the length is |
|
3546 zero, then firmware will send a zero length packet. |
|
3547 |
|
3548 Direction |
|
3549 P Port Processor -> West Bridge |
|
3550 |
|
3551 Length (in transfers) |
|
3552 2 |
|
3553 |
|
3554 Mailbox0 |
|
3555 * Context = 4 |
|
3556 * Request Code = 8 |
|
3557 |
|
3558 D0 |
|
3559 This contains the EP number. (This will be always six now). |
|
3560 |
|
3561 D1 |
|
3562 Lower 16 bits of the length of the data that needs to be sent in the Turbo Endpoint. |
|
3563 |
|
3564 D2 |
|
3565 Upper 16 bits of the length of the data that needs to be sent in the Turbo Endpoint. |
|
3566 |
|
3567 Responses |
|
3568 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3569 */ |
|
3570 #define CY_RQT_TURBO_SEND_RESP_DATA_TO_HOST (8) |
|
3571 |
|
3572 /* Summary |
|
3573 This command cancels West Bridges handling of |
|
3574 an ongoing MTP GetObject operation. This |
|
3575 does NOT send an MTP response. |
|
3576 |
|
3577 Direction |
|
3578 P Port Processor -> West Bridge |
|
3579 |
|
3580 Length (in transfers) |
|
3581 1 |
|
3582 |
|
3583 MailBox0 |
|
3584 * Context = 4 |
|
3585 * Request Code = 9 |
|
3586 |
|
3587 Responses |
|
3588 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3589 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3590 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_NO_OPERATION_PENDING |
|
3591 */ |
|
3592 #define CY_RQT_CANCEL_GET_OBJECT (9) |
|
3593 |
|
3594 /* Summary |
|
3595 This command switches a Turbo endpoint |
|
3596 from the U port to the P port. If no data |
|
3597 is in the endpoint the endpoint is |
|
3598 primed to switch as soon as data is placed |
|
3599 in the endpoint. The endpoint will continue |
|
3600 to switch until all data has been transferd. |
|
3601 |
|
3602 Direction |
|
3603 P Port Processor -> West Bridge |
|
3604 |
|
3605 Length (in transfers) |
|
3606 2 |
|
3607 |
|
3608 MailBox0 |
|
3609 * Context = 4 |
|
3610 * Request Code = 10 |
|
3611 |
|
3612 D0 |
|
3613 Whether the read is a packet read. |
|
3614 |
|
3615 D1 |
|
3616 Lower 16 bits of the length of the data to switch the Turbo Endpoint for. |
|
3617 |
|
3618 D2 |
|
3619 Upper 16 bits of the length of the data to switch the Turbo Endpoint for. |
|
3620 |
|
3621 Responses |
|
3622 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3623 * CY_RESP_SUCCESS_FAILURE:CY_RESP_NOT_RUNNING |
|
3624 */ |
|
3625 #define CY_RQT_TURBO_SWITCH_ENDPOINT (10) |
|
3626 |
|
3627 /* Summary |
|
3628 This command requests the API to start the DMA transfer of a packet |
|
3629 of MTP data to the Antioch. |
|
3630 |
|
3631 Direction |
|
3632 West Bridge -> P Port Processor |
|
3633 |
|
3634 Length (in transfers) |
|
3635 1 |
|
3636 |
|
3637 MailBox0 |
|
3638 * Context = 4 |
|
3639 * Request Code = 11 |
|
3640 |
|
3641 Responses |
|
3642 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3643 */ |
|
3644 #define CY_RQT_TURBO_START_WRITE_DMA (11) |
|
3645 |
|
3646 /* Summary |
|
3647 This command requests the firmware to switch the internal data paths to enable |
|
3648 USB access to the Mass storage / MTP endpoints. |
|
3649 |
|
3650 Direction |
|
3651 P Port Processor -> West Bridge |
|
3652 |
|
3653 Length (in transfers) |
|
3654 1 |
|
3655 |
|
3656 MailBox0 |
|
3657 * Context = 4 |
|
3658 * Request code = 12 |
|
3659 |
|
3660 Responses |
|
3661 * CY_RESP_SUCCESS_FAILURE:CY_AS_ERROR_SUCCESS |
|
3662 */ |
|
3663 #define CY_RQT_ENABLE_USB_PATH (12) |
|
3664 |
|
3665 /* Summary |
|
3666 Request to cancel an asynchronous MTP write from the processor side. |
|
3667 |
|
3668 Direction |
|
3669 P Port processor -> West Bridge |
|
3670 |
|
3671 Length (in transfers) |
|
3672 1 |
|
3673 |
|
3674 Mailbox0 |
|
3675 * Context = 4 |
|
3676 * Request code = 13 |
|
3677 |
|
3678 D0 |
|
3679 * EP number |
|
3680 |
|
3681 Description |
|
3682 This is a request to the firmware to update internal state so that a pending write |
|
3683 on the MTP endpoint can be cancelled. |
|
3684 */ |
|
3685 #define CY_RQT_CANCEL_ASYNC_TRANSFER (13) |
|
3686 |
|
3687 /******************************************************/ |
|
3688 |
|
3689 /*@@Turbo responses |
|
3690 Summary |
|
3691 The Turbo responses include: |
|
3692 * CY_RESP_MTP_INVALID_EVENT |
|
3693 */ |
|
3694 |
|
3695 /* Summary |
|
3696 This response is sent in response to a bad MTP event code |
|
3697 |
|
3698 Direction |
|
3699 P Port Processor -> West Bridge |
|
3700 |
|
3701 Length |
|
3702 1 word (2 bytes) |
|
3703 |
|
3704 Mailbox0 |
|
3705 * Context = 4 |
|
3706 * Response Code = 16 |
|
3707 |
|
3708 D0 |
|
3709 The invalid event code in the request |
|
3710 */ |
|
3711 #define CY_RESP_MTP_INVALID_EVENT (16) |
|
3712 |
|
3713 #ifndef __doxygen__ |
|
3714 #define CY_RQT_CONTEXT_COUNT (5) |
|
3715 #endif |
|
3716 |
|
3717 #endif /* _INCLUDED_CYASPROTOCOL_H_ */ |
|
3718 |