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symbian-qemu-0.9.1-12/qemu-symbian-svp/gdbstub/arm-neon.xml
author John Kern <johnk@symbian.org>
Thu, 12 Nov 2009 09:14:36 -0800
changeset 21 05914789ab43
parent 1 2fb8b9db1c86
permissions -rw-r--r--
merged branch into tip
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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<?xml version="1.0"?>
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.arm.vfp">
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  <vector id="neon_uint8x8" type="uint8" count="8"/>
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  <vector id="neon_uint16x4" type="uint16" count="4"/>
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  <vector id="neon_uint32x2" type="uint32" count="2"/>
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  <vector id="neon_float32x2" type="ieee_single" count="2"/>
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  <union id="neon_d">
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    <field name="u8" type="neon_uint8x8"/>
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    <field name="u16" type="neon_uint16x4"/>
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    <field name="u32" type="neon_uint32x2"/>
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    <field name="u64" type="uint64"/>
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    <field name="f32" type="neon_float32x2"/>
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    <field name="f64" type="ieee_double"/>
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  </union>
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  <vector id="neon_uint8x16" type="uint8" count="16"/>
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  <vector id="neon_uint16x8" type="uint16" count="8"/>
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  <vector id="neon_uint32x4" type="uint32" count="4"/>
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  <vector id="neon_uint64x2" type="uint64" count="2"/>
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  <vector id="neon_float32x4" type="ieee_single" count="4"/>
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  <vector id="neon_float64x2" type="ieee_double" count="2"/>
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  <union id="neon_q">
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    <field name="u8" type="neon_uint8x16"/>
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    <field name="u16" type="neon_uint16x8"/>
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    <field name="u32" type="neon_uint32x4"/>
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    <field name="u64" type="neon_uint64x2"/>
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    <field name="f32" type="neon_float32x4"/>
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    <field name="f64" type="neon_float64x2"/>
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  </union>
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  <reg name="d0" bitsize="64" type="neon_d"/>
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  <reg name="d1" bitsize="64" type="neon_d"/>
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  <reg name="d2" bitsize="64" type="neon_d"/>
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  <reg name="d3" bitsize="64" type="neon_d"/>
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  <reg name="d4" bitsize="64" type="neon_d"/>
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  <reg name="d5" bitsize="64" type="neon_d"/>
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  <reg name="d6" bitsize="64" type="neon_d"/>
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  <reg name="d7" bitsize="64" type="neon_d"/>
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  <reg name="d8" bitsize="64" type="neon_d"/>
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  <reg name="d9" bitsize="64" type="neon_d"/>
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  <reg name="d10" bitsize="64" type="neon_d"/>
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  <reg name="d11" bitsize="64" type="neon_d"/>
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  <reg name="d12" bitsize="64" type="neon_d"/>
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  <reg name="d13" bitsize="64" type="neon_d"/>
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  <reg name="d14" bitsize="64" type="neon_d"/>
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  <reg name="d15" bitsize="64" type="neon_d"/>
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  <reg name="d16" bitsize="64" type="neon_d"/>
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  <reg name="d17" bitsize="64" type="neon_d"/>
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  <reg name="d18" bitsize="64" type="neon_d"/>
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  <reg name="d19" bitsize="64" type="neon_d"/>
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  <reg name="d20" bitsize="64" type="neon_d"/>
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  <reg name="d21" bitsize="64" type="neon_d"/>
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  <reg name="d22" bitsize="64" type="neon_d"/>
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  <reg name="d23" bitsize="64" type="neon_d"/>
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  <reg name="d24" bitsize="64" type="neon_d"/>
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  <reg name="d25" bitsize="64" type="neon_d"/>
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  <reg name="d26" bitsize="64" type="neon_d"/>
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  <reg name="d27" bitsize="64" type="neon_d"/>
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  <reg name="d28" bitsize="64" type="neon_d"/>
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  <reg name="d29" bitsize="64" type="neon_d"/>
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  <reg name="d30" bitsize="64" type="neon_d"/>
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  <reg name="d31" bitsize="64" type="neon_d"/>
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  <reg name="q0" bitsize="128" type="neon_q"/>













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  <reg name="q1" bitsize="128" type="neon_q"/>













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  <reg name="q2" bitsize="128" type="neon_q"/>













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  <reg name="q3" bitsize="128" type="neon_q"/>













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  <reg name="q4" bitsize="128" type="neon_q"/>













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  <reg name="q5" bitsize="128" type="neon_q"/>













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  <reg name="q6" bitsize="128" type="neon_q"/>













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  <reg name="q7" bitsize="128" type="neon_q"/>













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  <reg name="q8" bitsize="128" type="neon_q"/>













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  <reg name="q9" bitsize="128" type="neon_q"/>













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  <reg name="q10" bitsize="128" type="neon_q"/>













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  <reg name="q10" bitsize="128" type="neon_q"/>













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  <reg name="q12" bitsize="128" type="neon_q"/>













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  <reg name="q13" bitsize="128" type="neon_q"/>













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  <reg name="q14" bitsize="128" type="neon_q"/>













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  <reg name="q15" bitsize="128" type="neon_q"/>













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  <reg name="fpsid" bitsize="32" type="int" group="float"/>













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  <reg name="fpscr" bitsize="32" type="int" group="float"/>













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  <reg name="fpexc" bitsize="32" type="int" group="float"/>













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</feature>















MCL/sf/adapt/qemu