/* s390-dis.c -- Disassemble S390 instructions

   Copyright 2000, 2001, 2002, 2003, 2005 Free Software Foundation, Inc.

   Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).

   This file is part of GDB, GAS and the GNU binutils.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA

   02110-1301, USA.  */

#include <stdio.h>

#include "dis-asm.h"

/* s390.h -- Header file for S390 opcode table

   Copyright 2000, 2001, 2003 Free Software Foundation, Inc.

   Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).

   This file is part of BFD, the Binary File Descriptor library.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA

   02110-1301, USA.  */

#ifndef S390_H

#define S390_H

/* List of instruction sets variations. */

enum s390_opcode_mode_val

  {

    S390_OPCODE_ESA = 0,

    S390_OPCODE_ZARCH

  };

enum s390_opcode_cpu_val

  {

    S390_OPCODE_G5 = 0,

    S390_OPCODE_G6,

    S390_OPCODE_Z900,

    S390_OPCODE_Z990,

    S390_OPCODE_Z9_109,

    S390_OPCODE_Z9_EC

  };

/* The opcode table is an array of struct s390_opcode.  */

struct s390_opcode

  {

    /* The opcode name.  */

    const char * name;

    /* The opcode itself.  Those bits which will be filled in with

       operands are zeroes.  */

    unsigned char opcode[6];

    /* The opcode mask.  This is used by the disassembler.  This is a

       mask containing ones indicating those bits which must match the

       opcode field, and zeroes indicating those bits which need not

       match (and are presumably filled in by operands).  */

    unsigned char mask[6];

    /* The opcode length in bytes. */

    int oplen;

    /* An array of operand codes.  Each code is an index into the

       operand table.  They appear in the order which the operands must

       appear in assembly code, and are terminated by a zero.  */

    unsigned char operands[6];

    /* Bitmask of execution modes this opcode is available for.  */

    unsigned int modes;

    /* First cpu this opcode is available for.  */

    enum s390_opcode_cpu_val min_cpu;

  };

/* The table itself is sorted by major opcode number, and is otherwise

   in the order in which the disassembler should consider

   instructions.  */

extern const struct s390_opcode s390_opcodes[];

extern const int                s390_num_opcodes;

/* A opcode format table for the .insn pseudo mnemonic.  */

extern const struct s390_opcode s390_opformats[];

extern const int                s390_num_opformats;

/* Values defined for the flags field of a struct powerpc_opcode.  */

/* The operands table is an array of struct s390_operand.  */

struct s390_operand

  {

    /* The number of bits in the operand.  */

    int bits;

    /* How far the operand is left shifted in the instruction.  */

    int shift;

    /* One bit syntax flags.  */

    unsigned long flags;

  };

/* Elements in the table are retrieved by indexing with values from

   the operands field of the powerpc_opcodes table.  */

extern const struct s390_operand s390_operands[];

/* Values defined for the flags field of a struct s390_operand.  */

/* This operand names a register.  The disassembler uses this to print

   register names with a leading 'r'.  */

#define S390_OPERAND_GPR 0x1

/* This operand names a floating point register.  The disassembler

   prints these with a leading 'f'. */

#define S390_OPERAND_FPR 0x2

/* This operand names an access register.  The disassembler

   prints these with a leading 'a'.  */

#define S390_OPERAND_AR 0x4

/* This operand names a control register.  The disassembler

   prints these with a leading 'c'.  */

#define S390_OPERAND_CR 0x8

/* This operand is a displacement.  */

#define S390_OPERAND_DISP 0x10

/* This operand names a base register.  */

#define S390_OPERAND_BASE 0x20

/* This operand names an index register, it can be skipped.  */

#define S390_OPERAND_INDEX 0x40

/* This operand is a relative branch displacement.  The disassembler

   prints these symbolically if possible.  */

#define S390_OPERAND_PCREL 0x80

/* This operand takes signed values.  */

#define S390_OPERAND_SIGNED 0x100

/* This operand is a length.  */

#define S390_OPERAND_LENGTH 0x200

/* This operand is optional. Only a single operand at the end of

   the instruction may be optional.  */

#define S390_OPERAND_OPTIONAL 0x400

	#endif /* S390_H */

static int init_flag = 0;

static int opc_index[256];

static int current_arch_mask = 0;

/* Set up index table for first opcode byte.  */

static void

init_disasm (struct disassemble_info *info)

{

  const struct s390_opcode *opcode;

  const struct s390_opcode *opcode_end;

  memset (opc_index, 0, sizeof (opc_index));

  opcode_end = s390_opcodes + s390_num_opcodes;

  for (opcode = s390_opcodes; opcode < opcode_end; opcode++)

    {

      opc_index[(int) opcode->opcode[0]] = opcode - s390_opcodes;

      while ((opcode < opcode_end) &&

	     (opcode[1].opcode[0] == opcode->opcode[0]))

	opcode++;

    }

//  switch (info->mach)

//    {

//    case bfd_mach_s390_31:

      current_arch_mask = 1 << S390_OPCODE_ESA;

//      break;

//    case bfd_mach_s390_64:

//      current_arch_mask = 1 << S390_OPCODE_ZARCH;

//      break;

//    default:

//      abort ();

//    }

  init_flag = 1;

}

/* Extracts an operand value from an instruction.  */

static inline unsigned int

s390_extract_operand (unsigned char *insn, const struct s390_operand *operand)

{

  unsigned int val;

  int bits;

  /* Extract fragments of the operand byte for byte.  */

  insn += operand->shift / 8;

  bits = (operand->shift & 7) + operand->bits;

  val = 0;

  do

    {

      val <<= 8;

      val |= (unsigned int) *insn++;

      bits -= 8;

    }

  while (bits > 0);

  val >>= -bits;

  val &= ((1U << (operand->bits - 1)) << 1) - 1;

  /* Check for special long displacement case.  */

  if (operand->bits == 20 && operand->shift == 20)

    val = (val & 0xff) << 12 | (val & 0xfff00) >> 8;

  /* Sign extend value if the operand is signed or pc relative.  */

  if ((operand->flags & (S390_OPERAND_SIGNED | S390_OPERAND_PCREL))

      && (val & (1U << (operand->bits - 1))))

    val |= (-1U << (operand->bits - 1)) << 1;

  /* Double value if the operand is pc relative.  */

  if (operand->flags & S390_OPERAND_PCREL)

    val <<= 1;

  /* Length x in an instructions has real length x + 1.  */

  if (operand->flags & S390_OPERAND_LENGTH)

    val++;

  return val;

}

/* Print a S390 instruction.  */

int

print_insn_s390 (bfd_vma memaddr, struct disassemble_info *info)

{

  bfd_byte buffer[6];

  const struct s390_opcode *opcode;

  const struct s390_opcode *opcode_end;

  unsigned int value;

  int status, opsize, bufsize;

  char separator;

  if (init_flag == 0)

    init_disasm (info);

  /* The output looks better if we put 6 bytes on a line.  */

  info->bytes_per_line = 6;

  /* Every S390 instruction is max 6 bytes long.  */

  memset (buffer, 0, 6);

  status = (*info->read_memory_func) (memaddr, buffer, 6, info);

  if (status != 0)

    {

      for (bufsize = 0; bufsize < 6; bufsize++)

	if ((*info->read_memory_func) (memaddr, buffer, bufsize + 1, info) != 0)

	  break;

      if (bufsize <= 0)

	{

	  (*info->memory_error_func) (status, memaddr, info);

	  return -1;

	}

      /* Opsize calculation looks strange but it works

	 00xxxxxx -> 2 bytes, 01xxxxxx/10xxxxxx -> 4 bytes,

	 11xxxxxx -> 6 bytes.  */

      opsize = ((((buffer[0] >> 6) + 1) >> 1) + 1) << 1;

      status = opsize > bufsize;

    }

  else

    {

      bufsize = 6;

      opsize = ((((buffer[0] >> 6) + 1) >> 1) + 1) << 1;

    }

  if (status == 0)

    {

      /* Find the first match in the opcode table.  */

      opcode_end = s390_opcodes + s390_num_opcodes;

      for (opcode = s390_opcodes + opc_index[(int) buffer[0]];

	   (opcode < opcode_end) && (buffer[0] == opcode->opcode[0]);

	   opcode++)

	{

	  const struct s390_operand *operand;

	  const unsigned char *opindex;

	  /* Check architecture.  */

	  if (!(opcode->modes & current_arch_mask))

	    continue;

	  /* Check signature of the opcode.  */

	  if ((buffer[1] & opcode->mask[1]) != opcode->opcode[1]

	      || (buffer[2] & opcode->mask[2]) != opcode->opcode[2]

	      || (buffer[3] & opcode->mask[3]) != opcode->opcode[3]

	      || (buffer[4] & opcode->mask[4]) != opcode->opcode[4]

	      || (buffer[5] & opcode->mask[5]) != opcode->opcode[5])

	    continue;

	  /* The instruction is valid.  */

	  if (opcode->operands[0] != 0)

	    (*info->fprintf_func) (info->stream, "%s\t", opcode->name);

	  else

	    (*info->fprintf_func) (info->stream, "%s", opcode->name);

	  /* Extract the operands.  */

	  separator = 0;

	  for (opindex = opcode->operands; *opindex != 0; opindex++)

	    {

	      unsigned int value;

	      operand = s390_operands + *opindex;

	      value = s390_extract_operand (buffer, operand);

	      if ((operand->flags & S390_OPERAND_INDEX) && value == 0)

		continue;

	      if ((operand->flags & S390_OPERAND_BASE) &&

		  value == 0 && separator == '(')

		{

		  separator = ',';

		  continue;

		}

	      if (separator)

		(*info->fprintf_func) (info->stream, "%c", separator);

	      if (operand->flags & S390_OPERAND_GPR)

		(*info->fprintf_func) (info->stream, "%%r%i", value);

	      else if (operand->flags & S390_OPERAND_FPR)

		(*info->fprintf_func) (info->stream, "%%f%i", value);

	      else if (operand->flags & S390_OPERAND_AR)

		(*info->fprintf_func) (info->stream, "%%a%i", value);

	      else if (operand->flags & S390_OPERAND_CR)

		(*info->fprintf_func) (info->stream, "%%c%i", value);

	      else if (operand->flags & S390_OPERAND_PCREL)

		(*info->print_address_func) (memaddr + (int) value, info);

	      else if (operand->flags & S390_OPERAND_SIGNED)

		(*info->fprintf_func) (info->stream, "%i", (int) value);

	      else

		(*info->fprintf_func) (info->stream, "%u", value);

	      if (operand->flags & S390_OPERAND_DISP)

		{

		  separator = '(';

		}

	      else if (operand->flags & S390_OPERAND_BASE)

		{

		  (*info->fprintf_func) (info->stream, ")");

		  separator = ',';

		}

	      else

		separator = ',';

	    }

	  /* Found instruction, printed it, return its size.  */

	  return opsize;

	}

      /* No matching instruction found, fall through to hex print.  */

    }

  if (bufsize >= 4)

    {

      value = (unsigned int) buffer[0];

      value = (value << 8) + (unsigned int) buffer[1];

      value = (value << 8) + (unsigned int) buffer[2];

      value = (value << 8) + (unsigned int) buffer[3];

      (*info->fprintf_func) (info->stream, ".long\t0x%08x", value);

      return 4;

    }

  else if (bufsize >= 2)

    {

      value = (unsigned int) buffer[0];

      value = (value << 8) + (unsigned int) buffer[1];

      (*info->fprintf_func) (info->stream, ".short\t0x%04x", value);

      return 2;

    }

  else

    {

      value = (unsigned int) buffer[0];

      (*info->fprintf_func) (info->stream, ".byte\t0x%02x", value);

      return 1;

    }

}

/* s390-opc.c -- S390 opcode list

   Copyright 2000, 2001, 2003 Free Software Foundation, Inc.

   Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).

   This file is part of GDB, GAS, and the GNU binutils.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA

   02110-1301, USA.  */

#include <stdio.h>

/* This file holds the S390 opcode table.  The opcode table

   includes almost all of the extended instruction mnemonics.  This

   permits the disassembler to use them, and simplifies the assembler

   logic, at the cost of increasing the table size.  The table is

   strictly constant data, so the compiler should be able to put it in

   the .text section.

   This file also holds the operand table.  All knowledge about

   inserting operands into instructions and vice-versa is kept in this

   file.  */

/* The operands table.

   The fields are bits, shift, insert, extract, flags.  */

const struct s390_operand s390_operands[] =

{

#define UNUSED 0

  { 0, 0, 0 },                    /* Indicates the end of the operand list */

#define R_8    1                  /* GPR starting at position 8 */

  { 4, 8, S390_OPERAND_GPR },

#define R_12   2                  /* GPR starting at position 12 */

  { 4, 12, S390_OPERAND_GPR },

#define R_16   3                  /* GPR starting at position 16 */

  { 4, 16, S390_OPERAND_GPR },

#define R_20   4                  /* GPR starting at position 20 */

  { 4, 20, S390_OPERAND_GPR },

#define R_24   5                  /* GPR starting at position 24 */

  { 4, 24, S390_OPERAND_GPR },

#define R_28   6                  /* GPR starting at position 28 */

  { 4, 28, S390_OPERAND_GPR },

#define R_32   7                  /* GPR starting at position 32 */

  { 4, 32, S390_OPERAND_GPR },

#define F_8    8                  /* FPR starting at position 8 */

  { 4, 8, S390_OPERAND_FPR },

#define F_12   9                  /* FPR starting at position 12 */

  { 4, 12, S390_OPERAND_FPR },

#define F_16   10                 /* FPR starting at position 16 */

  { 4, 16, S390_OPERAND_FPR },

#define F_20   11                 /* FPR starting at position 16 */

  { 4, 16, S390_OPERAND_FPR },

#define F_24   12                 /* FPR starting at position 24 */

  { 4, 24, S390_OPERAND_FPR },

#define F_28   13                 /* FPR starting at position 28 */

  { 4, 28, S390_OPERAND_FPR },

#define F_32   14                 /* FPR starting at position 32 */

  { 4, 32, S390_OPERAND_FPR },

#define A_8    15                 /* Access reg. starting at position 8 */

  { 4, 8, S390_OPERAND_AR },

#define A_12   16                 /* Access reg. starting at position 12 */

  { 4, 12, S390_OPERAND_AR },

#define A_24   17                 /* Access reg. starting at position 24 */

  { 4, 24, S390_OPERAND_AR },

#define A_28   18                 /* Access reg. starting at position 28 */

  { 4, 28, S390_OPERAND_AR },

#define C_8    19                 /* Control reg. starting at position 8 */

  { 4, 8, S390_OPERAND_CR },

#define C_12   20                 /* Control reg. starting at position 12 */

  { 4, 12, S390_OPERAND_CR },

#define B_16   21                 /* Base register starting at position 16 */

  { 4, 16, S390_OPERAND_BASE|S390_OPERAND_GPR },

#define B_32   22                 /* Base register starting at position 32 */

  { 4, 32, S390_OPERAND_BASE|S390_OPERAND_GPR },

#define X_12   23                 /* Index register starting at position 12 */

  { 4, 12, S390_OPERAND_INDEX|S390_OPERAND_GPR },

#define D_20   24                 /* Displacement starting at position 20 */

  { 12, 20, S390_OPERAND_DISP },

#define D_36   25                 /* Displacement starting at position 36 */

  { 12, 36, S390_OPERAND_DISP },

#define D20_20 26		  /* 20 bit displacement starting at 20 */

  { 20, 20, S390_OPERAND_DISP|S390_OPERAND_SIGNED },

#define L4_8   27                 /* 4 bit length starting at position 8 */

  { 4, 8, S390_OPERAND_LENGTH },

#define L4_12  28                 /* 4 bit length starting at position 12 */

  { 4, 12, S390_OPERAND_LENGTH },

#define L8_8   29                 /* 8 bit length starting at position 8 */

  { 8, 8, S390_OPERAND_LENGTH },

#define U4_8   30                 /* 4 bit unsigned value starting at 8 */

  { 4, 8, 0 },

#define U4_12  31                 /* 4 bit unsigned value starting at 12 */

  { 4, 12, 0 },

#define U4_16  32                 /* 4 bit unsigned value starting at 16 */

  { 4, 16, 0 },

#define U4_20  33                 /* 4 bit unsigned value starting at 20 */

  { 4, 20, 0 },

#define U8_8   34                 /* 8 bit unsigned value starting at 8 */

  { 8, 8, 0 },

#define U8_16  35                 /* 8 bit unsigned value starting at 16 */

  { 8, 16, 0 },

#define I16_16 36                 /* 16 bit signed value starting at 16 */

  { 16, 16, S390_OPERAND_SIGNED },

#define U16_16 37                 /* 16 bit unsigned value starting at 16 */

  { 16, 16, 0 },

#define J16_16 38                 /* PC relative jump offset at 16 */

  { 16, 16, S390_OPERAND_PCREL },

#define J32_16 39                 /* PC relative long offset at 16 */

  { 32, 16, S390_OPERAND_PCREL },

#define I32_16 40		  /* 32 bit signed value starting at 16 */

  { 32, 16, S390_OPERAND_SIGNED },