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baseport/syborg/trk_l1.ini
author Gareth Stockwell <gareth.stockwell@accenture.com>
Wed, 22 Sep 2010 17:06:27 +0100
branchgraphics-phase-3
changeset 112 b6c206049d8a
parent 2 d55eb581a87c
permissions -rw-r--r--
Copied NVM model library code from default branch
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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[SERIALCOMM]
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PDD EUART1
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LDD ECOMM
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CSY ECUART
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PORT 1
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RATE 115200
MCL/sf/adapt/qemu