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1 /* mmx.h |
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2 |
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3 MultiMedia eXtensions GCC interface library for IA32. |
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4 |
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5 To use this library, simply include this header file |
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6 and compile with GCC. You MUST have inlining enabled |
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7 in order for mmx_ok() to work; this can be done by |
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8 simply using -O on the GCC command line. |
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9 |
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10 Compiling with -DMMX_TRACE will cause detailed trace |
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11 output to be sent to stderr for each mmx operation. |
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12 This adds lots of code, and obviously slows execution to |
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13 a crawl, but can be very useful for debugging. |
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14 |
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15 THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY |
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16 EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT |
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17 LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY |
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18 AND FITNESS FOR ANY PARTICULAR PURPOSE. |
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19 |
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20 1997-99 by H. Dietz and R. Fisher |
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21 |
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22 Notes: |
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23 It appears that the latest gas has the pand problem fixed, therefore |
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24 I'll undefine BROKEN_PAND by default. |
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25 */ |
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26 |
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27 #ifndef _MMX_H |
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28 #define _MMX_H |
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29 |
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30 |
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31 /* Warning: at this writing, the version of GAS packaged |
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32 with most Linux distributions does not handle the |
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33 parallel AND operation mnemonic correctly. If the |
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34 symbol BROKEN_PAND is defined, a slower alternative |
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35 coding will be used. If execution of mmxtest results |
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36 in an illegal instruction fault, define this symbol. |
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37 */ |
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38 #undef BROKEN_PAND |
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39 |
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40 |
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41 /* The type of an value that fits in an MMX register |
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42 (note that long long constant values MUST be suffixed |
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43 by LL and unsigned long long values by ULL, lest |
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44 they be truncated by the compiler) |
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45 */ |
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46 typedef union { |
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47 long long q; /* Quadword (64-bit) value */ |
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48 unsigned long long uq; /* Unsigned Quadword */ |
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49 int d[2]; /* 2 Doubleword (32-bit) values */ |
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50 unsigned int ud[2]; /* 2 Unsigned Doubleword */ |
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51 short w[4]; /* 4 Word (16-bit) values */ |
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52 unsigned short uw[4]; /* 4 Unsigned Word */ |
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53 char b[8]; /* 8 Byte (8-bit) values */ |
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54 unsigned char ub[8]; /* 8 Unsigned Byte */ |
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55 float s[2]; /* Single-precision (32-bit) value */ |
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56 } __attribute__ ((aligned (8))) mmx_t; /* On an 8-byte (64-bit) boundary */ |
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57 |
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58 |
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59 #if 0 |
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60 /* Function to test if multimedia instructions are supported... |
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61 */ |
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62 inline extern int |
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63 mm_support(void) |
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64 { |
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65 /* Returns 1 if MMX instructions are supported, |
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66 3 if Cyrix MMX and Extended MMX instructions are supported |
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67 5 if AMD MMX and 3DNow! instructions are supported |
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68 0 if hardware does not support any of these |
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69 */ |
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70 register int rval = 0; |
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71 |
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72 __asm__ __volatile__ ( |
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73 /* See if CPUID instruction is supported ... */ |
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74 /* ... Get copies of EFLAGS into eax and ecx */ |
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75 "pushf\n\t" |
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76 "popl %%eax\n\t" |
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77 "movl %%eax, %%ecx\n\t" |
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78 |
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79 /* ... Toggle the ID bit in one copy and store */ |
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80 /* to the EFLAGS reg */ |
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81 "xorl $0x200000, %%eax\n\t" |
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82 "push %%eax\n\t" |
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83 "popf\n\t" |
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84 |
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85 /* ... Get the (hopefully modified) EFLAGS */ |
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86 "pushf\n\t" |
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87 "popl %%eax\n\t" |
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88 |
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89 /* ... Compare and test result */ |
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90 "xorl %%eax, %%ecx\n\t" |
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91 "testl $0x200000, %%ecx\n\t" |
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92 "jz NotSupported1\n\t" /* CPUID not supported */ |
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93 |
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94 |
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95 /* Get standard CPUID information, and |
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96 go to a specific vendor section */ |
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97 "movl $0, %%eax\n\t" |
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98 "cpuid\n\t" |
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99 |
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100 /* Check for Intel */ |
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101 "cmpl $0x756e6547, %%ebx\n\t" |
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102 "jne TryAMD\n\t" |
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103 "cmpl $0x49656e69, %%edx\n\t" |
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104 "jne TryAMD\n\t" |
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105 "cmpl $0x6c65746e, %%ecx\n" |
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106 "jne TryAMD\n\t" |
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107 "jmp Intel\n\t" |
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108 |
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109 /* Check for AMD */ |
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110 "\nTryAMD:\n\t" |
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111 "cmpl $0x68747541, %%ebx\n\t" |
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112 "jne TryCyrix\n\t" |
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113 "cmpl $0x69746e65, %%edx\n\t" |
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114 "jne TryCyrix\n\t" |
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115 "cmpl $0x444d4163, %%ecx\n" |
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116 "jne TryCyrix\n\t" |
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117 "jmp AMD\n\t" |
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118 |
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119 /* Check for Cyrix */ |
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120 "\nTryCyrix:\n\t" |
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121 "cmpl $0x69727943, %%ebx\n\t" |
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122 "jne NotSupported2\n\t" |
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123 "cmpl $0x736e4978, %%edx\n\t" |
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124 "jne NotSupported3\n\t" |
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125 "cmpl $0x64616574, %%ecx\n\t" |
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126 "jne NotSupported4\n\t" |
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127 /* Drop through to Cyrix... */ |
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128 |
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129 |
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130 /* Cyrix Section */ |
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131 /* See if extended CPUID level 80000001 is supported */ |
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132 /* The value of CPUID/80000001 for the 6x86MX is undefined |
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133 according to the Cyrix CPU Detection Guide (Preliminary |
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134 Rev. 1.01 table 1), so we'll check the value of eax for |
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135 CPUID/0 to see if standard CPUID level 2 is supported. |
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136 According to the table, the only CPU which supports level |
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137 2 is also the only one which supports extended CPUID levels. |
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138 */ |
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139 "cmpl $0x2, %%eax\n\t" |
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140 "jne MMXtest\n\t" /* Use standard CPUID instead */ |
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141 |
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142 /* Extended CPUID supported (in theory), so get extended |
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143 features */ |
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144 "movl $0x80000001, %%eax\n\t" |
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145 "cpuid\n\t" |
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146 "testl $0x00800000, %%eax\n\t" /* Test for MMX */ |
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147 "jz NotSupported5\n\t" /* MMX not supported */ |
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148 "testl $0x01000000, %%eax\n\t" /* Test for Ext'd MMX */ |
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149 "jnz EMMXSupported\n\t" |
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150 "movl $1, %0:\n\n\t" /* MMX Supported */ |
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151 "jmp Return\n\n" |
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152 "EMMXSupported:\n\t" |
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153 "movl $3, %0:\n\n\t" /* EMMX and MMX Supported */ |
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154 "jmp Return\n\t" |
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155 |
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156 |
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157 /* AMD Section */ |
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158 "AMD:\n\t" |
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159 |
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160 /* See if extended CPUID is supported */ |
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161 "movl $0x80000000, %%eax\n\t" |
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162 "cpuid\n\t" |
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163 "cmpl $0x80000000, %%eax\n\t" |
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164 "jl MMXtest\n\t" /* Use standard CPUID instead */ |
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165 |
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166 /* Extended CPUID supported, so get extended features */ |
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167 "movl $0x80000001, %%eax\n\t" |
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168 "cpuid\n\t" |
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169 "testl $0x00800000, %%edx\n\t" /* Test for MMX */ |
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170 "jz NotSupported6\n\t" /* MMX not supported */ |
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171 "testl $0x80000000, %%edx\n\t" /* Test for 3DNow! */ |
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172 "jnz ThreeDNowSupported\n\t" |
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173 "movl $1, %0:\n\n\t" /* MMX Supported */ |
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174 "jmp Return\n\n" |
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175 "ThreeDNowSupported:\n\t" |
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176 "movl $5, %0:\n\n\t" /* 3DNow! and MMX Supported */ |
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177 "jmp Return\n\t" |
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178 |
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179 |
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180 /* Intel Section */ |
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181 "Intel:\n\t" |
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182 |
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183 /* Check for MMX */ |
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184 "MMXtest:\n\t" |
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185 "movl $1, %%eax\n\t" |
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186 "cpuid\n\t" |
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187 "testl $0x00800000, %%edx\n\t" /* Test for MMX */ |
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188 "jz NotSupported7\n\t" /* MMX Not supported */ |
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189 "movl $1, %0:\n\n\t" /* MMX Supported */ |
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190 "jmp Return\n\t" |
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191 |
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192 /* Nothing supported */ |
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193 "\nNotSupported1:\n\t" |
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194 "#movl $101, %0:\n\n\t" |
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195 "\nNotSupported2:\n\t" |
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196 "#movl $102, %0:\n\n\t" |
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197 "\nNotSupported3:\n\t" |
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198 "#movl $103, %0:\n\n\t" |
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199 "\nNotSupported4:\n\t" |
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200 "#movl $104, %0:\n\n\t" |
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201 "\nNotSupported5:\n\t" |
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202 "#movl $105, %0:\n\n\t" |
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203 "\nNotSupported6:\n\t" |
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204 "#movl $106, %0:\n\n\t" |
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205 "\nNotSupported7:\n\t" |
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206 "#movl $107, %0:\n\n\t" |
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207 "movl $0, %0:\n\n\t" |
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208 |
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209 "Return:\n\t" |
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210 : "=a" (rval) |
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211 : /* no input */ |
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212 : "eax", "ebx", "ecx", "edx" |
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213 ); |
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214 |
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215 /* Return */ |
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216 return(rval); |
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217 } |
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218 |
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219 /* Function to test if mmx instructions are supported... |
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220 */ |
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221 inline extern int |
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222 mmx_ok(void) |
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223 { |
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224 /* Returns 1 if MMX instructions are supported, 0 otherwise */ |
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225 return ( mm_support() & 0x1 ); |
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226 } |
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227 #endif |
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228 |
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229 /* Helper functions for the instruction macros that follow... |
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230 (note that memory-to-register, m2r, instructions are nearly |
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231 as efficient as register-to-register, r2r, instructions; |
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232 however, memory-to-memory instructions are really simulated |
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233 as a convenience, and are only 1/3 as efficient) |
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234 */ |
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235 #ifdef MMX_TRACE |
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236 |
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237 /* Include the stuff for printing a trace to stderr... |
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238 */ |
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239 |
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240 #define mmx_i2r(op, imm, reg) \ |
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241 { \ |
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242 mmx_t mmx_trace; \ |
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243 mmx_trace.uq = (imm); \ |
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244 printf(#op "_i2r(" #imm "=0x%08x%08x, ", \ |
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245 mmx_trace.d[1], mmx_trace.d[0]); \ |
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246 __asm__ __volatile__ ("movq %%" #reg ", %0" \ |
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247 : "=X" (mmx_trace) \ |
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248 : /* nothing */ ); \ |
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249 printf(#reg "=0x%08x%08x) => ", \ |
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250 mmx_trace.d[1], mmx_trace.d[0]); \ |
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251 __asm__ __volatile__ (#op " %0, %%" #reg \ |
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252 : /* nothing */ \ |
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253 : "X" (imm)); \ |
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254 __asm__ __volatile__ ("movq %%" #reg ", %0" \ |
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255 : "=X" (mmx_trace) \ |
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256 : /* nothing */ ); \ |
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257 printf(#reg "=0x%08x%08x\n", \ |
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258 mmx_trace.d[1], mmx_trace.d[0]); \ |
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259 } |
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260 |
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261 #define mmx_m2r(op, mem, reg) \ |
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262 { \ |
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263 mmx_t mmx_trace; \ |
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264 mmx_trace = (mem); \ |
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265 printf(#op "_m2r(" #mem "=0x%08x%08x, ", \ |
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266 mmx_trace.d[1], mmx_trace.d[0]); \ |
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267 __asm__ __volatile__ ("movq %%" #reg ", %0" \ |
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268 : "=X" (mmx_trace) \ |
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269 : /* nothing */ ); \ |
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270 printf(#reg "=0x%08x%08x) => ", \ |
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271 mmx_trace.d[1], mmx_trace.d[0]); \ |
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272 __asm__ __volatile__ (#op " %0, %%" #reg \ |
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273 : /* nothing */ \ |
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274 : "X" (mem)); \ |
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275 __asm__ __volatile__ ("movq %%" #reg ", %0" \ |
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276 : "=X" (mmx_trace) \ |
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277 : /* nothing */ ); \ |
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278 printf(#reg "=0x%08x%08x\n", \ |
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279 mmx_trace.d[1], mmx_trace.d[0]); \ |
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280 } |
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281 |
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282 #define mmx_r2m(op, reg, mem) \ |
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283 { \ |
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284 mmx_t mmx_trace; \ |
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285 __asm__ __volatile__ ("movq %%" #reg ", %0" \ |
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286 : "=X" (mmx_trace) \ |
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287 : /* nothing */ ); \ |
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288 printf(#op "_r2m(" #reg "=0x%08x%08x, ", \ |
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289 mmx_trace.d[1], mmx_trace.d[0]); \ |
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290 mmx_trace = (mem); \ |
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291 printf(#mem "=0x%08x%08x) => ", \ |
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292 mmx_trace.d[1], mmx_trace.d[0]); \ |
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293 __asm__ __volatile__ (#op " %%" #reg ", %0" \ |
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294 : "=X" (mem) \ |
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295 : /* nothing */ ); \ |
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296 mmx_trace = (mem); \ |
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297 printf(#mem "=0x%08x%08x\n", \ |
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298 mmx_trace.d[1], mmx_trace.d[0]); \ |
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299 } |
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300 |
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301 #define mmx_r2r(op, regs, regd) \ |
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302 { \ |
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303 mmx_t mmx_trace; \ |
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304 __asm__ __volatile__ ("movq %%" #regs ", %0" \ |
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305 : "=X" (mmx_trace) \ |
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306 : /* nothing */ ); \ |
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307 printf(#op "_r2r(" #regs "=0x%08x%08x, ", \ |
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308 mmx_trace.d[1], mmx_trace.d[0]); \ |
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309 __asm__ __volatile__ ("movq %%" #regd ", %0" \ |
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310 : "=X" (mmx_trace) \ |
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311 : /* nothing */ ); \ |
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312 printf(#regd "=0x%08x%08x) => ", \ |
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313 mmx_trace.d[1], mmx_trace.d[0]); \ |
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314 __asm__ __volatile__ (#op " %" #regs ", %" #regd); \ |
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315 __asm__ __volatile__ ("movq %%" #regd ", %0" \ |
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316 : "=X" (mmx_trace) \ |
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317 : /* nothing */ ); \ |
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318 printf(#regd "=0x%08x%08x\n", \ |
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319 mmx_trace.d[1], mmx_trace.d[0]); \ |
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320 } |
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321 |
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322 #define mmx_m2m(op, mems, memd) \ |
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323 { \ |
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324 mmx_t mmx_trace; \ |
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325 mmx_trace = (mems); \ |
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326 printf(#op "_m2m(" #mems "=0x%08x%08x, ", \ |
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327 mmx_trace.d[1], mmx_trace.d[0]); \ |
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328 mmx_trace = (memd); \ |
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329 printf(#memd "=0x%08x%08x) => ", \ |
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330 mmx_trace.d[1], mmx_trace.d[0]); \ |
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331 __asm__ __volatile__ ("movq %0, %%mm0\n\t" \ |
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332 #op " %1, %%mm0\n\t" \ |
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333 "movq %%mm0, %0" \ |
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334 : "=X" (memd) \ |
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335 : "X" (mems)); \ |
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336 mmx_trace = (memd); \ |
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337 printf(#memd "=0x%08x%08x\n", \ |
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338 mmx_trace.d[1], mmx_trace.d[0]); \ |
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339 } |
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340 |
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341 #else |
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342 |
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343 /* These macros are a lot simpler without the tracing... |
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344 */ |
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345 |
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346 #define mmx_i2r(op, imm, reg) \ |
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347 __asm__ __volatile__ (#op " %0, %%" #reg \ |
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348 : /* nothing */ \ |
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349 : "X" (imm) ) |
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350 |
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351 #define mmx_m2r(op, mem, reg) \ |
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352 __asm__ __volatile__ (#op " %0, %%" #reg \ |
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353 : /* nothing */ \ |
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354 : "m" (mem)) |
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355 |
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356 #define mmx_r2m(op, reg, mem) \ |
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357 __asm__ __volatile__ (#op " %%" #reg ", %0" \ |
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358 : "=X" (mem) \ |
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359 : /* nothing */ ) |
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360 |
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361 #define mmx_r2r(op, regs, regd) \ |
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362 __asm__ __volatile__ (#op " %" #regs ", %" #regd) |
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363 |
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364 #define mmx_m2m(op, mems, memd) \ |
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365 __asm__ __volatile__ ("movq %0, %%mm0\n\t" \ |
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366 #op " %1, %%mm0\n\t" \ |
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367 "movq %%mm0, %0" \ |
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368 : "=X" (memd) \ |
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369 : "X" (mems)) |
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370 |
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371 #endif |
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372 |
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373 |
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374 /* 1x64 MOVe Quadword |
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375 (this is both a load and a store... |
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376 in fact, it is the only way to store) |
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377 */ |
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378 #define movq_m2r(var, reg) mmx_m2r(movq, var, reg) |
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379 #define movq_r2m(reg, var) mmx_r2m(movq, reg, var) |
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380 #define movq_r2r(regs, regd) mmx_r2r(movq, regs, regd) |
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381 #define movq(vars, vard) \ |
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382 __asm__ __volatile__ ("movq %1, %%mm0\n\t" \ |
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383 "movq %%mm0, %0" \ |
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384 : "=X" (vard) \ |
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385 : "X" (vars)) |
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386 |
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387 |
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388 /* 1x32 MOVe Doubleword |
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389 (like movq, this is both load and store... |
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390 but is most useful for moving things between |
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391 mmx registers and ordinary registers) |
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392 */ |
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393 #define movd_m2r(var, reg) mmx_m2r(movd, var, reg) |
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394 #define movd_r2m(reg, var) mmx_r2m(movd, reg, var) |
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395 #define movd_r2r(regs, regd) mmx_r2r(movd, regs, regd) |
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396 #define movd(vars, vard) \ |
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397 __asm__ __volatile__ ("movd %1, %%mm0\n\t" \ |
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398 "movd %%mm0, %0" \ |
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399 : "=X" (vard) \ |
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400 : "X" (vars)) |
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401 |
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402 |
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403 /* 2x32, 4x16, and 8x8 Parallel ADDs |
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404 */ |
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405 #define paddd_m2r(var, reg) mmx_m2r(paddd, var, reg) |
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406 #define paddd_r2r(regs, regd) mmx_r2r(paddd, regs, regd) |
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407 #define paddd(vars, vard) mmx_m2m(paddd, vars, vard) |
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408 |
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409 #define paddw_m2r(var, reg) mmx_m2r(paddw, var, reg) |
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410 #define paddw_r2r(regs, regd) mmx_r2r(paddw, regs, regd) |
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411 #define paddw(vars, vard) mmx_m2m(paddw, vars, vard) |
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412 |
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413 #define paddb_m2r(var, reg) mmx_m2r(paddb, var, reg) |
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414 #define paddb_r2r(regs, regd) mmx_r2r(paddb, regs, regd) |
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415 #define paddb(vars, vard) mmx_m2m(paddb, vars, vard) |
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416 |
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417 |
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418 /* 4x16 and 8x8 Parallel ADDs using Saturation arithmetic |
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419 */ |
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420 #define paddsw_m2r(var, reg) mmx_m2r(paddsw, var, reg) |
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421 #define paddsw_r2r(regs, regd) mmx_r2r(paddsw, regs, regd) |
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422 #define paddsw(vars, vard) mmx_m2m(paddsw, vars, vard) |
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423 |
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424 #define paddsb_m2r(var, reg) mmx_m2r(paddsb, var, reg) |
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425 #define paddsb_r2r(regs, regd) mmx_r2r(paddsb, regs, regd) |
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426 #define paddsb(vars, vard) mmx_m2m(paddsb, vars, vard) |
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427 |
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428 |
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429 /* 4x16 and 8x8 Parallel ADDs using Unsigned Saturation arithmetic |
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430 */ |
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431 #define paddusw_m2r(var, reg) mmx_m2r(paddusw, var, reg) |
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432 #define paddusw_r2r(regs, regd) mmx_r2r(paddusw, regs, regd) |
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433 #define paddusw(vars, vard) mmx_m2m(paddusw, vars, vard) |
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434 |
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435 #define paddusb_m2r(var, reg) mmx_m2r(paddusb, var, reg) |
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436 #define paddusb_r2r(regs, regd) mmx_r2r(paddusb, regs, regd) |
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437 #define paddusb(vars, vard) mmx_m2m(paddusb, vars, vard) |
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438 |
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439 |
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440 /* 2x32, 4x16, and 8x8 Parallel SUBs |
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441 */ |
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442 #define psubd_m2r(var, reg) mmx_m2r(psubd, var, reg) |
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443 #define psubd_r2r(regs, regd) mmx_r2r(psubd, regs, regd) |
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444 #define psubd(vars, vard) mmx_m2m(psubd, vars, vard) |
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445 |
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446 #define psubw_m2r(var, reg) mmx_m2r(psubw, var, reg) |
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447 #define psubw_r2r(regs, regd) mmx_r2r(psubw, regs, regd) |
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448 #define psubw(vars, vard) mmx_m2m(psubw, vars, vard) |
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449 |
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450 #define psubb_m2r(var, reg) mmx_m2r(psubb, var, reg) |
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451 #define psubb_r2r(regs, regd) mmx_r2r(psubb, regs, regd) |
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452 #define psubb(vars, vard) mmx_m2m(psubb, vars, vard) |
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453 |
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454 |
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455 /* 4x16 and 8x8 Parallel SUBs using Saturation arithmetic |
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456 */ |
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457 #define psubsw_m2r(var, reg) mmx_m2r(psubsw, var, reg) |
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458 #define psubsw_r2r(regs, regd) mmx_r2r(psubsw, regs, regd) |
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459 #define psubsw(vars, vard) mmx_m2m(psubsw, vars, vard) |
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460 |
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461 #define psubsb_m2r(var, reg) mmx_m2r(psubsb, var, reg) |
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462 #define psubsb_r2r(regs, regd) mmx_r2r(psubsb, regs, regd) |
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463 #define psubsb(vars, vard) mmx_m2m(psubsb, vars, vard) |
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464 |
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465 |
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466 /* 4x16 and 8x8 Parallel SUBs using Unsigned Saturation arithmetic |
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467 */ |
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468 #define psubusw_m2r(var, reg) mmx_m2r(psubusw, var, reg) |
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469 #define psubusw_r2r(regs, regd) mmx_r2r(psubusw, regs, regd) |
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470 #define psubusw(vars, vard) mmx_m2m(psubusw, vars, vard) |
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471 |
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472 #define psubusb_m2r(var, reg) mmx_m2r(psubusb, var, reg) |
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473 #define psubusb_r2r(regs, regd) mmx_r2r(psubusb, regs, regd) |
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474 #define psubusb(vars, vard) mmx_m2m(psubusb, vars, vard) |
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475 |
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476 |
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477 /* 4x16 Parallel MULs giving Low 4x16 portions of results |
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478 */ |
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479 #define pmullw_m2r(var, reg) mmx_m2r(pmullw, var, reg) |
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480 #define pmullw_r2r(regs, regd) mmx_r2r(pmullw, regs, regd) |
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481 #define pmullw(vars, vard) mmx_m2m(pmullw, vars, vard) |
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482 |
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483 |
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484 /* 4x16 Parallel MULs giving High 4x16 portions of results |
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485 */ |
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486 #define pmulhw_m2r(var, reg) mmx_m2r(pmulhw, var, reg) |
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487 #define pmulhw_r2r(regs, regd) mmx_r2r(pmulhw, regs, regd) |
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488 #define pmulhw(vars, vard) mmx_m2m(pmulhw, vars, vard) |
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489 |
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490 |
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491 /* 4x16->2x32 Parallel Mul-ADD |
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492 (muls like pmullw, then adds adjacent 16-bit fields |
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493 in the multiply result to make the final 2x32 result) |
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494 */ |
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495 #define pmaddwd_m2r(var, reg) mmx_m2r(pmaddwd, var, reg) |
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496 #define pmaddwd_r2r(regs, regd) mmx_r2r(pmaddwd, regs, regd) |
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497 #define pmaddwd(vars, vard) mmx_m2m(pmaddwd, vars, vard) |
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498 |
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499 |
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500 /* 1x64 bitwise AND |
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501 */ |
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502 #ifdef BROKEN_PAND |
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503 #define pand_m2r(var, reg) \ |
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504 { \ |
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505 mmx_m2r(pandn, (mmx_t) -1LL, reg); \ |
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506 mmx_m2r(pandn, var, reg); \ |
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507 } |
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508 #define pand_r2r(regs, regd) \ |
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509 { \ |
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510 mmx_m2r(pandn, (mmx_t) -1LL, regd); \ |
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511 mmx_r2r(pandn, regs, regd) \ |
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512 } |
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513 #define pand(vars, vard) \ |
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514 { \ |
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515 movq_m2r(vard, mm0); \ |
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516 mmx_m2r(pandn, (mmx_t) -1LL, mm0); \ |
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517 mmx_m2r(pandn, vars, mm0); \ |
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518 movq_r2m(mm0, vard); \ |
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519 } |
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520 #else |
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521 #define pand_m2r(var, reg) mmx_m2r(pand, var, reg) |
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522 #define pand_r2r(regs, regd) mmx_r2r(pand, regs, regd) |
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523 #define pand(vars, vard) mmx_m2m(pand, vars, vard) |
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524 #endif |
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525 |
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526 |
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527 /* 1x64 bitwise AND with Not the destination |
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528 */ |
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529 #define pandn_m2r(var, reg) mmx_m2r(pandn, var, reg) |
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530 #define pandn_r2r(regs, regd) mmx_r2r(pandn, regs, regd) |
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531 #define pandn(vars, vard) mmx_m2m(pandn, vars, vard) |
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532 |
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533 |
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534 /* 1x64 bitwise OR |
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535 */ |
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536 #define por_m2r(var, reg) mmx_m2r(por, var, reg) |
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537 #define por_r2r(regs, regd) mmx_r2r(por, regs, regd) |
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538 #define por(vars, vard) mmx_m2m(por, vars, vard) |
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539 |
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540 |
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541 /* 1x64 bitwise eXclusive OR |
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542 */ |
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543 #define pxor_m2r(var, reg) mmx_m2r(pxor, var, reg) |
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544 #define pxor_r2r(regs, regd) mmx_r2r(pxor, regs, regd) |
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545 #define pxor(vars, vard) mmx_m2m(pxor, vars, vard) |
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546 |
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547 |
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548 /* 2x32, 4x16, and 8x8 Parallel CoMPare for EQuality |
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549 (resulting fields are either 0 or -1) |
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550 */ |
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551 #define pcmpeqd_m2r(var, reg) mmx_m2r(pcmpeqd, var, reg) |
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552 #define pcmpeqd_r2r(regs, regd) mmx_r2r(pcmpeqd, regs, regd) |
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553 #define pcmpeqd(vars, vard) mmx_m2m(pcmpeqd, vars, vard) |
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554 |
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555 #define pcmpeqw_m2r(var, reg) mmx_m2r(pcmpeqw, var, reg) |
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556 #define pcmpeqw_r2r(regs, regd) mmx_r2r(pcmpeqw, regs, regd) |
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557 #define pcmpeqw(vars, vard) mmx_m2m(pcmpeqw, vars, vard) |
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558 |
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559 #define pcmpeqb_m2r(var, reg) mmx_m2r(pcmpeqb, var, reg) |
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560 #define pcmpeqb_r2r(regs, regd) mmx_r2r(pcmpeqb, regs, regd) |
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561 #define pcmpeqb(vars, vard) mmx_m2m(pcmpeqb, vars, vard) |
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562 |
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563 |
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564 /* 2x32, 4x16, and 8x8 Parallel CoMPare for Greater Than |
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565 (resulting fields are either 0 or -1) |
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566 */ |
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567 #define pcmpgtd_m2r(var, reg) mmx_m2r(pcmpgtd, var, reg) |
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568 #define pcmpgtd_r2r(regs, regd) mmx_r2r(pcmpgtd, regs, regd) |
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569 #define pcmpgtd(vars, vard) mmx_m2m(pcmpgtd, vars, vard) |
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570 |
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571 #define pcmpgtw_m2r(var, reg) mmx_m2r(pcmpgtw, var, reg) |
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572 #define pcmpgtw_r2r(regs, regd) mmx_r2r(pcmpgtw, regs, regd) |
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573 #define pcmpgtw(vars, vard) mmx_m2m(pcmpgtw, vars, vard) |
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574 |
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575 #define pcmpgtb_m2r(var, reg) mmx_m2r(pcmpgtb, var, reg) |
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576 #define pcmpgtb_r2r(regs, regd) mmx_r2r(pcmpgtb, regs, regd) |
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577 #define pcmpgtb(vars, vard) mmx_m2m(pcmpgtb, vars, vard) |
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578 |
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579 |
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580 /* 1x64, 2x32, and 4x16 Parallel Shift Left Logical |
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581 */ |
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582 #define psllq_i2r(imm, reg) mmx_i2r(psllq, imm, reg) |
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583 #define psllq_m2r(var, reg) mmx_m2r(psllq, var, reg) |
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584 #define psllq_r2r(regs, regd) mmx_r2r(psllq, regs, regd) |
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585 #define psllq(vars, vard) mmx_m2m(psllq, vars, vard) |
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586 |
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587 #define pslld_i2r(imm, reg) mmx_i2r(pslld, imm, reg) |
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588 #define pslld_m2r(var, reg) mmx_m2r(pslld, var, reg) |
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589 #define pslld_r2r(regs, regd) mmx_r2r(pslld, regs, regd) |
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590 #define pslld(vars, vard) mmx_m2m(pslld, vars, vard) |
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591 |
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592 #define psllw_i2r(imm, reg) mmx_i2r(psllw, imm, reg) |
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593 #define psllw_m2r(var, reg) mmx_m2r(psllw, var, reg) |
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594 #define psllw_r2r(regs, regd) mmx_r2r(psllw, regs, regd) |
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595 #define psllw(vars, vard) mmx_m2m(psllw, vars, vard) |
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596 |
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597 |
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598 /* 1x64, 2x32, and 4x16 Parallel Shift Right Logical |
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599 */ |
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600 #define psrlq_i2r(imm, reg) mmx_i2r(psrlq, imm, reg) |
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601 #define psrlq_m2r(var, reg) mmx_m2r(psrlq, var, reg) |
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602 #define psrlq_r2r(regs, regd) mmx_r2r(psrlq, regs, regd) |
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603 #define psrlq(vars, vard) mmx_m2m(psrlq, vars, vard) |
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604 |
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605 #define psrld_i2r(imm, reg) mmx_i2r(psrld, imm, reg) |
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606 #define psrld_m2r(var, reg) mmx_m2r(psrld, var, reg) |
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607 #define psrld_r2r(regs, regd) mmx_r2r(psrld, regs, regd) |
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608 #define psrld(vars, vard) mmx_m2m(psrld, vars, vard) |
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609 |
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610 #define psrlw_i2r(imm, reg) mmx_i2r(psrlw, imm, reg) |
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611 #define psrlw_m2r(var, reg) mmx_m2r(psrlw, var, reg) |
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612 #define psrlw_r2r(regs, regd) mmx_r2r(psrlw, regs, regd) |
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613 #define psrlw(vars, vard) mmx_m2m(psrlw, vars, vard) |
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614 |
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615 |
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616 /* 2x32 and 4x16 Parallel Shift Right Arithmetic |
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617 */ |
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618 #define psrad_i2r(imm, reg) mmx_i2r(psrad, imm, reg) |
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619 #define psrad_m2r(var, reg) mmx_m2r(psrad, var, reg) |
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620 #define psrad_r2r(regs, regd) mmx_r2r(psrad, regs, regd) |
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621 #define psrad(vars, vard) mmx_m2m(psrad, vars, vard) |
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622 |
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623 #define psraw_i2r(imm, reg) mmx_i2r(psraw, imm, reg) |
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624 #define psraw_m2r(var, reg) mmx_m2r(psraw, var, reg) |
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625 #define psraw_r2r(regs, regd) mmx_r2r(psraw, regs, regd) |
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626 #define psraw(vars, vard) mmx_m2m(psraw, vars, vard) |
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627 |
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628 |
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629 /* 2x32->4x16 and 4x16->8x8 PACK and Signed Saturate |
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630 (packs source and dest fields into dest in that order) |
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631 */ |
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632 #define packssdw_m2r(var, reg) mmx_m2r(packssdw, var, reg) |
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633 #define packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd) |
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634 #define packssdw(vars, vard) mmx_m2m(packssdw, vars, vard) |
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635 |
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636 #define packsswb_m2r(var, reg) mmx_m2r(packsswb, var, reg) |
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637 #define packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd) |
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638 #define packsswb(vars, vard) mmx_m2m(packsswb, vars, vard) |
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639 |
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640 |
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641 /* 4x16->8x8 PACK and Unsigned Saturate |
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642 (packs source and dest fields into dest in that order) |
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643 */ |
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644 #define packuswb_m2r(var, reg) mmx_m2r(packuswb, var, reg) |
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645 #define packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd) |
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646 #define packuswb(vars, vard) mmx_m2m(packuswb, vars, vard) |
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647 |
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648 |
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649 /* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK Low |
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650 (interleaves low half of dest with low half of source |
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651 as padding in each result field) |
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652 */ |
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653 #define punpckldq_m2r(var, reg) mmx_m2r(punpckldq, var, reg) |
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654 #define punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd) |
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655 #define punpckldq(vars, vard) mmx_m2m(punpckldq, vars, vard) |
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656 |
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657 #define punpcklwd_m2r(var, reg) mmx_m2r(punpcklwd, var, reg) |
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658 #define punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd) |
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659 #define punpcklwd(vars, vard) mmx_m2m(punpcklwd, vars, vard) |
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660 |
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661 #define punpcklbw_m2r(var, reg) mmx_m2r(punpcklbw, var, reg) |
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662 #define punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd) |
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663 #define punpcklbw(vars, vard) mmx_m2m(punpcklbw, vars, vard) |
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664 |
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665 |
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666 /* 2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK High |
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667 (interleaves high half of dest with high half of source |
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668 as padding in each result field) |
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669 */ |
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670 #define punpckhdq_m2r(var, reg) mmx_m2r(punpckhdq, var, reg) |
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671 #define punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd) |
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672 #define punpckhdq(vars, vard) mmx_m2m(punpckhdq, vars, vard) |
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673 |
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674 #define punpckhwd_m2r(var, reg) mmx_m2r(punpckhwd, var, reg) |
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675 #define punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd) |
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676 #define punpckhwd(vars, vard) mmx_m2m(punpckhwd, vars, vard) |
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677 |
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678 #define punpckhbw_m2r(var, reg) mmx_m2r(punpckhbw, var, reg) |
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679 #define punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd) |
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680 #define punpckhbw(vars, vard) mmx_m2m(punpckhbw, vars, vard) |
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681 |
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682 |
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683 /* Empty MMx State |
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684 (used to clean-up when going from mmx to float use |
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685 of the registers that are shared by both; note that |
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686 there is no float-to-mmx operation needed, because |
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687 only the float tag word info is corruptible) |
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688 */ |
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689 #ifdef MMX_TRACE |
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690 |
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691 #define emms() \ |
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692 { \ |
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693 printf("emms()\n"); \ |
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694 __asm__ __volatile__ ("emms"); \ |
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695 } |
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696 |
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697 #else |
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698 |
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699 #define emms() __asm__ __volatile__ ("emms") |
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700 |
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701 #endif |
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702 |
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703 #endif |
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704 |