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1 /* |
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2 * PXA270-based Intel Mainstone platforms. |
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3 * |
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4 * Copyright (c) 2007 by Armin Kuster <akuster@kama-aina.net> or |
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5 * <akuster@mvista.com> |
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6 * |
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7 * This code is licensed under the GNU GPL v2. |
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8 */ |
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9 |
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10 #ifndef __MAINSTONE_H__ |
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11 #define __MAINSTONE_H__ |
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12 |
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13 /* Device addresses */ |
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14 #define MST_FPGA_PHYS 0x08000000 |
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15 #define MST_ETH_PHYS 0x10000300 |
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16 #define MST_FLASH_0 0x00000000 |
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17 #define MST_FLASH_1 0x04000000 |
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18 |
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19 /* IRQ definitions */ |
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20 #define MMC_IRQ 0 |
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21 #define USIM_IRQ 1 |
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22 #define USBC_IRQ 2 |
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23 #define ETHERNET_IRQ 3 |
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24 #define AC97_IRQ 4 |
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25 #define PEN_IRQ 5 |
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26 #define MSINS_IRQ 6 |
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27 #define EXBRD_IRQ 7 |
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28 #define S0_CD_IRQ 9 |
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29 #define S0_STSCHG_IRQ 10 |
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30 #define S0_IRQ 11 |
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31 #define S1_CD_IRQ 13 |
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32 #define S1_STSCHG_IRQ 14 |
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33 #define S1_IRQ 15 |
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34 |
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35 extern qemu_irq |
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36 *mst_irq_init(struct pxa2xx_state_s *cpu, uint32_t base, int irq); |
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37 |
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38 #endif /* __MAINSTONE_H__ */ |