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1 /* PowerPC hardware exceptions management helpers */ |
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2 typedef void (*clk_setup_cb)(void *opaque, uint32_t freq); |
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3 typedef struct clk_setup_t clk_setup_t; |
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4 struct clk_setup_t { |
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5 clk_setup_cb cb; |
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6 void *opaque; |
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7 }; |
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8 static inline void clk_setup (clk_setup_t *clk, uint32_t freq) |
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9 { |
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10 if (clk->cb != NULL) |
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11 (*clk->cb)(clk->opaque, freq); |
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12 } |
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13 |
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14 clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
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15 /* Embedded PowerPC DCR management */ |
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16 typedef target_ulong (*dcr_read_cb)(void *opaque, int dcrn); |
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17 typedef void (*dcr_write_cb)(void *opaque, int dcrn, target_ulong val); |
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18 int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn), |
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19 int (*dcr_write_error)(int dcrn)); |
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20 int ppc_dcr_register (CPUState *env, int dcrn, void *opaque, |
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21 dcr_read_cb drc_read, dcr_write_cb dcr_write); |
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22 clk_setup_cb ppc_emb_timers_init (CPUState *env, uint32_t freq); |
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23 /* Embedded PowerPC reset */ |
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24 void ppc40x_core_reset (CPUState *env); |
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25 void ppc40x_chip_reset (CPUState *env); |
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26 void ppc40x_system_reset (CPUState *env); |
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27 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
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28 |
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29 extern CPUWriteMemoryFunc *PPC_io_write[]; |
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30 extern CPUReadMemoryFunc *PPC_io_read[]; |
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31 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
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32 |
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33 void ppc40x_irq_init (CPUState *env); |
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34 void ppc6xx_irq_init (CPUState *env); |
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35 void ppc970_irq_init (CPUState *env); |