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1 /* |
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2 * KQEMU header |
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3 * |
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4 * Copyright (c) 2004-2008 Fabrice Bellard |
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5 * |
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6 * Permission is hereby granted, free of charge, to any person obtaining a copy |
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7 * of this software and associated documentation files (the "Software"), to deal |
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8 * in the Software without restriction, including without limitation the rights |
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9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
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10 * copies of the Software, and to permit persons to whom the Software is |
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11 * furnished to do so, subject to the following conditions: |
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12 * |
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13 * The above copyright notice and this permission notice shall be included in |
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14 * all copies or substantial portions of the Software. |
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15 * |
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16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
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22 * THE SOFTWARE. |
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23 */ |
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24 #ifndef KQEMU_H |
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25 #define KQEMU_H |
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26 |
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27 #if defined(__i386__) |
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28 #define KQEMU_PAD32(x) x |
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29 #else |
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30 #define KQEMU_PAD32(x) |
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31 #endif |
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32 |
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33 #define KQEMU_VERSION 0x010400 |
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34 |
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35 struct kqemu_segment_cache { |
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36 uint16_t selector; |
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37 uint16_t padding1; |
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38 uint32_t flags; |
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39 uint64_t base; |
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40 uint32_t limit; |
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41 uint32_t padding2; |
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42 }; |
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43 |
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44 struct kqemu_cpu_state { |
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45 uint64_t regs[16]; |
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46 uint64_t eip; |
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47 uint64_t eflags; |
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48 |
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49 struct kqemu_segment_cache segs[6]; /* selector values */ |
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50 struct kqemu_segment_cache ldt; |
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51 struct kqemu_segment_cache tr; |
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52 struct kqemu_segment_cache gdt; /* only base and limit are used */ |
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53 struct kqemu_segment_cache idt; /* only base and limit are used */ |
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54 |
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55 uint64_t cr0; |
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56 uint64_t cr2; |
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57 uint64_t cr3; |
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58 uint64_t cr4; |
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59 uint64_t a20_mask; |
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60 |
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61 /* sysenter registers */ |
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62 uint64_t sysenter_cs; |
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63 uint64_t sysenter_esp; |
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64 uint64_t sysenter_eip; |
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65 uint64_t efer; |
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66 uint64_t star; |
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67 |
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68 uint64_t lstar; |
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69 uint64_t cstar; |
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70 uint64_t fmask; |
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71 uint64_t kernelgsbase; |
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72 |
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73 uint64_t tsc_offset; |
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74 |
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75 uint64_t dr0; |
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76 uint64_t dr1; |
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77 uint64_t dr2; |
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78 uint64_t dr3; |
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79 uint64_t dr6; |
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80 uint64_t dr7; |
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81 |
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82 uint8_t cpl; |
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83 uint8_t user_only; |
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84 uint16_t padding1; |
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85 |
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86 uint32_t error_code; /* error_code when exiting with an exception */ |
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87 uint64_t next_eip; /* next eip value when exiting with an interrupt */ |
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88 uint32_t nb_pages_to_flush; /* number of pages to flush, |
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89 KQEMU_FLUSH_ALL means full flush */ |
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90 #define KQEMU_MAX_PAGES_TO_FLUSH 512 |
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91 #define KQEMU_FLUSH_ALL (KQEMU_MAX_PAGES_TO_FLUSH + 1) |
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92 |
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93 int32_t retval; |
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94 |
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95 /* number of ram_dirty entries to update */ |
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96 uint32_t nb_ram_pages_to_update; |
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97 #define KQEMU_MAX_RAM_PAGES_TO_UPDATE 512 |
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98 #define KQEMU_RAM_PAGES_UPDATE_ALL (KQEMU_MAX_RAM_PAGES_TO_UPDATE + 1) |
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99 |
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100 #define KQEMU_MAX_MODIFIED_RAM_PAGES 512 |
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101 uint32_t nb_modified_ram_pages; |
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102 }; |
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103 |
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104 struct kqemu_init { |
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105 uint8_t *ram_base; /* must be page aligned */ |
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106 KQEMU_PAD32(uint32_t padding1;) |
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107 uint64_t ram_size; /* must be multiple of 4 KB */ |
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108 uint8_t *ram_dirty; /* must be page aligned */ |
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109 KQEMU_PAD32(uint32_t padding2;) |
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110 uint64_t *pages_to_flush; /* must be page aligned */ |
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111 KQEMU_PAD32(uint32_t padding4;) |
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112 uint64_t *ram_pages_to_update; /* must be page aligned */ |
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113 KQEMU_PAD32(uint32_t padding5;) |
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114 uint64_t *modified_ram_pages; /* must be page aligned */ |
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115 KQEMU_PAD32(uint32_t padding6;) |
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116 }; |
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117 |
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118 #define KQEMU_IO_MEM_RAM 0 |
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119 #define KQEMU_IO_MEM_ROM 1 |
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120 #define KQEMU_IO_MEM_COMM 2 /* kqemu communication page */ |
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121 #define KQEMU_IO_MEM_UNASSIGNED 3 /* any device: return to application */ |
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122 |
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123 struct kqemu_phys_mem { |
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124 uint64_t phys_addr; /* physical address range: phys_addr, |
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125 phys_addr + size */ |
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126 uint64_t size; |
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127 uint64_t ram_addr; /* corresponding ram address */ |
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128 uint32_t io_index; /* memory type: see KQEMU_IO_MEM_xxx */ |
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129 uint32_t padding1; |
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130 }; |
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131 |
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132 #define KQEMU_RET_ABORT (-1) |
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133 #define KQEMU_RET_EXCEPTION 0x0000 /* 8 low order bit are the exception */ |
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134 #define KQEMU_RET_INT 0x0100 /* 8 low order bit are the interrupt */ |
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135 #define KQEMU_RET_SOFTMMU 0x0200 /* emulation needed (I/O or |
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136 unsupported INSN) */ |
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137 #define KQEMU_RET_INTR 0x0201 /* interrupted by a signal */ |
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138 #define KQEMU_RET_SYSCALL 0x0300 /* syscall insn */ |
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139 |
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140 #ifdef _WIN32 |
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141 #define KQEMU_EXEC CTL_CODE(FILE_DEVICE_UNKNOWN, 1, METHOD_BUFFERED, FILE_READ_ACCESS | FILE_WRITE_ACCESS) |
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142 #define KQEMU_INIT CTL_CODE(FILE_DEVICE_UNKNOWN, 2, METHOD_BUFFERED, FILE_WRITE_ACCESS) |
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143 #define KQEMU_GET_VERSION CTL_CODE(FILE_DEVICE_UNKNOWN, 3, METHOD_BUFFERED, FILE_READ_ACCESS) |
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144 #define KQEMU_MODIFY_RAM_PAGES CTL_CODE(FILE_DEVICE_UNKNOWN, 4, METHOD_BUFFERED, FILE_WRITE_ACCESS) |
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145 #define KQEMU_SET_PHYS_MEM CTL_CODE(FILE_DEVICE_UNKNOWN, 5, METHOD_BUFFERED, FILE_WRITE_ACCESS) |
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146 #else |
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147 #define KQEMU_EXEC _IOWR('q', 1, struct kqemu_cpu_state) |
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148 #define KQEMU_INIT _IOW('q', 2, struct kqemu_init) |
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149 #define KQEMU_GET_VERSION _IOR('q', 3, int) |
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150 #define KQEMU_MODIFY_RAM_PAGES _IOW('q', 4, int) |
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151 #define KQEMU_SET_PHYS_MEM _IOW('q', 5, struct kqemu_phys_mem) |
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152 #endif |
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153 |
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154 #endif /* KQEMU_H */ |