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1 /* |
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2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of the License "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 |
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18 //macro __CPU_ARM926J__ |
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19 //#define __CPU__ ARM926EJ-S |
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20 |
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21 //macro __CPU_ARM1136__ |
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22 |
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23 //#define __CPU_ARM1176__ |
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24 |
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25 macro __CPU_CORTEX_A8N__ |
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26 macro __VFP_V3 |
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27 #define SYBORG |
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28 macro __SYBORG__ |
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29 |
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30 #define MM_MULTIPLE |
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31 //#define MM_FLEXIBLE |
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32 |
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33 // TO DO: decide if we need to switch these on or off!! |
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34 // |
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35 // Uncomment the following line if using the r1p0 release or later of the ARM1136 processor. |
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36 // |
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37 //#define __CPU_ARM1136_IS_R1__ |
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38 // |
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39 |
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40 /* Uncomment if ARM1136 Erratum 351912 |
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41 * "VFP11 double precision multiply can corrupt data" |
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42 * is fixed on this hardware. |
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43 */ |
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44 //macro __CPU_ARM1136_ERRATUM_351912_FIXED |
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45 |
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46 /* Uncomment if ARM1136 Erratum 353494 |
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47 * "Rare conditions can cause corruption of the Instruction Cache" |
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48 * is fixed on this hardware. |
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49 */ |
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50 //macro __CPU_ARM1136_ERRATUM_353494_FIXED |
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51 |
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52 /* Uncomment if ARM1136 Erratum 371025 |
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53 * "Invalidate Instruction Cache operation can fail" |
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54 * is fixed on this hardware. |
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55 */ |
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56 //macro __CPU_ARM1136_ERRATUM_371025_FIXED |
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57 |
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58 /* Uncomment if using ARM1136 processor and ARM1136 Erratum 399234 |
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59 * "Write back data cache entry evicted by write through entry causes data corruption" |
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60 * is fixed on this hardware. |
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61 * Workaround |
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62 * The erratum may be avoided by marking all cacheable memory as one of write through or write back. |
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63 * This requires the memory attributes described in the translation tables to be modified by software |
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64 * appropriately, or the use of the remapping capability to remap write through regions to non cacheable. |
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65 * If this macro is enabled, it should be acompanied by: |
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66 * GBLL CFG_CPU_ARM1136_ERRATUM_399234_FIXED in config.inc |
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67 */ |
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68 //macro __CPU_ARM1136_ERRATUM_399234_FIXED |
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69 |
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70 /* Uncomment if ARM1136 Erratum 408022 "Cancelled write to CONTEXTID register might update ASID" |
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71 * is fixed on this hardware. |
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72 */ |
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73 //macro __CPU_ARM1136_ERRATUM_408022_FIXED |
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74 |
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75 // TO DO: |
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76 // |
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77 // Uncomment the next line if using the ARM1136 processor and ARM1136 Erratum 406973 |
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78 // "CLREX instruction might be ignored during data cache line fill" |
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79 // is fixed on this hardware. |
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80 // |
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81 //#define __CPU_ARM1136_ERRATUM_406973_FIXED |
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82 |
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83 |
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84 // Uncomment if: |
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85 // 1) using ARM1136 processor and ARM1136 Erratum 411920: "Invalidate Entire Instruction Cache |
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86 // operation might fail to invalidate some lines if coincident with linefill" |
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87 // is fixed on this hardware, or |
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88 // 2) using ARM1176 processor and ARM1176 Erratum 415045: "Invalidate Entire Instruction Cache |
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89 // operation might fail to invalidate some lines if coincident with linefill |
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90 // is fixed on this hardware. |
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91 // Workaround: |
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92 // 1) Disables the use of of prefetch range cache operations by setting RV bit in Auxiliary Ctrl Reg. |
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93 // 2) Replaces Invalidate ICache operation with the sequence defined in the errata document. |
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94 // If this macro is enabled, it should be accompanied by: |
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95 // "GBLL CFG_CPU_ARM1136_ERRATUM_411920_FIXED" in variant.mmh |
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96 // |
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97 //macro __CPU_ARM1136_ERRATUM_411920_FIXED |
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98 |
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99 |
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100 |
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101 macro __CPU_HAS_VFP |
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102 #define USE_VFP_MATH |
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103 // !@! not moving when 1136 |
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104 //#define MM_MOVING |
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105 macro __DEBUGGER_SUPPORT__ |
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106 macro FASTTRACE_KERNEL_ALL |
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107 macro __EMI_SUPPORT__ |
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108 |
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109 #define VariantTarget(name,ext) _syborg_##name##.##ext |
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110 #define AsspNKernIncludePath \..\..\src\cedar\generic\base\syborg\specific |
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111 #define VariantMediaDefIncludePath AsspNKernIncludePath |
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112 #define PlatformLib kasyborg.lib |
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113 |
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114 systeminclude \epoc32\include\memmodel\epoc\mmubase |
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115 //systeminclude \epoc32\include\memmodel\epoc\moving |
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116 //systeminclude \epoc32\include\memmodel\epoc\moving\arm |
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117 //systeminclude \epoc32\include\memmodel\epoc\flexible |
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118 //systeminclude \epoc32\include\memmodel\epoc\flexible\arm |
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119 systeminclude \epoc32\include\memmodel\epoc\multiple |
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120 systeminclude \epoc32\include\memmodel\epoc\multiple\arm |
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121 |
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122 systeminclude ..\soc\interface |
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123 |
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124 // Uncomment for T_USERCOMDEB test |
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125 //#define BUILD_TESTS |
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126 |
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127 #ifdef BUILD_TESTS |
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128 macro BTRACE_KERNEL_ALL |
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129 #endif |
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130 |
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131 //OPTION_REPLACE ARMCC --cpu __CPU__ |
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132 //OPTION_REPLACE ARMASM --cpu __CPU__ |