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symbian-qemu-0.9.1-12/qemu-symbian-svp/gdb-xml/arm-vfp3.xml
author mikek
Mon, 05 Jul 2010 15:30:26 +0100
branchGCC_SURGE
changeset 87 42ae69d3c4a8
parent 1 2fb8b9db1c86
permissions -rw-r--r--
1) Fix for Bug 3157 - Compilation error in gui_common.h 2) Fix for Bug 3158 - Compilation error in qemu-char.c 3) Fix for Bug 3160 - [GCCE] Illegal instruction in baseport/syborg/bootstrap/syborg.s 4) Fix for Bug 3162 - [GCCE] VFP math support needs excluded to build syborg ROM 5) Fix for Bug 3163 - [GCCE] Syborg baseport build breaks when EPOCROOT is not filesystem root 6) Fix for Bug 3164 - [GCCE] baseport/syborg/bld.inf needs to discriminate GCCE from ARMCC

<?xml version="1.0"?>
<!-- Copyright (C) 2008 Free Software Foundation, Inc.

     Copying and distribution of this file, with or without modification,
     are permitted in any medium without royalty provided the copyright
     notice and this notice are preserved.  -->
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.arm.vfpv3">
  <reg name="d0" bitsize="64" type="float"/>
  <reg name="d1" bitsize="64" type="float"/>
  <reg name="d2" bitsize="64" type="float"/>
  <reg name="d3" bitsize="64" type="float"/>
  <reg name="d4" bitsize="64" type="float"/>
  <reg name="d5" bitsize="64" type="float"/>
  <reg name="d6" bitsize="64" type="float"/>
  <reg name="d7" bitsize="64" type="float"/>
  <reg name="d8" bitsize="64" type="float"/>
  <reg name="d9" bitsize="64" type="float"/>
  <reg name="d10" bitsize="64" type="float"/>
  <reg name="d11" bitsize="64" type="float"/>
  <reg name="d12" bitsize="64" type="float"/>
  <reg name="d13" bitsize="64" type="float"/>
  <reg name="d14" bitsize="64" type="float"/>
  <reg name="d15" bitsize="64" type="float"/>
  <reg name="d16" bitsize="64" type="float"/>
  <reg name="d17" bitsize="64" type="float"/>
  <reg name="d18" bitsize="64" type="float"/>
  <reg name="d19" bitsize="64" type="float"/>
  <reg name="d20" bitsize="64" type="float"/>
  <reg name="d21" bitsize="64" type="float"/>
  <reg name="d22" bitsize="64" type="float"/>
  <reg name="d23" bitsize="64" type="float"/>
  <reg name="d24" bitsize="64" type="float"/>
  <reg name="d25" bitsize="64" type="float"/>
  <reg name="d26" bitsize="64" type="float"/>
  <reg name="d27" bitsize="64" type="float"/>
  <reg name="d28" bitsize="64" type="float"/>
  <reg name="d29" bitsize="64" type="float"/>
  <reg name="d30" bitsize="64" type="float"/>
  <reg name="d31" bitsize="64" type="float"/>

  <reg name="fpsid" bitsize="32" type="int" group="float"/>
  <reg name="fpscr" bitsize="32" type="int" group="float"/>
  <reg name="fpexc" bitsize="32" type="int" group="float"/>
</feature>
MCL/sf/adapt/qemu