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1 # Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 # All rights reserved. |
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3 # This component and the accompanying materials are made available |
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4 # under the terms of the License "Eclipse Public License v1.0" |
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5 # which accompanies this distribution, and is available |
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6 # at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 # |
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8 # Initial Contributors: |
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9 # Nokia Corporation - initial contribution. |
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10 # |
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11 # Contributors: |
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12 # |
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13 # Description: |
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14 # ne1_tb_restricted_coreldr.flm |
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15 # # NB! LINKBASE : Code execute address also set coreldr.lnk file |
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16 # # MUST REFLECT CORELOADER ADDRESS RELOCATION IN BOTH FILES!! |
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17 # |
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18 # |
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19 |
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20 ifeq ($($(NAME)_ne1_tb_resricted_coreldr_flm),) |
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21 $(NAME)_ne1_tb_resricted_coreldr_flm := 1 |
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22 |
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23 ## THESE MACROS NEED TO BE SET EXPLICITLY TO TRUE OR BLANK |
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24 |
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25 ## Use this macro if it is required to use the MMU |
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26 ## if the MMU is not require either comment it out or set it FALSE |
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27 USE_MMU := TRUE |
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28 |
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29 # This macro enables benchmarking code. Comment out or set FALSE if not required |
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30 WRITE_TIMINGS := |
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31 # Timer is not implemented for Naviengine. Do not enable! |
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32 |
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33 ## This macro causes the page tables to be output. Comment out or set FALSE if not required |
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34 ## If this option is selected then the MMU code will be enabled |
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35 DUMP_PAGE_TABLES := |
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36 # Page tables cannot be dumped on Naviengine due to the NANDController used. Do not enable! |
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37 |
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38 # This macro enables the MMU enabled version of the coreldr to call RestartAuxiliaryCores |
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39 # before it runs the core image. This function should be defined in the variant, to |
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40 # restart the auxiliary cores, which it should have paused on startup. |
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41 RUNS_WITH_SMP := TRUE |
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42 |
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43 ## Make sure all 3 macros are either TRUE or FALSE |
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44 # Enforce USE_MMU if page table is to be dumped |
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45 ifeq "$(DUMP_PAGE_TABLES)" "TRUE" |
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46 USE_MMU := TRUE |
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47 else |
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48 DUMP_PAGE_TABLES := FALSE |
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49 endif |
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50 |
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51 ifneq "$(USE_MMU)" "TRUE" |
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52 USE_MMU := FALSE |
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53 endif |
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54 |
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55 ifneq "$(WRITE_TIMINGS)" "TRUE" |
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56 WRITE_TIMINGS := FALSE |
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57 endif |
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58 |
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59 # Set the directories; based on calling bld.inf |
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60 GENSRCDIR := $(EXTENSION_ROOT)/../../../kernelhwsrv/kerneltest/e32utils/nandboot/coreldr |
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61 # Generic drivers |
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62 BLSRCDIR := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/UTIL/ONBL2 |
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63 XSRSRCDIR1 := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/OAM/OSLess |
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64 XSRSRCDIR2 := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/LLD/DNandO |
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65 # Coreloader ASM... |
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66 SPECSRCDIR := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/nandboot |
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67 # PAM - Platform specific Version |
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68 SPECXSRSRCDIR := $(EXTENSION_ROOT)/pam |
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69 SPECXSRSRCDIR1 := $(EXTENSION_ROOT)/lld |
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70 |
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71 # Platform Variant includes |
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72 VARIANTINC := $(INC_PATH)/ne1_tb |
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73 VARIANTINC2 := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/bootstrap |
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74 VARIANTINC3 := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/nand $(EXTENSION_ROOT)/../navienginebsp/naviengine_assp $(INC_PATH)/assp/naviengine/$(MEMMODEL) |
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75 |
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76 # Generic driver file includes |
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77 GENINC1 := $(INC_PATH) $(EPOCROOT)/epoc32/include |
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78 GENDRIVERINC := $(INC_PATH)/drivers |
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79 GENINC2 := $(INC_PATH)/drivers/unistore2 $(INC_PATH)/memmodel/epoc $(INC_PATH)/kernel $(INC_PATH)/kernel/arm $(INC_PATH)/nkern $(INC_PATH)/nkern/arm |
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80 GENXSRINC := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/INC |
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81 GENINCPATH:= $(GENSRCDIR) $(SPECSRCDIR) $(XSRSRCDIR1) $(XSRSRCDIR2) $(SPECXSRSRCDIR) $(SPECXSRSRCDIR1) $(VARIANTINC) $(VARIANTINC2) $(VARIANTINC3) $(GENINC1) $(GENDRIVERINC) $(GENINC2) $(GENINC3) $(GENINC4) $(GENXSRINC) |
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82 |
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83 |
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84 # Set the source/include/target directories |
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85 |
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86 # epoc32 folder for exported header files |
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87 EPOCINCDIR := $(INC_PATH)/ne1_tb |
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88 |
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89 # Build directory |
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90 BUILDLOC := $(EPOCBLD)/ne1_tb_restricted_coreldr_flm/$(PLATFORM_PATH) |
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91 |
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92 # Set the target name |
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93 TARGETDIR := $(EPOCROOT)/epoc32/release/$(PLATFORM_PATH) |
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94 BINTARGET := $(TARGETDIR)/$(NAME).bin |
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95 TMPTARGET := $(BUILDLOC)/$(NAME).elf |
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96 |
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97 # Rules |
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98 vpath %.s . $(SPECSRCDIR) $(SRCDIR) |
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99 vpath %.inc . $(SPECSRCDIR) $(EPOCINCDIR) |
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100 vpath %.ginc . $(BUILDLOC) |
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101 |
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102 |
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103 # from base/e32/include/drivers/... |
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104 VHEADERS := nanddevice.h |
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105 # the following .inc files get built as part of the process |
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106 BUILTINCLUDES := nanddevice.inc config.inc |
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107 BUILTINCLUDES2 := nand_plat.inc |
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108 |
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109 # |
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110 ASMSOURCE := coreldrasm.s |
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111 GENCPPSOURCE := inflate.cpp |
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112 BLCPPSOURCE := ONbl2.cpp |
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113 XSRCPPSOURCE1 := OSLessOAM.cpp |
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114 SPECXSRCPPSOURCE := pam.cpp |
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115 SPECXSRCPPSOURCE1 := pnl.cpp |
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116 |
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117 XSRLIB := $(EPOCROOT)/epoc32/release/armv5/urel/nbl2.lib |
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118 |
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119 # Only link in the MMU stuff if required |
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120 GENASMSOURCE := |
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121 ifeq "$(USE_MMU)" "TRUE" |
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122 GENASMSOURCE := coreldrmmu.s |
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123 endif |
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124 |
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125 HEADERS := |
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126 SPECHEADERS := nand_plat.h |
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127 |
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128 ## Address at which coreloader binary is loaded and then started from |
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129 # |
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130 # On NaviEngine this number is base of ram + 208MB (permitting 208MB core images) |
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131 # this number is pretty arbitrary |
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132 # if necessary as long as the corresponding change is also made to |
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133 # KCoreLoaderAddress in variant_bootstrap.inc |
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134 # |
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135 LINKBASE := 0x8D000000 |
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136 |
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137 # Build up logical TRUE defines |
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138 ASM_TRUE_MACROS := |
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139 |
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140 ifeq "$(USE_MMU)" "TRUE" |
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141 ASM_TRUE_MACROS := $(ASM_TRUE_MACROS) USE_MMU |
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142 endif |
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143 |
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144 ifeq "$(WRITE_TIMINGS)" "TRUE" |
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145 ASM_TRUE_MACROS := $(ASM_TRUE_MACROS) WRITE_TIMINGS |
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146 endif |
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147 |
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148 ifeq "$(DUMP_PAGE_TABLES)" "TRUE" |
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149 ASM_TRUE_MACROS := $(ASM_TRUE_MACROS) DUMP_PAGE_TABLES |
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150 endif |
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151 |
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152 ifeq "$(RUNS_WITH_SMP)" "TRUE" |
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153 ASM_TRUE_MACROS := $(ASM_TRUE_MACROS) RUNS_WITH_SMP |
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154 endif |
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155 |
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156 # Build up logical FALSE defines |
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157 ASM_FALSE_MACROS := |
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158 |
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159 ifeq "$(USE_MMU)" "FALSE" |
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160 ASM_FALSE_MACROS := $(ASM_FALSE_MACROS) USE_MMU |
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161 endif |
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162 |
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163 ifeq "$(WRITE_TIMINGS)" "FALSE" |
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164 ASM_FALSE_MACROS := $(ASM_FALSE_MACROS) WRITE_TIMINGS |
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165 endif |
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166 |
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167 ifeq "$(DUMP_PAGE_TABLES)" "FALSE" |
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168 ASM_FALSE_MACROS := $(ASM_FALSE_MACROS) DUMP_PAGE_TABLES |
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169 endif |
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170 |
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171 |
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172 # Arm RVCT tools |
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173 ASM_TRUE_MACROS := $(ASM_TRUE_MACROS) USE_CXSF |
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174 |
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175 OBJEXT := o |
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176 INCEXT := inc |
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177 |
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178 ARMCCFLAGS := --arm -c -Otime --cpp --enum_is_int |
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179 ARMCCFLAGS := $(ARMCCFLAGS) $(foreach dir,$(GENINCPATH),$(join -I, $(dir))) |
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180 ARMCCFLAGS := $(ARMCCFLAGS) -DEKA2 |
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181 ARMCCFLAGS := $(ARMCCFLAGS) -DXSR_NBL2 -DREAL_TARGET -DDEFERED_CHK -DSYMBIAN_SUPPORT_UNISTORE2 |
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182 |
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183 ARMCCFLAGS := $(ARMCCFLAGS) --preinclude $(EPOCROOT)/epoc32/include/rvct/rvct.h |
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184 |
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185 ifeq "$(CFG)" "UDEB" |
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186 ARMCCFLAGS := $(ARMCCFLAGS) -D_DEBUG |
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187 endif |
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188 |
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189 ASM_TRUE_MACRO_CMD := $(foreach macro,$(ASM_TRUE_MACROS),--predefine "$(macro) SETL {TRUE}") |
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190 ASM_FALSE_MACRO_CMD := $(foreach macro,$(ASM_FALSE_MACROS),--predefine "$(macro) SETL {FALSE}") |
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191 ASM_LINKBASE_MACRO := --predefine "_LINKBASE_ SETA $(LINKBASE)" |
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192 |
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193 AFLAGS := -g --keep $(ASM_TRUE_MACRO_CMD) $(ASM_FALSE_MACRO_CMD) $(ASM_LINKBASE_MACRO) -I$(BUILDLOC) $(foreach dir,$(GENINCPATH),$(join -I, $(dir))) |
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194 LFLAGS := --entry BootEntry --ro-base $(LINKBASE) --FIRST BootEntry --map |
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195 SYMOPT := --symdefs |
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196 ASMTYP := ARMASM |
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197 LINKFILE := |
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198 |
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199 # include base commonly used functions |
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200 include $(EPOCROOT)/epoc32/tools/makefile_templates/base/base_rvct_common.mk |
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201 |
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202 |
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203 # Header processing |
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204 FULLHEADERS := $(addprefix $(GENSRCDIR)/,$(HEADERS)) |
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205 FULLSPECHEADERS := $(addprefix $(VARIANTINC)/,$(SPECHEADERS)) |
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206 |
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207 FULLVHEADERS := $(addprefix $(GENDRIVERINC)/,$(VHEADERS)) |
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208 FULLBUILTINCLUDES := $(addprefix $(BUILDLOC)/,$(BUILTINCLUDES)) |
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209 # do h2inc |
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210 $(eval $(call base__h2inc,$(FULLBUILTINCLUDES),$(FULLVHEADERS))) |
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211 |
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212 FULLVHEADERS2 := $(addprefix $(VARIANTINC)/,$(SPECHEADERS)) |
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213 FULLBUILTINCLUDES2 := $(addprefix $(BUILDLOC)/,$(BUILTINCLUDES2)) |
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214 # do h2inc |
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215 $(eval $(call base__h2inc,$(FULLBUILTINCLUDES2),$(FULLVHEADERS2))) |
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216 |
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217 # object names |
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218 GENCPPOBJECTS := $(foreach f,$(GENCPPSOURCE),$(basename $(f)).$(OBJEXT)) |
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219 FULLGENCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(GENCPPOBJECTS)) |
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220 |
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221 BLCPPOBJECTS := $(foreach f,$(BLCPPSOURCE),$(basename $(f)).$(OBJEXT)) |
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222 FULLBLCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(BLCPPOBJECTS)) |
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223 |
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224 XSRCPPOBJECTS1 := $(foreach f,$(XSRCPPSOURCE1),$(basename $(f)).$(OBJEXT)) |
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225 FULLXSRCPPOBJECTS1 := $(addprefix $(BUILDLOC)/,$(XSRCPPOBJECTS1)) |
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226 |
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227 SPECXSRCPPOBJECTS := $(foreach f,$(SPECXSRCPPSOURCE),$(basename $(f)).$(OBJEXT)) |
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228 FULLSPECXSRCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(SPECXSRCPPOBJECTS)) |
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229 |
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230 SPECXSRCPPOBJECTS1 := $(foreach f,$(SPECXSRCPPSOURCE1),$(basename $(f)).$(OBJEXT)) |
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231 FULLSPECXSRCPPOBJECTS1 := $(addprefix $(BUILDLOC)/,$(SPECXSRCPPOBJECTS1)) |
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232 |
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233 ASMOBJECTS := $(foreach f,$(ASMSOURCE),$(basename $(f)).$(OBJEXT)) |
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234 FULLASMOBJECTS := $(addprefix $(BUILDLOC)/,$(ASMOBJECTS)) |
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235 |
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236 GENASMOBJECTS := $(foreach f,$(GENASMSOURCE),$(basename $(f)).$(OBJEXT)) |
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237 FULLGENASMOBJECTS := $(addprefix $(BUILDLOC)/,$(GENASMOBJECTS)) |
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238 |
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239 FULLOBJECTS := $(FULLASMOBJECTS) $(FULLGENASMOBJECTS) $(FULLGENCPPOBJECTS) $(FULLBLCPPOBJECTS) $(FULLXSRCPPOBJECTS1) $(FULLSPECXSRCPPOBJECTS) $(FULLSPECXSRCPPOBJECTS1) $(XSRLIB) |
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240 |
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241 |
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242 FULLINCLUDES:= $(addprefix $(SPECSRCDIR)/,$(INCLUDES)) |
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243 FULLPLATINCLUDES:= $(addprefix $(PLATSRCDIR)/,$(PLATINCLUDES)) |
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244 FULLGENINCLUDES:= $(addprefix $(GENSRCDIR)/,$(GENINCLUDES)) |
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245 FULLBLDINCLUDES:= $(addprefix $(H2BLDDIR)/,$(BLDINCLUDES)) |
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246 |
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247 |
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248 # Link |
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249 $(eval $(call base__link,$(TMPTARGET),$(FULLOBJECTS))) |
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250 |
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251 # Strip |
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252 $(eval $(call base__strip,$(BINTARGET),$(TMPTARGET))) |
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253 |
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254 # CPP objects |
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255 $(eval $(call base__compile,$(FULLGENCPPOBJECTS),$(BUILDLOC)/%.$(OBJEXT),$(GENSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS))) |
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256 |
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257 $(eval $(call base__compile,$(FULLBLCPPOBJECTS),$(BUILDLOC)/%.$(OBJEXT),$(BLSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS))) |
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258 |
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259 $(eval $(call base__compile,$(FULLXSRCPPOBJECTS1),$(BUILDLOC)/%.$(OBJEXT),$(XSRSRCDIR1)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS))) |
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260 |
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261 $(eval $(call base__compile,$(FULLSPECXSRCPPOBJECTS),$(BUILDLOC)/%.$(OBJEXT),$(SPECXSRSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS))) |
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262 |
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263 $(eval $(call base__compile,$(FULLSPECXSRCPPOBJECTS1),$(BUILDLOC)/%.$(OBJEXT),$(SPECXSRSRCDIR1)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS))) |
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264 |
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265 # Asm objects |
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266 $(eval $(call base__asm,$(FULLGENASMOBJECTS),$(BUILDLOC)/%.$(OBJEXT),$(GENSRCDIR)/$(GENASMSOURCE) $(FULLINCLUDES) $(FULLBUILTINCLUDES) $(FULLBUILTINCLUDES2) $(FULLBUILTINCLUDES3) $(FULLDRIVERINCLUDES) $(FULLARMINCLUDES) $(FULLBLDINCLUDES) $(FULLGENINCLUDES) $(FULLPLATINCLUDES))) |
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267 |
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268 $(eval $(call base__asm,$(FULLASMOBJECTS),$(BUILDLOC)/%.$(OBJEXT),$(SPECSRCDIR)/$(ASMSOURCE) $(FULLINCLUDES) $(FULLBUILTINCLUDES) $(FULLBUILTINCLUDES2) $(FULLBLDINCLUDES) $(FULLGENINCLUDES) $(FULLPLATINCLUDES))) |
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269 |
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270 # |
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271 TARGET :: $(TARGETDIR) $(BUILDLOC) $(BINTARGET) |
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272 |
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273 # --what to show releasables |
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274 $(eval $(call whatmacro,$(BINTARGET),USERFLM)) |
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275 # Create directory |
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276 CREATABLEPATHS := $(TARGETDIR) $(BUILDLOC) |
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277 $(call makepath,$(CREATABLEPATHS)) |
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278 # Clean up |
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279 $(eval $(call GenerateStandardCleanTarget,$(CLEANTARGETS),$(BUILDLOC))) |
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280 |
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281 endif |