1 # Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies).

     2 # All rights reserved.

     3 # This component and the accompanying materials are made available

     4 # under the terms of "Eclipse Public License v1.0"

     5 # which accompanies this distribution, and is available

     6 # at the URL "http://www.eclipse.org/legal/epl-v10.html".

     7 #

     8 # Initial Contributors:

     9 # Nokia Corporation - initial contribution.

    10 #

    11 # Contributors:

    12 #

    13 # Description:

    14 # ne1_tb_restricted_coreldr.mk

    15 # #  NB! LINKBASE :  Code execute address also set coreldr.lnk file 

    16 # #  MUST REFLECT CORELOADER ADDRESS RELOCATION IN BOTH FILES!!

    17 # 

    18 #

    19 

    20 # To guarantee there is a slash at the end of EPOCROOT in case there is not.

    21 # This is needed to ensure compatibility with SBSv1. 

    22 TMPROOT:=$(subst \,/,$(EPOCROOT))

    23 EPOCROOT:=$(patsubst %/,%,$(TMPROOT))/

    24 

    25 include $(EPOCROOT)epoc32/tools/shell/$(notdir $(basename $(SHELL))).mk

    26 

    27 ## If any of these macros are changed, then execute "abld clean coreldr" from this directory

    28 ## Use this macro if it is required to use the MMU

    29 ## if the MMU is not require either comment it out or set it FALSE

    30 USE_MMU := TRUE

    31   

    32 # This macro enables benchmarking code. Comment out or set FALSE if not required

    33 #WRITE_TIMINGS := TRUE

    34 # Timer is not implemented for Naviengine. Do not enable!

    35 

    36 

    37 ## This macro causes the page tables to be output. Comment out or set FALSE if not required

    38 ## If this option is selected then the MMU code will be enabled

    39 # DUMP_PAGE_TABLES := TRUE

    40 # Page tables cannot be dumped on Naviengine due to the NANDController used. Do not enable!

    41 

    42 # This macro enables the MMU enabled version of the coreldr to call RestartAuxiliaryCores

    43 # before it runs the core image.  This function should be defined in the variant, to 

    44 # restart the auxiliary cores, which it should have paused on startup.

    45 RUNS_WITH_SMP := TRUE

    46 

    47 # Macro used to enable support for Shadowed Memory Regions feature in loader

    48 # See also varaint\config.inc to enable in bootstrap

    49 SUPPORTS_SMR := TRUE

    50 

    51 ## Make sure all 3 macros are either TRUE or FALSE

    52 # Enforce USE_MMU if page table is to be dumped

    53 ifeq "$(DUMP_PAGE_TABLES)" "TRUE"

    54 	USE_MMU := TRUE

    55 else

    56 	DUMP_PAGE_TABLES := FALSE

    57 endif

    58 

    59 ifneq "$(USE_MMU)" "TRUE"

    60 	USE_MMU := FALSE

    61 endif

    62 

    63 ifneq "$(WRITE_TIMINGS)" "TRUE"

    64 	WRITE_TIMINGS := FALSE

    65 endif

    66 

    67 ifneq "$(SUPPORTS_SMR)" "TRUE"

    68 	SUPPORTS_SMR := FALSE

    69 endif

    70 

    71 #Set the directories; based on calling bld.inf

    72 GENSRCDIR := $(EXTENSION_ROOT)/../../../kernelhwsrv/kerneltest/e32utils/nandboot/coreldr

    73 #Generic drivers

    74 BLSRCDIR := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/UTIL/ONBL2

    75 XSRSRCDIR1 := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/OAM/OSLess

    76 XSRSRCDIR2 := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/LLD/DNandO

    77 #Coreloader ASM...

    78 SPECSRCDIR := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/nandboot

    79 #PAM - Platform specific Version

    80 SPECXSRSRCDIR := $(EXTENSION_ROOT)/pam

    81 SPECXSRSRCDIR1 := $(EXTENSION_ROOT)/lld

    82 

    83 #Platform Variant includes

    84 VARIANTINC := $(INC_PATH)/ne1_tb

    85 VARIANTINC2 := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/bootstrap

    86 VARIANTINC3 := $(EXTENSION_ROOT)/../navienginebsp/ne1_tb/nand  $(EXTENSION_ROOT)/../navienginebsp/naviengine_assp  $(INC_PATH)/assp/naviengine/$(MEMMODEL)

    87 

    88 #Generic driver file includes

    89 GENINC1 := $(INC_PATH)

    90 GENDRIVERINC := $(INC_PATH)/drivers

    91 GENINC2 := $(INC_PATH)/drivers/unistore2 $(INC_PATH)/memmodel/epoc $(INC_PATH)/kernel  $(INC_PATH)/kernel/arm $(INC_PATH)/nkern $(INC_PATH)/nkern/arm

    92 GENXSRINC := $(EXTENSION_ROOT)/../../../kernelhwsrv/kernel/eka/drivers/unistore2/srca/XSR/INC

    93 GENINCPATH:= $(GENSRCDIR) $(SPECSRCDIR) $(XSRSRCDIR1) $(XSRSRCDIR2) $(SPECXSRSRCDIR) $(SPECXSRSRCDIR1) $(VARIANTINC) $(VARIANTINC2) $(VARIANTINC3) $(GENINC1) $(GENDRIVERINC) $(GENINC2) $(GENINC3) $(GENINC4) $(GENXSRINC)

    94 

    95 

    96 # Set the source/include/target directories

    97 

    98 #epoc32 folder for exported header files

    99 EPOCINCDIR = $(INC_PATH)/ne1_tb

   100 

   101 # Build directory (EPOCBLD too long)

   102 BUILDLOC = $(EPOCROOT)epoc32/build/bsp/hwip_nec_naviengine/ne1_tb_restricted/unistore2/nandboot/coreldr/$(PLATFORM_PATH)

   103 

   104 # Set the target name

   105 TARGETDIR := $(EPOCROOT)epoc32/release/$(PLATFORM_PATH)

   106 TARGET = $(TARGETDIR)$/$(NAME).bin

   107 TMPTARGET = $(BUILDLOC)$/$(NAME).elf

   108 

   109 #Rules

   110 vpath %.s . $(SPECSRCDIR) $(SRCDIR)

   111 vpath %.inc . $(SPECSRCDIR) $(EPOCINCDIR)

   112 vpath %.ginc . $(BUILDLOC)

   113 

   114 

   115 # from base/e32/include/drivers/...

   116 VHEADERS := nanddevice.h

   117 # the following .inc files get built as part of the process

   118 BUILTINCLUDES := nanddevice.inc config.inc

   119 BUILTINCLUDES2 := nand_plat.inc

   120 

   121 

   122 

   123 ASMSOURCE := coreldrasm.s

   124 GENCPPSOURCE := inflate.cpp

   125 BLCPPSOURCE := ONbl2.cpp

   126 XSRCPPSOURCE1 := OSLessOAM.cpp

   127 SPECXSRCPPSOURCE := pam.cpp

   128 SPECXSRCPPSOURCE1 := pnl.cpp  

   129 

   130 XSRLIB := $(EPOCROOT)epoc32/release/armv5/urel/nbl2.lib

   131 

   132 ifeq "$(USE_MMU)" "TRUE"

   133 	#generic version found in base/e32utils/nandboot/coreldr/...

   134 	GENASMSOURCE := coreldrmmu.s # only link in the MMU stuff if required

   135 endif

   136 

   137 HEADERS := 

   138 SPECHEADERS := nand_plat.h

   139 

   140 ## Address at which coreloader binary is loaded and then started from

   141 #

   142 # On NaviEngine this number is base of ram + 208MB (permitting 208MB core images)

   143 # this number is pretty arbitrary

   144 # if necessary as long as the corresponding change is also made to

   145 # KCoreLoaderAddress in variant_bootstrap.inc

   146 #

   147 LINKBASE = 0x8D000000

   148 

   149 ARMASM_OUT := $(shell armasm 2>&1)

   150 ARMASM_OUT_4 := $(word 4,$(ARMASM_OUT))

   151 

   152 # Select the toolchain: ARM RVCT, then GCC

   153 

   154 # Use GCC toolchain if no other is available

   155 TOOLVER := GCC

   156 RVCTSTR := $(strip $(findstring RVCT, $(ARMASM_OUT_4)))

   157 ifeq "$(RVCTSTR)" "RVCT"

   158 	TOOLVER := RVCT

   159 	OP := --

   160 	OB := o

   161 endif

   162 

   163 # Build up logical TRUE defines

   164 ifeq "$(USE_MMU)" "TRUE"

   165 	ASM_TRUE_MACROS += USE_MMU

   166 endif 

   167 

   168 ifeq "$(WRITE_TIMINGS)" "TRUE"

   169 	ASM_TRUE_MACROS += WRITE_TIMINGS

   170 endif 

   171 

   172 ifeq "$(SUPPORTS_SMR)" "TRUE"

   173 	ASM_TRUE_MACROS += SUPPORTS_SMR

   174 endif 

   175 

   176 ifeq "$(DUMP_PAGE_TABLES)" "TRUE"

   177 	ASM_TRUE_MACROS += DUMP_PAGE_TABLES

   178 endif 

   179 

   180 ifeq "$(RUNS_WITH_SMP)" "TRUE"

   181 	ASM_TRUE_MACROS += RUNS_WITH_SMP

   182 endif

   183 

   184 # Build up logical FALSE defines

   185 ifeq "$(USE_MMU)" "FALSE"

   186 	ASM_FALSE_MACROS += USE_MMU

   187 endif 

   188 

   189 ifeq "$(WRITE_TIMINGS)" "FALSE"

   190 	ASM_FALSE_MACROS += WRITE_TIMINGS

   191 endif

   192  

   193 ifeq "$(SUPPORTS_SMR)" "FALSE"

   194 	ASM_FALSE_MACROS += SUPPORTS_SMR

   195 endif 

   196 

   197 ifeq "$(DUMP_PAGE_TABLES)" "FALSE"

   198 	ASM_FALSE_MACROS += DUMP_PAGE_TABLES

   199 endif 

   200 

   201 #Arm RVCT tools

   202 ifeq "$(TOOLVER)" "RVCT"

   203 ASM_TRUE_MACROS += USE_CXSF

   204 ASM := armasm

   205 LINK := armlink

   206 FROMELF := fromelf

   207 CPP := armcc

   208 

   209 OBJEXT := o

   210 INCEXT := inc

   211 

   212 ARMCCFLAGS := --arm -c -Otime --cpp

   213 ARMCCFLAGS := $(ARMCCFLAGS) $(foreach dir,$(GENINCPATH),$(join -I, $(dir)))

   214 ARMCCFLAGS := $(ARMCCFLAGS) -DEKA2

   215 ARMCCFLAGS := $(ARMCCFLAGS) -DXSR_NBL2 -DREAL_TARGET -DDEFERED_CHK -DSYMBIAN_SUPPORT_UNISTORE2

   216   

   217 

   218 ifeq "$(SUPPORTS_SMR)" "TRUE"

   219     ARMCCFLAGS := $(ARMCCFLAGS) -DSUPPORTS_SMR

   220 endif    

   221 

   222 

   223 

   224 	ARMCCFLAGS := $(ARMCCFLAGS) --preinclude $(EPOCROOT)epoc32/include/rvct/rvct.h

   225 

   226 	ifeq "$(CFG)" "UDEB"

   227 	ARMCCFLAGS := $(ARMCCFLAGS) -D_DEBUG

   228 	endif

   229 

   230 ASM_TRUE_MACRO_CMD := $(foreach macro,$(ASM_TRUE_MACROS),$(OP)predefine "$(macro) SETL {TRUE}")

   231 ASM_FALSE_MACRO_CMD := $(foreach macro,$(ASM_FALSE_MACROS),$(OP)predefine "$(macro) SETL {FALSE}")

   232 ASM_LINKBASE_MACRO := $(OP)predefine "_LINKBASE_ SETA $(LINKBASE)"

   233 

   234 AFLAGS := -g $(OP)keep $(ASM_TRUE_MACRO_CMD) $(ASM_FALSE_MACRO_CMD) $(ASM_LINKBASE_MACRO) -I$(BUILDLOC) $(foreach dir,$(GENINCPATH),$(join -I, $(dir)))

   235 LFLAGS := $(OP)entry BootEntry $(OP)ro-base $(LINKBASE) $(OP)FIRST BootEntry $(OP)map

   236 SYMOPT := $(OP)symdefs

   237 ASMTYP := ARMASM

   238 LINKFILE :=

   239 

   240 define do_compile

   241 $(CPP) $(ARMCCFLAGS) $< -o $@

   242 endef

   243 define do_h2inc

   244 perl -S $(EPOCROOT)epoc32/tools/h2inc.pl $< $@ ARMASM

   245 endef

   246 define do_asm

   247 $(ASM) $(AFLAGS) -$(OB) $@ $(OP)LIST $(join $(basename $@),.lst) $<

   248 endef

   249 define do_link

   250 $(LINK) $(LFLAGS) -$(OB) $@ $(FULLOBJECTS)

   251 endef

   252 define do_strip

   253 $(FROMELF) $(OP)bin $(OP)output $@ $<

   254 endef

   255 endif

   256 

   257 #Header processing

   258 FULLHEADERS := $(addprefix $(GENSRCDIR)/,$(HEADERS))

   259 FULLSPECHEADERS := $(addprefix $(VARIANTINC)/,$(SPECHEADERS))

   260 

   261 FULLVHEADERS := $(addprefix $(GENDRIVERINC)/,$(VHEADERS))

   262 FULLBUILTINCLUDES := $(addprefix $(BUILDLOC)/,$(BUILTINCLUDES))

   263 $(FULLBUILTINCLUDES) : $(FULLVHEADERS)

   264 	$(do_h2inc)

   265 

   266 FULLVHEADERS2 := $(addprefix $(VARIANTINC)/,$(SPECHEADERS))

   267 FULLBUILTINCLUDES2 := $(addprefix $(BUILDLOC)/,$(BUILTINCLUDES2))

   268 $(FULLBUILTINCLUDES2) : $(FULLVHEADERS2)

   269 	$(do_h2inc)

   270 

   271 #object names

   272 GENCPPOBJECTS := $(foreach f,$(GENCPPSOURCE),$(basename $(f)).$(OBJEXT))

   273 FULLGENCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(GENCPPOBJECTS))

   274 

   275 BLCPPOBJECTS := $(foreach f,$(BLCPPSOURCE),$(basename $(f)).$(OBJEXT))

   276 FULLBLCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(BLCPPOBJECTS))

   277 

   278 XSRCPPOBJECTS1 := $(foreach f,$(XSRCPPSOURCE1),$(basename $(f)).$(OBJEXT))

   279 FULLXSRCPPOBJECTS1 := $(addprefix $(BUILDLOC)/,$(XSRCPPOBJECTS1))

   280 

   281 SPECXSRCPPOBJECTS := $(foreach f,$(SPECXSRCPPSOURCE),$(basename $(f)).$(OBJEXT))

   282 FULLSPECXSRCPPOBJECTS := $(addprefix $(BUILDLOC)/,$(SPECXSRCPPOBJECTS))

   283 

   284 SPECXSRCPPOBJECTS1 := $(foreach f,$(SPECXSRCPPSOURCE1),$(basename $(f)).$(OBJEXT))

   285 FULLSPECXSRCPPOBJECTS1 := $(addprefix $(BUILDLOC)/,$(SPECXSRCPPOBJECTS1))

   286 

   287 ASMOBJECTS := $(foreach f,$(ASMSOURCE),$(basename $(f)).$(OBJEXT))

   288 FULLASMOBJECTS := $(addprefix $(BUILDLOC)/,$(ASMOBJECTS))

   289 

   290 GENASMOBJECTS := $(foreach f,$(GENASMSOURCE),$(basename $(f)).$(OBJEXT))

   291 FULLGENASMOBJECTS := $(addprefix $(BUILDLOC)/,$(GENASMOBJECTS))

   292 

   293 FULLOBJECTS := $(FULLASMOBJECTS) $(FULLGENASMOBJECTS) $(FULLGENCPPOBJECTS) $(FULLBLCPPOBJECTS) $(FULLXSRCPPOBJECTS1) $(FULLSPECXSRCPPOBJECTS) $(FULLSPECXSRCPPOBJECTS1) $(XSRLIB)

   294 

   295 ifdef PROCESS_INCLUDES

   296 

   297 GCCSRC := $(addprefix $(BUILDLOC)/,$(SRC))

   298 

   299 #Creation of headers

   300 FULLINCLUDES := $(foreach f,$(INCLUDES),$(basename $(f)).$(INCEXT))

   301 FULLINCLUDES := $(addprefix $(BUILDLOC)/,$(FULLINCLUDES))

   302 

   303 $(FULLINCLUDES) : $(BUILDLOC)/%.$(INCEXT) : %.inc

   304 	$(do_includes)

   305 

   306 FULLBLDINCLUDES := $(foreach f,$(BLDINCLUDES),$(basename $(f)).$(INCEXT))

   307 FULLBLDINCLUDES := $(addprefix $(BUILDLOC)/,$(FULLBLDINCLUDES))

   308 $(FULLBLDINCLUDES) : $(BUILDLOC)/%.$(INCEXT) : %.inc

   309 	$(do_includes)

   310 

   311 FULLPLATINCLUDES := $(foreach f,$(PLATINCLUDES),$(basename $(f)).$(INCEXT))

   312 FULLPLATINCLUDES := $(addprefix $(BUILDLOC)/,$(FULLPLATINCLUDES))

   313 $(FULLPLATINCLUDES) : $(BUILDLOC)/%.$(INCEXT) : %.inc

   314 	$(do_includes)

   315 

   316 FULLGENINCLUDES := $(foreach f,$(GENINCLUDES),$(basename $(f)).$(INCEXT))

   317 FULLGENINCLUDES := $(addprefix $(BUILDLOC)/,$(FULLGENINCLUDES))

   318 $(FULLGENINCLUDES) : $(BUILDLOC)/%.$(INCEXT) : %.inc

   319 	$(do_includes)

   320 

   321 else

   322 FULLINCLUDES:= $(addprefix $(SPECSRCDIR)/,$(INCLUDES))

   323 FULLPLATINCLUDES:= $(addprefix $(PLATSRCDIR)/,$(PLATINCLUDES))

   324 FULLGENINCLUDES:= $(addprefix $(GENSRCDIR)/,$(GENINCLUDES))

   325 FULLBLDINCLUDES:= $(addprefix $(H2BLDDIR)/,$(BLDINCLUDES))

   326 

   327 #Arm RVCT specifics here

   328 

   329 endif

   330 

   331 

   332 #Link

   333 $(TMPTARGET) : $(FULLOBJECTS)

   334 	$(do_link)

   335 

   336 #strip

   337 $(TARGET) : $(TMPTARGET)

   338 	$(do_strip)

   339 

   340 #CPP objects

   341 $(FULLGENCPPOBJECTS) : $(BUILDLOC)/%.$(OBJEXT) : $(GENSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS)

   342 	$(do_compile)

   343 

   344 $(FULLBLCPPOBJECTS) : $(BUILDLOC)/%.$(OBJEXT) : $(BLSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS)

   345 	$(do_compile)

   346 

   347 $(FULLXSRCPPOBJECTS1) : $(BUILDLOC)/%.$(OBJEXT) : $(XSRSRCDIR1)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS)

   348 	$(do_compile)

   349 

   350 $(FULLSPECXSRCPPOBJECTS) : $(BUILDLOC)/%.$(OBJEXT) : $(SPECXSRSRCDIR)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS)

   351 	$(do_compile)

   352 

   353 $(FULLSPECXSRCPPOBJECTS1) : $(BUILDLOC)/%.$(OBJEXT) : $(SPECXSRSRCDIR1)/%.cpp $(FULLHEADERS) $(FULLSPECHEADERS)

   354 	$(do_compile)

   355 

   356 #Asm objects

   357 $(FULLGENASMOBJECTS) : $(BUILDLOC)/%.$(OBJEXT) : $(GENSRCDIR)/$(GENASMSOURCE) $(FULLINCLUDES) $(FULLBUILTINCLUDES) $(FULLBUILTINCLUDES2) $(FULLBUILTINCLUDES3) $(FULLDRIVERINCLUDES) $(FULLARMINCLUDES) $(FULLBLDINCLUDES) $(FULLGENINCLUDES) $(FULLPLATINCLUDES)

   358 	$(do_asm)

   359 

   360 $(FULLASMOBJECTS) : $(BUILDLOC)/%.$(OBJEXT) : $(SPECSRCDIR)/$(ASMSOURCE) $(FULLINCLUDES) $(FULLBUILTINCLUDES) $(FULLBUILTINCLUDES2) $(FULLBLDINCLUDES) $(FULLGENINCLUDES) $(FULLPLATINCLUDES)

   361 	$(do_asm)

   362 

   363 # make the work directories

   364 $(TARGETDIR) :

   365 	$(call ifnotexistd,"$(TARGETDIR)")

   366 

   367 $(BUILDLOC) :

   368 	$(call ifnotexistd,"$(BUILDLOC)")

   369 

   370 

   371 MAKMAKE :

   372 	echo Nothing to do

   373 

   374 FREEZE :

   375 	echo Nothing to do

   376 

   377 LIB :

   378 	echo Nothing to do

   379 

   380 CLEANLIB :

   381 	echo Nothing to do

   382 

   383 RESOURCE :

   384 	echo Nothing to do

   385 

   386 FINAL :

   387 	echo Nothing to do

   388 

   389 BLD SAVESPACE : $(TARGETDIR) $(BUILDLOC) $(TARGET)

   390 	@echo BLD

   391 

   392 RELEASABLES :

   393 	@echo "$(TARGET)"

   394 

   395 CLEAN :

   396 	-$(ERASE) $(call slash2generic,"$(TARGET)")

   397 	-$(ERASE) $(call slash2generic,"$(BUILDLOC)/*.*")

   398