symbianosbld/cedarutils/reference_roms_9.6.mrp
branchRCL_3
changeset 20 bae7f55f6ef7
parent 19 c39e182aa37c
child 21 1a4e75cfed9d
equal deleted inserted replaced
19:c39e182aa37c 20:bae7f55f6ef7
     1 # Copyright (c) 2005-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     2 # All rights reserved.
       
     3 # This component and the accompanying materials are made available
       
     4 # under the terms of "Eclipse Public License v1.0"
       
     5 # which accompanies this distribution, and is available
       
     6 # at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     7 #
       
     8 # Initial Contributors:
       
     9 # Nokia Corporation - initial contribution.
       
    10 #
       
    11 # Contributors:
       
    12 #
       
    13 # Description:
       
    14 # reference_roms.mrp
       
    15 
       
    16 component	reference_roms_9.6
       
    17 
       
    18 # This component owns the binaries, logs, etc produced by building ROM images
       
    19 # in the System Build
       
    20 # 
       
    21 # Determination of which GTC ROMs are built is done by the variability tools.
       
    22 # Unfortunately, there's no way for this MRP to indicate "all stuff generated
       
    23 # by buiding the ROMS", so this list needs to be maintained explicitly :-(
       
    24 # 
       
    25 # Further note that the System Build filters the items generated to sort the
       
    26 # GTC ROMs from the ROMs built for Integrations own purposes (ie Integration's
       
    27 # Locally Tested Configurations). Only GTC ROM files are included in this
       
    28 # component
       
    29 # 
       
    30 # For each complete ROM owned, there are either the same set of ten files, or
       
    31 # the same set of six files, for NAND or non-NAND (ie NOR) ROMs respectively
       
    32 
       
    33 binary	\epoc32\rom\include\GTC_Mature_H4.oby
       
    34 binary	\epoc32\rom\GTC_Mature_H4HRP.oby
       
    35 binary	\epoc32\rom\GTC_Mature_H4HRP.dir
       
    36 binary	\epoc32\rom\GTC_Mature_H4HRP.IMG
       
    37 binary	\epoc32\rom\GTC_Mature_H4HRP.symbol
       
    38 binary	\epoc32\rom\GTC_Mature_H4HRP.log
       
    39 
       
    40 binary	\epoc32\rom\include\GTC_Minimal_H4.oby
       
    41 binary	\epoc32\rom\GTC_Minimal_H4HRP.oby
       
    42 binary	\epoc32\rom\GTC_Minimal_H4HRP.dir
       
    43 binary	\epoc32\rom\GTC_Minimal_H4HRP.IMG
       
    44 binary	\epoc32\rom\GTC_Minimal_H4HRP.symbol
       
    45 binary	\epoc32\rom\GTC_Minimal_H4HRP.log
       
    46 binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.oby
       
    47 binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.img
       
    48 binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.symbol
       
    49 binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.log
       
    50 
       
    51 binary	\epoc32\rom\include\GTC_Standard_H4.oby
       
    52 binary	\epoc32\rom\GTC_Standard_H4HRP.oby
       
    53 binary	\epoc32\rom\GTC_Standard_H4HRP.dir
       
    54 binary	\epoc32\rom\GTC_Standard_H4HRP.IMG
       
    55 binary	\epoc32\rom\GTC_Standard_H4HRP.symbol
       
    56 binary	\epoc32\rom\GTC_Standard_H4HRP.log
       
    57 binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.oby
       
    58 binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.img
       
    59 binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.symbol
       
    60 binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.log
       
    61 
       
    62 binary	\epoc32\rom\include\GTC_Standard_NE1.oby
       
    63 binary	\epoc32\rom\GTC_Standard_NE1.oby
       
    64 binary	\epoc32\rom\GTC_Standard_NE1.dir
       
    65 binary	\epoc32\rom\GTC_Standard_NE1.IMG
       
    66 binary	\epoc32\rom\GTC_Standard_NE1.symbol
       
    67 binary	\epoc32\rom\GTC_Standard_NE1.log
       
    68 
       
    69 binary	\epoc32\rom\include\GTC_Standard_NE1S.oby
       
    70 binary	\epoc32\rom\GTC_Standard_NE1S.oby
       
    71 binary	\epoc32\rom\GTC_Standard_NE1S.dir
       
    72 binary	\epoc32\rom\GTC_Standard_NE1S.IMG
       
    73 binary	\epoc32\rom\GTC_Standard_NE1S.symbol
       
    74 binary	\epoc32\rom\GTC_Standard_NE1S.log
       
    75 
       
    76 binary	\epoc32\rom\include\GTC_Standard_H6.oby
       
    77 binary	\epoc32\rom\GTC_Standard_H6.oby
       
    78 binary	\epoc32\rom\GTC_Standard_H6.dir
       
    79 binary	\epoc32\rom\GTC_Standard_H6.IMG
       
    80 binary	\epoc32\rom\GTC_Standard_H6.symbol
       
    81 binary	\epoc32\rom\GTC_Standard_H6.log
       
    82 binary	\epoc32\rom\GTC_Standard_H6.rofs.oby
       
    83 binary	\epoc32\rom\GTC_Standard_H6.rofs.img
       
    84 binary	\epoc32\rom\GTC_Standard_H6.rofs.symbol
       
    85 binary	\epoc32\rom\GTC_Standard_H6.rofs.log
       
    86 
       
    87 binary	\epoc32\rom\include\GTC_Mature_H6.oby
       
    88 binary	\epoc32\rom\GTC_Mature_H6.oby
       
    89 binary	\epoc32\rom\GTC_Mature_H6.dir
       
    90 binary	\epoc32\rom\GTC_Mature_H6.IMG
       
    91 binary	\epoc32\rom\GTC_Mature_H6.symbol
       
    92 binary	\epoc32\rom\GTC_Mature_H6.log
       
    93 
       
    94 binary	\epoc32\rom\include\GTC_Minimal_H6.oby
       
    95 binary	\epoc32\rom\GTC_Minimal_H6.oby
       
    96 binary	\epoc32\rom\GTC_Minimal_H6.dir
       
    97 binary	\epoc32\rom\GTC_Minimal_H6.IMG
       
    98 binary	\epoc32\rom\GTC_Minimal_H6.symbol
       
    99 binary	\epoc32\rom\GTC_Minimal_H6.log
       
   100 binary	\epoc32\rom\GTC_Minimal_H6.rofs.oby
       
   101 binary	\epoc32\rom\GTC_Minimal_H6.rofs.img
       
   102 binary	\epoc32\rom\GTC_Minimal_H6.rofs.symbol
       
   103 binary	\epoc32\rom\GTC_Minimal_H6.rofs.log
       
   104 
       
   105 
       
   106 # In addition to the items built via the variability tools (inc metarombuild)
       
   107 # there are nand loader related items that are built through the XML file
       
   108 # explicitly...
       
   109 
       
   110 # A NAND loader for each hardware board:
       
   111 binary \epoc32\rom\h4hrp_001.techview.nandloader.img
       
   112 binary \epoc32\rom\h4hrp_001.techview.nandloader.log
       
   113 binary \epoc32\rom\h6_sdp.techview.nandloader.img
       
   114 binary \epoc32\rom\h6_sdp.techview.nandloader.log
       
   115 binary \epoc32\rom\ne1_tb.techview.nandloader.img
       
   116 binary \epoc32\rom\ne1_tb.techview.nandloader.log
       
   117 
       
   118 binary \epoc32\rom\h4.nandloader.reltest.img
       
   119 binary \epoc32\rom\h4.nandloader.reltest.log
       
   120 binary \epoc32\rom\h6.nandloader.reltest.img
       
   121 binary \epoc32\rom\h6.nandloader.reltest.log
       
   122 binary \epoc32\rom\ne1_tb.nandloader.reltest.img
       
   123 binary \epoc32\rom\ne1_tb.nandloader.reltest.log
       
   124 
       
   125 # An MMC loader for each hardware board:
       
   126 binary \epoc32\rom\h4.mmcloader.reltest.img
       
   127 binary \epoc32\rom\h4.mmcloader.reltest.log
       
   128 
       
   129 notes_source	\component_defs\release.src