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symbianosbld/cedarutils/reference_roms_9.6.mrp
changeset 0 6d65d5acee06
child 1 72c313936b02 
--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/symbianosbld/cedarutils/reference_roms_9.6.mrp	Tue Feb 02 01:12:20 2010 +0200
@@ -0,0 +1,114 @@
+component	reference_roms_9.6
+
+# This component owns the binaries, logs, etc produced by building ROM images
+# in the System Build
+# 
+# Determination of which GTC ROMs are built is done by the variability tools.
+# Unfortunately, there's no way for this MRP to indicate "all stuff generated
+# by buiding the ROMS", so this list needs to be maintained explicitly :-(
+# 
+# Further note that the System Build filters the items generated to sort the
+# GTC ROMs from the ROMs built for Integrations own purposes (ie Integration's
+# Locally Tested Configurations). Only GTC ROM files are included in this
+# component
+# 
+# For each complete ROM owned, there are either the same set of ten files, or
+# the same set of six files, for NAND or non-NAND (ie NOR) ROMs respectively
+
+binary	\epoc32\rom\include\GTC_Mature_H4.oby
+binary	\epoc32\rom\GTC_Mature_H4HRP.oby
+binary	\epoc32\rom\GTC_Mature_H4HRP.dir
+binary	\epoc32\rom\GTC_Mature_H4HRP.IMG
+binary	\epoc32\rom\GTC_Mature_H4HRP.symbol
+binary	\epoc32\rom\GTC_Mature_H4HRP.log
+
+binary	\epoc32\rom\include\GTC_Minimal_H4.oby
+binary	\epoc32\rom\GTC_Minimal_H4HRP.oby
+binary	\epoc32\rom\GTC_Minimal_H4HRP.dir
+binary	\epoc32\rom\GTC_Minimal_H4HRP.IMG
+binary	\epoc32\rom\GTC_Minimal_H4HRP.symbol
+binary	\epoc32\rom\GTC_Minimal_H4HRP.log
+binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.oby
+binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.img
+binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.symbol
+binary	\epoc32\rom\GTC_Minimal_H4HRP.rofs.log
+
+binary	\epoc32\rom\include\GTC_Standard_H4.oby
+binary	\epoc32\rom\GTC_Standard_H4HRP.oby
+binary	\epoc32\rom\GTC_Standard_H4HRP.dir
+binary	\epoc32\rom\GTC_Standard_H4HRP.IMG
+binary	\epoc32\rom\GTC_Standard_H4HRP.symbol
+binary	\epoc32\rom\GTC_Standard_H4HRP.log
+binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.oby
+binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.img
+binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.symbol
+binary	\epoc32\rom\GTC_Standard_H4HRP.rofs.log
+
+binary	\epoc32\rom\include\GTC_Standard_NE1.oby
+binary	\epoc32\rom\GTC_Standard_NE1.oby
+binary	\epoc32\rom\GTC_Standard_NE1.dir
+binary	\epoc32\rom\GTC_Standard_NE1.IMG
+binary	\epoc32\rom\GTC_Standard_NE1.symbol
+binary	\epoc32\rom\GTC_Standard_NE1.log
+
+binary	\epoc32\rom\include\GTC_Standard_NE1S.oby
+binary	\epoc32\rom\GTC_Standard_NE1S.oby
+binary	\epoc32\rom\GTC_Standard_NE1S.dir
+binary	\epoc32\rom\GTC_Standard_NE1S.IMG
+binary	\epoc32\rom\GTC_Standard_NE1S.symbol
+binary	\epoc32\rom\GTC_Standard_NE1S.log
+
+binary	\epoc32\rom\include\GTC_Standard_H6.oby
+binary	\epoc32\rom\GTC_Standard_H6.oby
+binary	\epoc32\rom\GTC_Standard_H6.dir
+binary	\epoc32\rom\GTC_Standard_H6.IMG
+binary	\epoc32\rom\GTC_Standard_H6.symbol
+binary	\epoc32\rom\GTC_Standard_H6.log
+binary	\epoc32\rom\GTC_Standard_H6.rofs.oby
+binary	\epoc32\rom\GTC_Standard_H6.rofs.img
+binary	\epoc32\rom\GTC_Standard_H6.rofs.symbol
+binary	\epoc32\rom\GTC_Standard_H6.rofs.log
+
+binary	\epoc32\rom\include\GTC_Mature_H6.oby
+binary	\epoc32\rom\GTC_Mature_H6.oby
+binary	\epoc32\rom\GTC_Mature_H6.dir
+binary	\epoc32\rom\GTC_Mature_H6.IMG
+binary	\epoc32\rom\GTC_Mature_H6.symbol
+binary	\epoc32\rom\GTC_Mature_H6.log
+
+binary	\epoc32\rom\include\GTC_Minimal_H6.oby
+binary	\epoc32\rom\GTC_Minimal_H6.oby
+binary	\epoc32\rom\GTC_Minimal_H6.dir
+binary	\epoc32\rom\GTC_Minimal_H6.IMG
+binary	\epoc32\rom\GTC_Minimal_H6.symbol
+binary	\epoc32\rom\GTC_Minimal_H6.log
+binary	\epoc32\rom\GTC_Minimal_H6.rofs.oby
+binary	\epoc32\rom\GTC_Minimal_H6.rofs.img
+binary	\epoc32\rom\GTC_Minimal_H6.rofs.symbol
+binary	\epoc32\rom\GTC_Minimal_H6.rofs.log
+
+
+# In addition to the items built via the variability tools (inc metarombuild)
+# there are nand loader related items that are built through the XML file
+# explicitly...
+
+# A NAND loader for each hardware board:
+binary \epoc32\rom\h4hrp_001.techview.nandloader.img
+binary \epoc32\rom\h4hrp_001.techview.nandloader.log
+binary \epoc32\rom\h6_sdp.techview.nandloader.img
+binary \epoc32\rom\h6_sdp.techview.nandloader.log
+binary \epoc32\rom\ne1_tb.techview.nandloader.img
+binary \epoc32\rom\ne1_tb.techview.nandloader.log
+
+binary \epoc32\rom\h4.nandloader.reltest.img
+binary \epoc32\rom\h4.nandloader.reltest.log
+binary \epoc32\rom\h6.nandloader.reltest.img
+binary \epoc32\rom\h6.nandloader.reltest.log
+binary \epoc32\rom\ne1_tb.nandloader.reltest.img
+binary \epoc32\rom\ne1_tb.nandloader.reltest.log
+
+# An MMC loader for each hardware board:
+binary \epoc32\rom\h4.mmcloader.reltest.img
+binary \epoc32\rom\h4.mmcloader.reltest.log
+
+notes_source	\component_defs\release.src
MCL/sf/os/deviceplatformrelease