author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Thu, 15 Jul 2010 20:11:42 +0300 | |
branch | RCL_3 |
changeset 41 | 0ffb4e86fcc9 |
parent 19 | 4a8fed1c0ef6 |
permissions | -rw-r--r-- |
0 | 1 |
// Copyright (c) 1996-2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// e32\memmodel\epoc\multiple\minit.cpp |
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// |
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// |
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#include "memmodel.h" |
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#include "cache_maintenance.h" |
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_LIT(KLitSvStack,"SvStack"); |
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const TInt KMaxThreads=1024; |
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void M::Init1() |
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{ |
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// Memory model dependent CPU stuff |
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MM::Init1(); |
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// Set up cache info |
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CacheMaintenance::Init1(); |
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// First phase MMU initialisation |
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Mmu& m=Mmu::Get(); |
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m.Init1(); |
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} |
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void M::Init2() |
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{ |
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// Second phase MMU initialisation |
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Mmu& m=Mmu::Get(); |
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m.Init2(); |
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} |
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void M::Init3() |
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{ |
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// Third phase MMU initialisation |
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Mmu& m=Mmu::Get(); |
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m.Init3(); |
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} |
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4a8fed1c0ef6
Revision: 201007
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
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void M::Init4() |
4a8fed1c0ef6
Revision: 201007
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
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{ |
4a8fed1c0ef6
Revision: 201007
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
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// Fourth phase MMU initialisation - Not required on this memory model. |
4a8fed1c0ef6
Revision: 201007
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
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} |
4a8fed1c0ef6
Revision: 201007
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
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TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
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{ |
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TInt r; |
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TLinAddr base = TheRomHeader().iKernDataAddress; |
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DMemModelChunk* pC = (DMemModelChunk*)aChunk; |
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K::HeapInfo.iChunk = aChunk; |
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K::HeapInfo.iBase = (TUint8*)base; |
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K::HeapInfo.iMaxSize = pC->MaxSize(); |
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pC->SetFixedAddress(base, aSize); |
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__KTRACE_OPT(KBOOT,Kern::Printf("Created SvHeap chunk, addr %08X, init size %08X max size %08X",pC->Base(),aSize,pC->MaxSize())); |
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TLinAddr dataSectionBase=0; |
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r=((DMemModelProcess*)K::TheKernelProcess)->AddChunk(pC,dataSectionBase,EFalse); |
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__KTRACE_OPT(KBOOT,Kern::Printf("Added kernel heap chunk to current process, %d",r)); |
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return r; |
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} |
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TInt M::InitSvStackChunk() |
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{ |
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// create a chunk to hold supervisor-mode stacks |
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Mmu& m=Mmu::Get(); |
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TInt alias_space=m.iAliasSize+m.iPageSize; |
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TInt total=alias_space+K::SupervisorThreadStackSize+PP::SupervisorThreadStackGuard; |
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total=(total+m.iAliasMask)&~m.iAliasMask; |
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DMemModelChunk* pC=NULL; |
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DMemModelProcess* pP=(DMemModelProcess*)K::TheKernelProcess; |
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TInt maxsize=total*KMaxThreads; |
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TLinAddr dataSectionBase=0; |
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SChunkCreateInfo cinfo; |
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cinfo.iGlobal=EFalse; |
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cinfo.iAtt=TChunkCreate::EDisconnected; |
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cinfo.iForceFixed=EFalse; |
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cinfo.iOperations=0; |
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cinfo.iType=EKernelStack; |
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cinfo.iMaxSize=maxsize; |
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cinfo.iPreallocated=0; |
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cinfo.iName.Set(KLitSvStack); |
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cinfo.iOwner=K::TheKernelProcess; |
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TInt r=pP->NewChunk((DChunk*&)pC,cinfo,dataSectionBase); |
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__KTRACE_OPT(KBOOT,Kern::Printf("Created SvStack, %d",r)); |
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if (r!=KErrNone) |
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return r; |
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r=pC->Reserve(0); |
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if (r!=KErrNone) |
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return r; |
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__KTRACE_OPT(KBOOT,Kern::Printf("Created SvStack chunk, addr %08X, max size %08X",pC->Base(),maxsize)); |
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MM::SvStackChunk=pC; |
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r=pP->AddChunk(pC,dataSectionBase,EFalse); |
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__KTRACE_OPT(KBOOT,Kern::Printf("Added SvStack chunk to current process, %d",r)); |
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return r; |
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} |
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