// Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies).

// All rights reserved.

// This component and the accompanying materials are made available

// under the terms of the License "Eclipse Public License v1.0"

// which accompanies this distribution, and is available

// at the URL "http://www.eclipse.org/legal/epl-v10.html".

//

// Initial Contributors:

// Nokia Corporation - initial contribution.

//

// Contributors:

//

// Description:

// e32\memmodel\epoc\putils.cpp

// EPOC implementation of the ROM related parts of the system

// 

//

#include "plat_priv.h"

#include <e32uid.h>

#include "execs.h"

#include "cache_maintenance.h"

_LIT(KKernelFullPathNameSysBin,"z:\\sys\\bin\\ekern.exe");

#ifdef __MARM__

#define	CHECK_ROM_ENTRY_POINT(a)	__ASSERT_ALWAYS( ((a).iFlags & KRomImageEptMask) == KRomImageEpt_Eka2, PP::Panic(PP::EUnsupportedOldBinary) )

#else

#define	CHECK_ROM_ENTRY_POINT(a)

#endif

void PP::Panic(TPlatPanic aPanic)

	{

	Kern::Fault("PLAT",aPanic);

	}

void PP::InitSuperPageFromRom(TLinAddr aRomHeader, TLinAddr aSuperPage)

	{

	RomHeaderAddress = aRomHeader;

	SuperPageAddress = aSuperPage;

	TInt j;

	for (j = 0; j < KNumTraceMaskWords; j++)

		TheSuperPage().iDebugMask[j] = TheRomHeader().iTraceMask[j];

	for (j = 0; j < 8; j++)

		TheSuperPage().iInitialBTraceFilter[j] = TheRomHeader().iInitialBTraceFilter[j];

	Kern::SuperPage().iInitialBTraceBuffer = TheRomHeader().iInitialBTraceBuffer;

	Kern::SuperPage().iInitialBTraceMode = TheRomHeader().iInitialBTraceMode;

	TheSuperPage().SetKernelConfigFlags(TheRomHeader().iKernelConfigFlags);

	memcpy(&TheSuperPage().iDisabledCapabilities, &TheRomHeader().iDisabledCapabilities, sizeof(TheRomHeader().iDisabledCapabilities));

	}

TInt P::DefaultInitialTime()

	{

//

// Default implementation of the kernel hook for getting the initial system

// time, can be overriden by variant.

//

    TInt seconds;

	if (K::ColdStart || A::SystemTimeInSecondsFrom2000(seconds)!=KErrNone)

		return KErrCorrupt;

	else

		return seconds;

	}

TInt P::InitSystemTime()

	{

//

//  Initialise system time

//	Return the initial time in seconds from 00:00:00 01-01-2000

//

	// Reset the UTC offset (I assume this gets loaded from storage at some point after F32 loads)

	TUint dummy;

	K::SetSystemTimeAndOffset(0, 0, 0, dummy, ETimeSetOffset | ETimeSetNoTimeUpdate);

	// Read the hardware clock value. If this is negative it means it couldnt be read.

    TInt seconds = K::InitialTimeHandler()();	

	if (seconds >= 0)

		{

		K::SecureClockStatus |= ESecureClockPresent;

		__KTRACE_OPT(KBOOT,Kern::Printf("Read initial system time"));

		// now=Hardware RTC value

		}

	else 

		{

		__KTRACE_OPT(KBOOT,Kern::Printf("Could not read initial system time - using ROM timestamp to set system time"));

		TTimeK rom_time=*(const TTimeK*)&TheRomHeader().iTime;

		rom_time -= TTimeK(K::HomeTimeOffsetSeconds)*1000000;

		TInt s;

		TInt r=K::SecondsFrom2000(rom_time,s);

		if (r!=KErrNone)

			PP::Panic(PP::EInitialSystemTimeInvalid);

		seconds=s;

		// write the ROM timestamp to the hardware RTC

		A::SetSystemTimeInSecondsFrom2000(seconds);

		}

	return seconds;

	}

void FindRomRootDirectory()

	{

	TUint variant = TheSuperPage().iActiveVariant;

	TUint cpu = (variant >> 16) & 0xff;

	TUint asic = (variant >> 24);

	PP::RomRootDirAddress=0;

	TRomRootDirectoryList* pL=(TRomRootDirectoryList*)TheSuperPage().iRootDirList;

	if (!pL)

		pL=(TRomRootDirectoryList*)TheRomHeader().iRomRootDirectoryList;

	TInt i;

	for (i=0; i<pL->iNumRootDirs; i++)

		{

		if (THardwareVariant(pL->iRootDir[i].iHardwareVariant).IsCompatibleWith(cpu,asic,variant))

			{

			__KTRACE_OPT(KBOOT,Kern::Printf("Found ROM root dir index %d addr %08x",

				i, pL->iRootDir[i].iAddressLin));

			PP::RomRootDirAddress=pL->iRootDir[i].iAddressLin;

			return;

			}

		}

	}

typedef TInt (*TInitVarExtFn)(const TRomImageHeader&);

#ifdef KBOOT

void DumpRomFileInfo(const TRomEntry& aRomEntry)

	{

	TBuf8<128> name;

	TInt i;

	for (i=0; i<aRomEntry.iNameLength; ++i)

		{

		name.Append(TChar(aRomEntry.iName[i<<1]&0xff));

		}

	const TRomImageHeader& img = *(const TRomImageHeader*)aRomEntry.iAddressLin;

	__KTRACE_OPT(KBOOT,Kern::Printf("File %S[%08x]", &name, TUint(img.iHardwareVariant) ));

	}

#endif

void InitVarExt(TBool aVar, TInitVarExtFn aFn)

	{

	__KTRACE_OPT(KBOOT,Kern::Printf("InitVarExt var=%d, fn=%08x", aVar, aFn));

	TUint variant = TheSuperPage().iActiveVariant;

	TUint cpu = (variant >> 16) & 0xff;

	TUint asic = (variant >> 24);

	__KTRACE_OPT(KBOOT,Kern::Printf("cpu=%d, asic=%d, variant=%x", cpu, asic, variant));

	const TRomHeader& rh = TheRomHeader();

	TRomEntry* pE = aVar ? (TRomEntry*)rh.iVariantFile : (TRomEntry*)rh.iExtensionFile;

	while(pE)

		{

#ifdef KBOOT

		DumpRomFileInfo(*pE);

#endif

		const TRomImageHeader& img = *(const TRomImageHeader*)pE->iAddressLin;

		if (THardwareVariant(img.iHardwareVariant).IsCompatibleWith(cpu,asic,variant))

			{

			__KTRACE_OPT(KBOOT,Kern::Printf("Processing"));

			(*aFn)(img);

			if (aVar)

				{

				__KTRACE_OPT(KBOOT,Kern::Printf("Variant installed"));

				return;

				}

			}

		pE=(TRomEntry*)img.iNextExtension;

		}

	if (aVar)

		Kern::Fault("NoVariant",0);

	}

TInt InitData(const TRomImageHeader& a)

	{

	__KTRACE_OPT(KBOOT,Kern::Printf("InitData %08x+%x->%08x", a.iDataAddress, a.iDataSize, a.iDataBssLinearBase));

	CHECK_ROM_ENTRY_POINT(a);

	if (a.iDataSize)

		memcpy((TAny*)a.iDataBssLinearBase,(TAny*)a.iDataAddress,a.iDataSize);

	TLibraryEntry ep = (TLibraryEntry)a.iEntryPoint;

	__KTRACE_OPT(KBOOT,Kern::Printf("Calling entrypoint %08x(VariantInit0)", ep));

	TInt r = ep(KModuleEntryReasonVariantInit0);

	__KTRACE_OPT(KBOOT,Kern::Printf("Entrypoint returned %d",r));

	if(!(++K::ExtensionCount&0x7fffffff))

		K::Fault(K::ETooManyExtensions);

	return r;

	}

TInt InitVariant(const TRomImageHeader& a)

	{

	TInt r = InitData(a);

	__KTRACE_OPT(KBOOT,Kern::Printf("InitVariant: entry point returns %08x", r));

	if (r<0)

		Kern::Fault("VariantEntry",r);

	// Initialise and create the variant object

	r = A::CreateVariant(&a, r);

	if (r<0)

		Kern::Fault("VariantInit",r);

	return r;

	}

void P::CreateVariant()

	{

	__KTRACE_OPT(KBOOT,Kern::Printf("CreateVariant"));

	BTrace::Init0();

	InitVarExt(EFalse, &InitData);		// initialise .data for all extensions

	InitVarExt(ETrue, &InitVariant);	// find variant and initialise it

	FindRomRootDirectory();

	}

struct SExtInit1EntryPoint

	{

	inline SExtInit1EntryPoint() : iEntryPoint(0),iReturnCode(0)

		{}

	inline SExtInit1EntryPoint(TLibraryEntry aEp, TInt aVal) : iEntryPoint(aEp),iReturnCode(aVal)

		{}

	TLibraryEntry iEntryPoint;

	TInt iReturnCode;		// bits 7-0 used for extension startup priority order

	};

// This ordering function when used in conjunction with RArray<>::InsertInOrderAllowRepeats

// orders the array of extensions as follow:

//		highest priority -> lowest priority

//		if same priority -> first in, lowest index

//

TInt priorityOrder(const SExtInit1EntryPoint& aMatch, const SExtInit1EntryPoint& aEntry)

	{

	TUint8 l=(TUint8)aMatch.iReturnCode;

	TUint8 r=(TUint8)aEntry.iReturnCode;

	if(l>r)

		return -1;

	else if(l<r)

		return 1;

	else

		return 0;

	}

TInt InitExt0(const TRomImageHeader& a)

	{

	CHECK_ROM_ENTRY_POINT(a);

	TLibraryEntry ep = (TLibraryEntry)a.iEntryPoint;

	__KTRACE_OPT(KBOOT,Kern::Printf("InitExt0 %08x ep=%08x", &a, ep));

	TInt r = (*ep)(KModuleEntryReasonExtensionInit0);

	if (r<KErrNone)

		{

		__KTRACE_OPT(KBOOT,Kern::Printf("Already started"));

		return r;

		}

	SExtInit1EntryPoint s(ep,r);

	TInt count=K::ExtensionArray->Count();

	if(count==K::ExtensionCount)					// this function is only called if extensions exist, i.e. K::ExtensionCount>0

		K::Fault(K::EExtensionArrayOverflowed);		// the first insertion will allocate space for K::ExtensionCount entries and that is the maximum number of entries allowed

	TLinearOrder<SExtInit1EntryPoint> PriorityOrder(priorityOrder);

	if(K::ExtensionArray->InsertInOrderAllowRepeats(s,PriorityOrder)!=KErrNone)

		K::Fault(K::EInsertExtensionFailed);

	__KTRACE_OPT(KBOOT,Kern::Printf("Inserted at index %d, priority %d, last index %d", K::ExtensionArray->SpecificFindInOrder(s,PriorityOrder,EArrayFindMode_Last)-1, (TUint8)r, count));

	return KErrNone;

	}

void P::StartExtensions()

	{

	// start extensions...

	__KTRACE_OPT(KBOOT, Kern::Printf("Starting kernel extensions..."));

	K::ExtensionArray = new RArray<SExtInit1EntryPoint>(--K::ExtensionCount);	// ordered array of extensions excluding Variant

	if(!K::ExtensionArray)

		K::Fault(K::EExtensionArrayAllocationFailed);

	__KTRACE_OPT(KBOOT, Kern::Printf("Entry point array at %08x, max size %d",K::ExtensionArray,K::ExtensionCount));

	InitVarExt(EFalse, &InitExt0);		// populates the array of entry points in priority order

	for(TInt i=0; i<K::ExtensionArray->Count(); i++)	// call entry points in combined priority and temporal orders

		{

		TLibraryEntry ep = (*K::ExtensionArray)[i].iEntryPoint;

		__KTRACE_OPT(KBOOT,Kern::Printf("InitExt1: calling entrypoint %08x", ep));

		TInt r = ep(KModuleEntryReasonExtensionInit1);

		__KTRACE_OPT(KBOOT,Kern::Printf("Entrypoint returned %d", r));

		if (r!=KErrNone)

			K::Fault(K::EStartExtensionsFailed);

		}

	// preserve array of extensions, it contains the returned codes from ExtInit0 which may be useful for future use

	//delete K::ExtensionArray;

	//K::ExtensionArray=NULL;

	}

void P::KernelInfo(TProcessCreateInfo& aInfo, TAny*& aStack, TAny*& aHeap)

//

// Provide the initial supervisor data information from the ROM

//

	{

	aInfo.iFileName=KKernelFullPathNameSysBin;

	aInfo.iRootNameOffset=11;

	aInfo.iRootNameLength=9;

	aInfo.iExtOffset = 16;

	aInfo.iAttr=ECodeSegAttKernel|ECodeSegAttFixed;

	const TRomHeader& romHdr=TheRomHeader();

	const TRomEntry* primaryEntry=(const TRomEntry*)TheSuperPage().iPrimaryEntry;

	const TRomImageHeader* primaryImageHeader=(const TRomImageHeader*)primaryEntry->iAddressLin;

	Epoc::RomProcessInfo(aInfo, *primaryImageHeader);

	aStack = (TAny*)(romHdr.iKernDataAddress + Kern::RoundToPageSize(romHdr.iTotalSvDataSize));

	aHeap = (TAny*)(TLinAddr(aStack) + Kern::RoundToPageSize(aInfo.iStackSize));

	aInfo.iTotalDataSize=romHdr.iTotalSvDataSize;

	aInfo.iHeapSizeMin=TheSuperPage().iInitialHeapSize;

	}

EXPORT_C void Epoc::RomProcessInfo(TProcessCreateInfo& aInfo, const TRomImageHeader& a)

	{

	CHECK_PAGING_SAFE;

	aInfo.iUids=*(const TUidType*)&a.iUid1;

	aInfo.iCodeSize=a.iCodeSize;

	aInfo.iTextSize=a.iTextSize;

	aInfo.iDataSize=a.iDataSize;

	aInfo.iBssSize=a.iBssSize;

	aInfo.iTotalDataSize=a.iTotalDataSize;

	aInfo.iEntryPtVeneer=a.iEntryPoint;

	aInfo.iFileEntryPoint=a.iEntryPoint;

	aInfo.iDepCount=a.iDllRefTable ? a.iDllRefTable->iNumberOfEntries : 0;

	aInfo.iExportDir=a.iExportDir;

	aInfo.iExportDirCount=a.iExportDirCount;

	aInfo.iCodeLoadAddress=(TLinAddr)&a;//a.iCodeAddress;

	aInfo.iCodeRunAddress=a.iCodeAddress;

	aInfo.iDataLoadAddress=a.iDataAddress;

	aInfo.iDataRunAddress=a.iDataBssLinearBase;

	aInfo.iExceptionDescriptor = a.iExceptionDescriptor;

	aInfo.iHeapSizeMin=a.iHeapSizeMin;

	aInfo.iHeapSizeMax=a.iHeapSizeMax;

	aInfo.iStackSize=a.iStackSize;

	aInfo.iPriority=a.iPriority;

	aInfo.iHandle=NULL;

	aInfo.iS = a.iS;

	aInfo.iModuleVersion = a.iModuleVersion;

	if (a.iFlags&KRomImageFlagsKernelMask)

		aInfo.iAttr=ECodeSegAttKernel;

	else

		aInfo.iAttr=ECodeSegAttGlobal;

	if (a.iFlags&KRomImageFlagFixedAddressExe)

		aInfo.iAttr|=ECodeSegAttFixed;

	aInfo.iAttr &= ~ECodeSegAttABIMask;

	aInfo.iAttr |= (a.iFlags & KRomImageABIMask);

	if(a.iFlags&KRomImageSMPSafe)

		aInfo.iAttr |= ECodeSegAttSMPSafe;

	aInfo.iClientHandle = KCurrentThreadHandle;

	aInfo.iClientProcessHandle = 0;

	aInfo.iFinalHandle = 0;

	aInfo.iOwnerType = EOwnerProcess;

	aInfo.iFlags &= ~(TProcessCreateInfo::EDataPagingMask);

	if(a.iFlags&KRomImageFlagDataPaged)

		aInfo.iFlags |= TProcessCreateInfo::EDataPaged;

	if(a.iFlags&KRomImageFlagDataUnpaged)

		aInfo.iFlags |= TProcessCreateInfo::EDataUnpaged;

	CHECK_ROM_ENTRY_POINT(a);

	}

EXPORT_C void Epoc::SetMonitorEntryPoint(TDfcFn aFn)

	{

	if (aFn)

		{

		TUint32 x=(TUint32)aFn;

		PP::MonitorEntryPoint[0]=x;

		PP::MonitorEntryPoint[1]=~x;

		PP::MonitorEntryPoint[2]=((x>>2)*~x);

		}

	else

		{

		PP::MonitorEntryPoint[0]=0;

		PP::MonitorEntryPoint[1]=0;

		PP::MonitorEntryPoint[2]=0;

		}

	}

EXPORT_C void Epoc::SetMonitorExceptionHandler(TLinAddr aHandler)

	{

	TheScheduler.iMonitorExceptionHandler=aHandler;

	}

EXPORT_C TAny* Epoc::ExceptionInfo()

	{

#ifdef __SMP__

	return 0;	// separate for each CPU

#else

	return TheScheduler.i_ExcInfo;

#endif

	}

EXPORT_C const TRomHeader& Epoc::RomHeader()

	{

	return TheRomHeader();

	}

TLinAddr ExecHandler::RomHeaderAddress()

	{

	return ::RomHeaderAddress;

	}

TLinAddr ExecHandler::RomRootDirectoryAddress()

	{

	return PP::RomRootDirAddress;

	}

TBool M::IsRomAddress(const TAny* aPtr)

	{

    TLinAddr start=::RomHeaderAddress;

    TLinAddr end=start+TheRomHeader().iUncompressedSize;

	return ((TLinAddr)aPtr>=start) && ((TLinAddr)aPtr<end);

	}

void P::SetSuperPageSignature()

	{

	TUint32* sig = TheSuperPage().iSignature;

	const TUint32* time = (const TUint32*)&TheRomHeader().iTime;

	sig[0] = time[0] ^ 0xb504f333;

	sig[1] = time[1] ^ 0xf9de6484;

	}

TBool P::CheckSuperPageSignature()

	{

	const TUint32* sig = TheSuperPage().iSignature;

	const TUint32* time = (const TUint32*)&TheRomHeader().iTime;

	return ( (sig[0]^time[0])==0xb504f333 && (sig[1]^time[1])==0xf9de6484 );

	}

static const TUint32 KMapAttrType2 = 0x80000000;

static const TUint32 KMapAttrTypeShift 		 = 26;

#if defined(__CPU_MEMORY_TYPE_REMAPPING)

extern TUint32 PrimaryRegionRemapRegister();

extern TUint32 NormalMemoryRemapRegister();

#endif

EXPORT_C TMappingAttributes2::TMappingAttributes2(TMemoryType	aType,

														TBool	aUserAccess,

														TBool	aWritable,

														TBool	aExecutable,

														TInt	aShared,

														TInt	aParity)

	{

	//Sort out default values:

	if (aShared<0)

		#if defined	(__CPU_USE_SHARED_MEMORY)

		aShared = 1;

		#else

		aShared = 0;	

		#endif

	if (aParity<0)

		aParity = 0;

	// KMapAttrType2 bit marks the object as of TMappingAttributes2 type (as opposed to TMappingAttributes bitmask).

	// We have to make sure that these two types can work together.

	iAttributes =	KMapAttrType2				|	// Mark it as TMappingAttributes2 object

					EMapAttrReadSup				|	// All memory is readable from Kernel (Supervisor) mode

					(aType <<KMapAttrTypeShift)	|

					(aUserAccess ? EMapAttrReadUser : 0)|

					(aWritable	 ? EMapAttrWriteSup : 0)|

		((aWritable&&aUserAccess)? EMapAttrWriteUser: 0)|

#ifdef __MMU_USE_SYMMETRIC_ACCESS_PERMISSIONS

					(aExecutable   ? EMapAttrExecSup : 0)|

		((aExecutable&&aUserAccess)? EMapAttrExecUser: 0)|

#else

					(aExecutable ? EMapAttrExecUser|EMapAttrExecSup : 0)|

#endif

					(aShared	 ? EMapAttrShared	: 0)|

					(aParity	 ? EMapAttrUseECC	: 0);

	// Kernel relies on TMappingAttributes bitmask when dealing with various memory mappings.

	// Set cache attribute bits as they are in TMappingAttributes.

	iAttributes |= InternalCache::TypeToCachingAttributes(aType);

	}

TMappingAttributes2::TMappingAttributes2(TUint aMapAttr):iAttributes(aMapAttr)

	{

	};

TMemoryType TMappingAttributes2::Type()

	{

	if(iAttributes&KMapAttrType2)

		return (TMemoryType)(iAttributes>>KMapAttrTypeShift & 0x7); //three bits for memory type.

	switch(iAttributes&EMapAttrL1CacheMask)

		{

	case EMapAttrFullyBlocking:

		return EMemAttStronglyOrdered;

	case EMapAttrBufferedNC:

		return EMemAttDevice;

	case EMapAttrBufferedC:

	case EMapAttrL1Uncached:

	case EMapAttrCachedWTRA:

	case EMapAttrCachedWTWA:

	case EMapAttrAltCacheWTRA:

	case EMapAttrAltCacheWTWA:

		return EMemAttNormalUncached;

	case EMapAttrCachedWBRA:

	case EMapAttrCachedWBWA:

	case EMapAttrAltCacheWBRA:

	case EMapAttrAltCacheWBWA:

	case EMapAttrL1CachedMax:

		return EMemAttNormalCached;

	default:

		Panic(KErrArgument);

		return EMemAttNormalCached;

		}

	}

TBool TMappingAttributes2::UserAccess()	{return (iAttributes&EMapAttrUserRw   ?	(TBool)ETrue : (TBool)EFalse);}

TBool TMappingAttributes2::Writable()	{return (iAttributes&EMapAttrWriteMask? (TBool)ETrue : (TBool)EFalse);}

#ifdef __MMU_USE_SYMMETRIC_ACCESS_PERMISSIONS

TBool TMappingAttributes2::Executable()	{return (iAttributes&EMapAttrExecMask ? (TBool)ETrue : (TBool)EFalse);}

#else

TBool TMappingAttributes2::Executable()	{return (iAttributes&EMapAttrExecUser ? (TBool)ETrue : (TBool)EFalse);}

#endif

TBool TMappingAttributes2::Shared()		{return (iAttributes&EMapAttrShared   ?	(TBool)ETrue : (TBool)EFalse);}

TBool TMappingAttributes2::Parity()		{return (iAttributes&EMapAttrUseECC	  ?	(TBool)ETrue : (TBool)EFalse);}

TBool TMappingAttributes2::ObjectType2(){return (iAttributes&KMapAttrType2	  ?	(TBool)ETrue : (TBool)EFalse);}

void  TMappingAttributes2::Panic(TInt aPanic)	{Kern::Fault("TMappingAttributes2",aPanic);}

#ifdef __DEBUGGER_SUPPORT__

 /**