author | Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com> |
Tue, 31 Aug 2010 16:34:26 +0300 | |
branch | RCL_3 |
changeset 43 | c1f20ce4abcf |
parent 0 | a41df078684a |
child 44 | 3e88ff8f41d5 |
permissions | -rw-r--r-- |
0 | 1 |
// Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies). |
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// All rights reserved. |
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// This component and the accompanying materials are made available |
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// under the terms of the License "Eclipse Public License v1.0" |
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// which accompanies this distribution, and is available |
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// at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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// |
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// Initial Contributors: |
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// Nokia Corporation - initial contribution. |
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// |
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// Contributors: |
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// |
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// Description: |
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// e32\include\nkernsmp\nkern.h |
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// |
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// WARNING: This file contains some APIs which are internal and are subject |
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// to change without notice. Such APIs should therefore not be used |
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// outside the Kernel and Hardware Services package. |
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// |
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#ifndef __NKERN_H__ |
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#define __NKERN_H__ |
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#ifdef __STANDALONE_NANOKERNEL__ |
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#undef __IN_KERNEL__ |
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#define __IN_KERNEL__ |
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#endif |
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#include <e32const.h> |
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#include <nklib.h> |
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#include <nk_event.h> |
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#include <dfcs.h> |
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#include <nk_trace.h> |
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#include <e32atomics.h> |
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extern "C" { |
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/** @internalComponent */ |
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IMPORT_C void NKFault(const char* file, TInt line); |
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/** @internalComponent */ |
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Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
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void NKIdle(TUint32 aStage); |
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} |
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/** |
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@publishedPartner |
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@released |
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*/ |
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#define FAULT() NKFault(__FILE__,__LINE__) |
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#ifdef _DEBUG |
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/** |
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@publishedPartner |
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@released |
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*/ |
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#define __NK_ASSERT_DEBUG(c) ((void) ((c)||(FAULT(),0)) ) |
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#else |
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#define __NK_ASSERT_DEBUG(c) |
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#endif |
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/** |
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@publishedPartner |
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@released |
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*/ |
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#define __NK_ASSERT_ALWAYS(c) ((void) ((c)||(FAULT(),0)) ) |
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/** |
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@publishedPartner |
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@released |
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*/ |
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const TInt KNumPriorities=64; |
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const TInt KMaxCpus=8; |
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class NSchedulable; |
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class NThread; |
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class NThreadGroup; |
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/** Spin lock |
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Used for protecting a code fragment against both interrupts and concurrent |
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execution on another processor. |
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List of spin locks in the nanokernel, in deadlock-prevention order: |
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A NEventHandler::TiedLock (preemption) |
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B NFastMutex spin locks (preemption) |
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C Thread spin locks (preemption) |
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D Thread group spin locks (preemption) |
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E Per-CPU ready list lock (preemption) |
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a Idle DFC list lock (interrupts) |
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b Per-CPU exogenous IDFC queue lock (interrupts) |
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c NTimerQ spin lock (interrupts) |
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d Generic IPI list locks (interrupts) |
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e NIrq spin locks (interrupts) |
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f Per-CPU event handler list lock (interrupts) |
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z BTrace lock (interrupts) |
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z must be minimum since BTrace can appear anywhere |
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interrupt-disabling spinlocks must be lower than preemption-disabling ones |
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Nestings which actually occur are: |
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A > C |
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B > C > D > E |
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c > f |
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Nothing (except possibly z) nested inside a, b, d, f |
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e is held while calling HW-poking functions (which might use other spinlocks) |
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@publishedPartner |
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@prototype |
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*/ |
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class TSpinLock |
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{ |
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public: |
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enum TOrder |
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{ |
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// Bit 7 of order clear for locks used with interrupts disabled |
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EOrderGenericIrqLow0 =0x00u, // Device driver spin locks, low range |
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EOrderGenericIrqLow1 =0x01u, // Device driver spin locks, low range |
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EOrderGenericIrqLow2 =0x02u, // Device driver spin locks, low range |
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EOrderGenericIrqLow3 =0x03u, // Device driver spin locks, low range |
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EOrderBTrace =0x04u, // BTrace lock |
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EOrderEventHandlerList =0x07u, // Per-CPU event handler list lock |
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EOrderCacheMaintenance =0x08u, // CacheMaintenance (for PL310) |
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EOrderNIrq =0x0Au, // NIrq lock |
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EOrderGenericIPIList =0x0Du, // Generic IPI list lock |
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EOrderNTimerQ =0x10u, // Nanokernel timer queue lock |
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EOrderExIDfcQ =0x13u, // Per-CPU exogenous IDFC queue list lock |
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EOrderIdleDFCList =0x16u, // Idle DFC list lock |
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EOrderGenericIrqHigh0 =0x18u, // Device driver spin locks, high range |
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EOrderGenericIrqHigh1 =0x19u, // Device driver spin locks, high range |
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EOrderGenericIrqHigh2 =0x1Au, // Device driver spin locks, high range |
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EOrderGenericIrqHigh3 =0x1Bu, // Device driver spin locks, high range |
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// Bit 7 of order set for locks used with interrupts enabled, preemption disabled |
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EOrderGenericPreLow0 =0x80u, // Device driver spin locks, low range |
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EOrderGenericPreLow1 =0x81u, // Device driver spin locks, low range |
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EOrderReadyList =0x88u, // Per-CPU ready list lock |
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EOrderThreadGroup =0x90u, // Thread group locks |
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EOrderThread =0x91u, // Thread locks |
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EOrderFastMutex =0x98u, // Fast mutex locks |
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EOrderEventHandlerTied =0x9Cu, // Event handler tied lock |
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43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
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EOrderEnumerate =0x9Du, // Thread/Group enumeration lists |
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EOrderGenericPreHigh0 =0x9Eu, // Device driver spin locks, high range |
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EOrderGenericPreHigh1 =0x9Fu, // Device driver spin locks, high range |
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EOrderNone =0xFFu // No order check required (e.g. for dynamic ordering) |
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}; |
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public: |
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IMPORT_C TSpinLock(TUint aOrder); |
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IMPORT_C void LockIrq(); /**< @internalComponent disable interrupts and acquire the lock */ |
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IMPORT_C void UnlockIrq(); /**< @internalComponent release the lock and enable interrupts */ |
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IMPORT_C TBool FlashIrq(); /**< @internalComponent if someone else is waiting for the lock, UnlockIrq() then LockIrq() */ |
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IMPORT_C void LockOnly(); /**< @internalComponent acquire the lock, assuming interrupts/preemption already disabled */ |
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IMPORT_C void UnlockOnly(); /**< @internalComponent release the lock, don't change interrupt/preemption state */ |
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IMPORT_C TBool FlashOnly(); /**< @internalComponent if someone else is waiting for the lock, UnlockOnly() then LockOnly() */ |
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IMPORT_C TInt LockIrqSave(); /**< @internalComponent remember original interrupt state then disable interrupts and acquire the lock */ |
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IMPORT_C void UnlockIrqRestore(TInt); /**< @internalComponent release the lock then restore original interrupt state */ |
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IMPORT_C TBool FlashIrqRestore(TInt); /**< @internalComponent if someone else is waiting for the lock, UnlockIrqRestore() then LockIrq() */ |
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IMPORT_C TBool FlashPreempt(); /**< @internalComponent if someone else is waiting for the lock, UnlockOnly(); NKern::PreemptionPoint(); LockOnly(); */ |
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private: |
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volatile TUint64 iLock; |
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}; |
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/** Macro to disable interrupts and acquire the lock. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQ(lock) ((lock).LockIrq()) |
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/** Macro to release the lock and enable interrupts. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQ(lock) (lock).UnlockIrq() |
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/** Macro to see if someone else is waiting for the lock, enabling IRQs |
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then disabling IRQs again. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQ(lock) (lock).FlashIrq() |
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/** Macro to remember original interrupt state then disable interrupts |
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and acquire the lock. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQSAVE(lock) ((lock).LockIrqSave()) |
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/** Macro to release the lock then restore original interrupt state to that |
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supplied. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQRESTORE(lock,irq) (lock).UnlockIrqRestore(irq) |
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/** Macro to see if someone else is waiting for the lock, enabling IRQs to |
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the original state supplied then disabling IRQs again. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQRESTORE(lock,irq) (lock).FlashIrqRestore(irq) |
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/** Macro to acquire the lock. This assumes the caller has already disabled |
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interrupts/preemption. |
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If interrupts/preemption is not disabled a run-time assert will occur |
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This is to protect against unsafe code that might lead to same core |
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deadlock. |
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In device driver code it is safer to use __SPIN_LOCK_IRQSAVE() instead, |
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although not as efficient should interrupts aleady be disabled for the |
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duration the lock is held. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK(lock) ((lock).LockOnly()) |
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/** Macro to release the lock, don't change interrupt/preemption state. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK(lock) (lock).UnlockOnly() |
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/** |
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@internalComponent |
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*/ |
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#define __SPIN_FLASH(lock) (lock).FlashOnly() |
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/** Macro to see if someone else is waiting for the lock, enabling preemption |
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then disabling it again. |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_PREEMPT(lock) (lock).FlashPreempt() |
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/** Read/Write Spin lock |
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@publishedPartner |
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@prototype |
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*/ |
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class TRWSpinLock |
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{ |
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public: |
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IMPORT_C TRWSpinLock(TUint aOrder); // Uses same order space as TSpinLock |
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IMPORT_C void LockIrqR(); /**< @internalComponent disable interrupts and acquire read lock */ |
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IMPORT_C void UnlockIrqR(); /**< @internalComponent release read lock and enable interrupts */ |
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IMPORT_C TBool FlashIrqR(); /**< @internalComponent if someone else is waiting for write lock, UnlockIrqR() then LockIrqR() */ |
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IMPORT_C void LockIrqW(); /**< @internalComponent disable interrupts and acquire write lock */ |
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IMPORT_C void UnlockIrqW(); /**< @internalComponent release write lock and enable interrupts */ |
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IMPORT_C TBool FlashIrqW(); /**< @internalComponent if someone else is waiting for the lock, UnlockIrqW() then LockIrqW() */ |
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IMPORT_C void LockOnlyR(); /**< @internalComponent acquire read lock, assuming interrupts/preemption already disabled */ |
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IMPORT_C void UnlockOnlyR(); /**< @internalComponent release read lock, don't change interrupt/preemption state */ |
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IMPORT_C TBool FlashOnlyR(); /**< @internalComponent if someone else is waiting for write lock, UnlockOnlyR() then LockOnlyR() */ |
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IMPORT_C void LockOnlyW(); /**< @internalComponent acquire write lock, assuming interrupts/preemption already disabled */ |
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IMPORT_C void UnlockOnlyW(); /**< @internalComponent release write lock, don't change interrupt/preemption state */ |
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IMPORT_C TBool FlashOnlyW(); /**< @internalComponent if someone else is waiting for the lock, UnlockOnlyW() then LockOnlyW() */ |
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IMPORT_C TInt LockIrqSaveR(); /**< @internalComponent disable interrupts and acquire read lock, return original interrupt state */ |
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IMPORT_C void UnlockIrqRestoreR(TInt); /**< @internalComponent release read lock and reset original interrupt state */ |
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IMPORT_C TBool FlashIrqRestoreR(TInt); /**< @internalComponent if someone else is waiting for write lock, UnlockIrqRestoreR() then LockIrqR() */ |
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IMPORT_C TInt LockIrqSaveW(); /**< @internalComponent disable interrupts and acquire write lock, return original interrupt state */ |
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IMPORT_C void UnlockIrqRestoreW(TInt); /**< @internalComponent release write lock and reset original interrupt state */ |
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IMPORT_C TBool FlashIrqRestoreW(TInt); /**< @internalComponent if someone else is waiting for the lock, UnlockIrqRestoreW() then LockIrqW() */ |
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IMPORT_C TBool FlashPreemptR(); /**< @internalComponent if someone else is waiting for write lock, UnlockOnlyR(); NKern::PreemptionPoint(); LockOnlyR(); */ |
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IMPORT_C TBool FlashPreemptW(); /**< @internalComponent if someone else is waiting for the lock, UnlockOnlyW(); NKern::PreemptionPoint(); LockOnlyW(); */ |
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private: |
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volatile TUint64 iLock; |
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}; |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQ_R(lock) (lock).LockIrqR() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQ_R(lock) (lock).UnlockIrqR() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQ_R(lock) ((lock).FlashIrqR()) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQ_W(lock) (lock).LockIrqW() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQ_W(lock) (lock).UnlockIrqW() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQ_W(lock) ((lock).FlashIrqW()) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_R(lock) (lock).LockOnlyR() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_R(lock) (lock).UnlockOnlyR() |
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/** |
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@internalComponent |
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*/ |
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#define __SPIN_FLASH_R(lock) ((lock).FlashOnlyR()) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_W(lock) (lock).LockOnlyW() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_W(lock) (lock).UnlockOnlyW() |
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/** |
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@internalComponent |
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*/ |
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#define __SPIN_FLASH_W(lock) ((lock).FlashOnlyW()) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQSAVE_R(lock) (lock).LockIrqSaveR() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQRESTORE_R(lock,irq) (lock).UnlockIrqRestoreR(irq) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQRESTORE_R(lock,irq) ((lock).FlashIrqRestoreR(irq)) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_LOCK_IRQSAVE_W(lock) (lock).LockIrqSaveW() |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_UNLOCK_IRQRESTORE_W(lock,irq) (lock).UnlockIrqRestoreW(irq) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_IRQRESTORE_W(lock,irq) ((lock).FlashIrqRestoreW(irq)) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_PREEMPT_R(lock) ((lock).FlashPreemptR()) |
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/** |
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@publishedPartner |
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@prototype |
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*/ |
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#define __SPIN_FLASH_PREEMPT_W(lock) ((lock).FlashPreemptW()) |
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#ifdef _DEBUG |
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#define __INCLUDE_SPIN_LOCK_CHECKS__ |
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#endif |
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/** Nanokernel fast semaphore |
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A light-weight semaphore class that only supports a single waiting thread, |
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suitable for the Symbian OS thread I/O semaphore. |
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Initialising a NFastSemaphore involves two steps: |
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- Constructing the semaphore |
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- Setting the semaphore owning thread (the one allowed to wait on it) |
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For example, creating one for the current thread to wait on: |
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@code |
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NFastSemaphore sem; |
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sem.iOwningThread = NKern::CurrentThread(); |
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@endcode |
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@publishedPartner |
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@prototype |
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*/ |
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class NFastSemaphore |
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{ |
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public: |
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inline NFastSemaphore(); |
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inline NFastSemaphore(NThreadBase* aThread); |
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IMPORT_C void SetOwner(NThreadBase* aThread); |
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IMPORT_C void Wait(); |
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IMPORT_C void Signal(); |
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IMPORT_C void SignalN(TInt aCount); |
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IMPORT_C void Reset(); |
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void WaitCancel(); |
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TInt Dec(NThreadBase* aThread); // does mb() if >0 |
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NThreadBase* Inc(TInt aCount); // does mb() |
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NThreadBase* DoReset(); // does mb() |
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public: |
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/** If >=0 the semaphore count |
|
452 |
If <0, (thread>>2)|0x80000000 |
|
453 |
@internalComponent |
|
454 |
*/ |
|
455 |
TInt iCount; |
|
456 |
||
457 |
/** The thread allowed to wait on the semaphore |
|
458 |
@internalComponent |
|
459 |
*/ |
|
460 |
NThreadBase* iOwningThread; |
|
461 |
}; |
|
462 |
||
463 |
/** Create a fast semaphore |
|
464 |
||
465 |
@publishedPartner |
|
466 |
@prototype |
|
467 |
*/ |
|
468 |
inline NFastSemaphore::NFastSemaphore() |
|
469 |
: iCount(0), iOwningThread(NULL) |
|
470 |
{} |
|
471 |
||
472 |
/** Nanokernel fast mutex |
|
473 |
||
474 |
A light-weight priority-inheritance mutex that can be used if the following |
|
475 |
conditions apply: |
|
476 |
||
477 |
- Threads that hold the mutex never block. |
|
478 |
- The mutex is never acquired in a nested fashion |
|
479 |
||
480 |
If either of these conditions is not met, a DMutex object is more appropriate. |
|
481 |
||
482 |
@publishedPartner |
|
483 |
@prototype |
|
484 |
*/ |
|
485 |
class NFastMutex |
|
486 |
{ |
|
487 |
public: |
|
488 |
IMPORT_C NFastMutex(); |
|
489 |
IMPORT_C void Wait(); |
|
490 |
IMPORT_C void Signal(); |
|
491 |
IMPORT_C TBool HeldByCurrentThread(); |
|
492 |
private: |
|
493 |
void DoWaitL(); |
|
494 |
void DoSignalL(); |
|
495 |
||
496 |
friend class NKern; |
|
497 |
public: |
|
498 |
/** @internalComponent |
|
499 |
||
500 |
If mutex is free and no-one is waiting, iHoldingThread=0 |
|
501 |
If mutex is held and no-one is waiting, iHoldingThread points to holding thread |
|
502 |
If mutex is free but threads are waiting, iHoldingThread=1 |
|
503 |
If mutex is held and threads are waiting, iHoldingThread points to holding thread but with bit 0 set |
|
504 |
*/ |
|
505 |
NThreadBase* iHoldingThread; |
|
506 |
||
507 |
TUint32 i_NFastMutex_Pad1; /**< @internalComponent */ |
|
508 |
||
509 |
/** @internalComponent |
|
510 |
||
511 |
Spin lock to protect mutex |
|
512 |
*/ |
|
513 |
TSpinLock iMutexLock; |
|
514 |
||
515 |
/** @internalComponent |
|
516 |
||
517 |
List of NThreads which are waiting for the mutex. The threads are linked via |
|
518 |
their iWaitLink members. |
|
519 |
*/ |
|
520 |
TPriList<NThreadBase, KNumPriorities> iWaitQ; |
|
521 |
}; |
|
522 |
||
523 |
__ASSERT_COMPILE(!(_FOFF(NFastMutex,iMutexLock)&7)); |
|
524 |
||
525 |
||
526 |
/** |
|
527 |
@publishedPartner |
|
528 |
@prototype |
|
529 |
||
530 |
The type of the callback function used by the nanokernel timer. |
|
531 |
||
532 |
@see NTimer |
|
533 |
*/ |
|
534 |
typedef NEventFn NTimerFn; |
|
535 |
||
536 |
||
537 |
||
538 |
||
539 |
/** |
|
540 |
@publishedPartner |
|
541 |
@prototype |
|
542 |
||
543 |
A basic relative timer provided by the nanokernel. |
|
544 |
||
545 |
It can generate either a one-shot interrupt or periodic interrupts. |
|
546 |
||
547 |
A timeout handler is called when the timer expires, either: |
|
548 |
- from the timer ISR - if the timer is queued via OneShot(TInt aTime) or OneShot(TInt aTime, TBool EFalse), or |
|
549 |
- from the nanokernel timer dfc1 thread - if the timer is queued via OneShot(TInt aTime, TBool ETrue) call, or |
|
550 |
- from any other dfc thread that provided DFC belongs to - if the timer is queued via OneShot(TInt aTime, TDfc& aDfc) call. |
|
551 |
Call-back mechanism cannot be changed in the life time of a timer. |
|
552 |
||
553 |
These timer objects may be manipulated from any context. |
|
554 |
The timers are driven from a periodic system tick interrupt, |
|
555 |
usually a 1ms period. |
|
556 |
||
557 |
@see NTimerFn |
|
558 |
*/ |
|
559 |
class NTimerQ; |
|
560 |
class NTimer : public NEventHandler |
|
561 |
{ |
|
562 |
public: |
|
563 |
/** |
|
564 |
Default constructor. |
|
565 |
*/ |
|
566 |
inline NTimer() |
|
567 |
{ |
|
568 |
iHType = EEventHandlerNTimer; |
|
569 |
i8888.iHState1 = EIdle; |
|
570 |
} |
|
571 |
/** |
|
572 |
Constructor taking a callback function and a pointer to be passed |
|
573 |
to the callback function. |
|
574 |
||
575 |
@param aFunction The callback function. |
|
576 |
@param aPtr A pointer to be passed to the callback function |
|
577 |
when called. |
|
578 |
*/ |
|
579 |
inline NTimer(NTimerFn aFunction, TAny* aPtr) |
|
580 |
{ |
|
581 |
iPtr = aPtr; |
|
582 |
iFn = aFunction; |
|
583 |
iHType = EEventHandlerNTimer; |
|
584 |
i8888.iHState1 = EIdle; |
|
585 |
} |
|
586 |
IMPORT_C NTimer(NSchedulable* aTied, NTimerFn aFunction, TAny* aPtr); |
|
587 |
IMPORT_C NTimer(TDfcFn aFunction, TAny* aPtr, TInt aPriority); // create DFC, queue to be set later |
|
588 |
IMPORT_C NTimer(TDfcFn aFunction, TAny* aPtr, TDfcQue* aDfcQ, TInt aPriority); // create DFC |
|
589 |
IMPORT_C void SetDfcQ(TDfcQue* aDfcQ); |
|
590 |
IMPORT_C ~NTimer(); |
|
591 |
IMPORT_C TInt SetTied(NSchedulable* aTied); |
|
592 |
IMPORT_C TInt OneShot(TInt aTime); |
|
593 |
IMPORT_C TInt OneShot(TInt aTime, TBool aDfc); |
|
594 |
IMPORT_C TInt OneShot(TInt aTime, TDfc& aDfc); |
|
595 |
IMPORT_C TInt Again(TInt aTime); |
|
596 |
IMPORT_C TBool Cancel(); |
|
597 |
IMPORT_C TBool IsPending(); |
|
598 |
private: |
|
599 |
enum { ECancelDestroy=1 }; |
|
600 |
private: |
|
601 |
inline TBool IsNormal() |
|
602 |
{ return iHType==EEventHandlerNTimer; } |
|
603 |
inline TBool IsMutating() |
|
604 |
{ return iHType<KNumDfcPriorities; } |
|
605 |
inline TBool IsValid() |
|
606 |
{ return iHType<KNumDfcPriorities || iHType==EEventHandlerNTimer; } |
|
607 |
void AddAsDFC(); |
|
608 |
TUint DoCancel(TUint aFlags); |
|
609 |
void DoCancel0(TUint aState); |
|
610 |
TBool DoCancelMutating(TUint aFlags); |
|
611 |
public: |
|
612 |
/** |
|
613 |
@internalComponent |
|
614 |
*/ |
|
615 |
enum TState |
|
616 |
{ |
|
617 |
EIdle=0, // not queued |
|
618 |
// 1 skipped so as not to clash with DFC states |
|
619 |
ETransferring=2, // being transferred from holding to ordered queue |
|
620 |
EHolding=3, // on holding queue |
|
621 |
EOrdered=4, // on ordered queue |
|
622 |
ECritical=5, // on ordered queue and in use by queue walk routine |
|
623 |
EFinal=6, // on final queue |
|
624 |
EEventQ=32, // 32+n = on event queue of CPU n (for tied timers) |
|
625 |
}; |
|
626 |
public: |
|
627 |
TUint32 iTriggerTime; /**< @internalComponent */ |
|
628 |
TUint32 iNTimerSpare1; /**< @internalComponent */ |
|
629 |
||
630 |
/** This field is available for use by the timer client provided that |
|
631 |
the timer isn't a mutating-into-DFC timer. |
|
632 |
@internalTechnology */ |
|
633 |
// TUint8 iUserFlags; // i8888.iHState0 |
|
634 |
// TUint8 iState; /**< @internalComponent */ // i8888.iHState1 |
|
635 |
// TUint8 iCompleteInDfc; /**< @internalComponent */ // i8888.iHState2 |
|
636 |
||
637 |
||
638 |
friend class NTimerQ; |
|
639 |
friend class NSchedulable; |
|
640 |
}; |
|
641 |
||
642 |
/** |
|
643 |
@internalTechnology |
|
644 |
*/ |
|
645 |
#define i_NTimer_iUserFlags i8888.iHState0 |
|
646 |
||
647 |
/** |
|
648 |
@internalComponent |
|
649 |
*/ |
|
650 |
#define i_NTimer_iState i8888.iHState1 |
|
651 |
||
652 |
/** |
|
653 |
@publishedPartner |
|
654 |
@released |
|
655 |
*/ |
|
656 |
typedef void (*NThreadFunction)(TAny*); |
|
657 |
||
658 |
/** |
|
659 |
@publishedPartner |
|
660 |
@released |
|
661 |
*/ |
|
662 |
typedef TDfc* (*NThreadExitHandler)(NThread*); |
|
663 |
||
664 |
/** |
|
665 |
@publishedPartner |
|
666 |
@prototype |
|
667 |
*/ |
|
668 |
typedef void (*NThreadStateHandler)(NThread*,TInt,TInt); |
|
669 |
||
670 |
/** |
|
671 |
@publishedPartner |
|
672 |
@prototype |
|
673 |
*/ |
|
674 |
typedef void (*NThreadExceptionHandler)(TAny*,NThread*); |
|
675 |
||
676 |
/** |
|
677 |
@publishedPartner |
|
678 |
@prototype |
|
679 |
*/ |
|
680 |
typedef void (*NThreadTimeoutHandler)(NThread*,TInt); |
|
681 |
||
682 |
/** |
|
683 |
@publishedPartner |
|
684 |
@prototype |
|
685 |
*/ |
|
686 |
struct SNThreadHandlers |
|
687 |
{ |
|
688 |
NThreadExitHandler iExitHandler; |
|
689 |
NThreadStateHandler iStateHandler; |
|
690 |
NThreadExceptionHandler iExceptionHandler; |
|
691 |
NThreadTimeoutHandler iTimeoutHandler; |
|
692 |
}; |
|
693 |
||
694 |
/** @internalComponent */ |
|
695 |
extern void NThread_Default_State_Handler(NThread*, TInt, TInt); |
|
696 |
||
697 |
/** @internalComponent */ |
|
698 |
extern void NThread_Default_Exception_Handler(TAny*, NThread*); |
|
699 |
||
700 |
/** @internalComponent */ |
|
701 |
#define NTHREAD_DEFAULT_EXIT_HANDLER ((NThreadExitHandler)0) |
|
702 |
||
703 |
/** @internalComponent */ |
|
704 |
#define NTHREAD_DEFAULT_STATE_HANDLER (&NThread_Default_State_Handler) |
|
705 |
||
706 |
/** @internalComponent */ |
|
707 |
#define NTHREAD_DEFAULT_EXCEPTION_HANDLER (&NThread_Default_Exception_Handler) |
|
708 |
||
709 |
/** @internalComponent */ |
|
710 |
#define NTHREAD_DEFAULT_TIMEOUT_HANDLER ((NThreadTimeoutHandler)0) |
|
711 |
||
712 |
||
713 |
/** |
|
714 |
@publishedPartner |
|
715 |
@prototype |
|
716 |
*/ |
|
717 |
struct SFastExecTable |
|
718 |
{ |
|
719 |
TInt iFastExecCount; // includes implicit function#0 |
|
720 |
TLinAddr iFunction[1]; // first entry is for call number 1 |
|
721 |
}; |
|
722 |
||
723 |
/** |
|
724 |
@publishedPartner |
|
725 |
@prototype |
|
726 |
*/ |
|
727 |
const TUint32 KExecFlagClaim=0x80000000; // claim system lock |
|
728 |
||
729 |
/** |
|
730 |
@publishedPartner |
|
731 |
@prototype |
|
732 |
*/ |
|
733 |
const TUint32 KExecFlagRelease=0x40000000; // release system lock |
|
734 |
||
735 |
/** |
|
736 |
@publishedPartner |
|
737 |
@prototype |
|
738 |
*/ |
|
739 |
const TUint32 KExecFlagPreprocess=0x20000000; // preprocess |
|
740 |
||
741 |
/** |
|
742 |
@publishedPartner |
|
743 |
@prototype |
|
744 |
*/ |
|
745 |
const TUint32 KExecFlagExtraArgMask=0x1C000000; // 3 bits indicating additional arguments |
|
746 |
||
747 |
/** |
|
748 |
@publishedPartner |
|
749 |
@prototype |
|
750 |
*/ |
|
751 |
const TUint32 KExecFlagExtraArgs2=0x04000000; // 2 additional arguments |
|
752 |
||
753 |
/** |
|
754 |
@publishedPartner |
|
755 |
@prototype |
|
756 |
*/ |
|
757 |
const TUint32 KExecFlagExtraArgs3=0x08000000; // 3 additional arguments |
|
758 |
||
759 |
/** |
|
760 |
@publishedPartner |
|
761 |
@prototype |
|
762 |
*/ |
|
763 |
const TUint32 KExecFlagExtraArgs4=0x0C000000; // 4 additional arguments |
|
764 |
||
765 |
/** |
|
766 |
@publishedPartner |
|
767 |
@prototype |
|
768 |
*/ |
|
769 |
const TUint32 KExecFlagExtraArgs5=0x10000000; // 5 additional arguments |
|
770 |
||
771 |
/** |
|
772 |
@publishedPartner |
|
773 |
@prototype |
|
774 |
*/ |
|
775 |
const TUint32 KExecFlagExtraArgs6=0x14000000; // 6 additional arguments |
|
776 |
||
777 |
/** |
|
778 |
@publishedPartner |
|
779 |
@prototype |
|
780 |
*/ |
|
781 |
const TUint32 KExecFlagExtraArgs7=0x18000000; // 7 additional arguments |
|
782 |
||
783 |
/** |
|
784 |
@publishedPartner |
|
785 |
@prototype |
|
786 |
*/ |
|
787 |
const TUint32 KExecFlagExtraArgs8=0x1C000000; // 8 additional arguments |
|
788 |
||
789 |
||
790 |
/** |
|
791 |
@publishedPartner |
|
792 |
@prototype |
|
793 |
*/ |
|
794 |
struct SSlowExecEntry |
|
795 |
{ |
|
796 |
TUint32 iFlags; // information about call |
|
797 |
TLinAddr iFunction; // address of function to be called |
|
798 |
}; |
|
799 |
||
800 |
||
801 |
/** |
|
802 |
@publishedPartner |
|
803 |
@prototype |
|
804 |
*/ |
|
805 |
struct SSlowExecTable |
|
806 |
{ |
|
807 |
TInt iSlowExecCount; |
|
808 |
TLinAddr iInvalidExecHandler; // used if call number invalid |
|
809 |
TLinAddr iPreprocessHandler; // used for handle lookups |
|
810 |
SSlowExecEntry iEntries[1]; // first entry is for call number 0 |
|
811 |
}; |
|
812 |
||
813 |
// Thread iAttributes Constants |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
814 |
const TUint8 KThreadAttImplicitSystemLock=1; /**< @internalComponent */ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
815 |
const TUint8 KThreadAttAddressSpace=2; /**< @internalComponent */ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
816 |
const TUint8 KThreadAttLoggable=4; /**< @internalComponent */ |
0 | 817 |
|
818 |
||
819 |
// Thread CPU |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
820 |
const TUint32 KCpuAffinityAny=0xffffffffu; /**< @internalComponent */ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
821 |
const TUint32 KCpuAffinityPref=0x40000000u; /**< @internalComponent */ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
822 |
const TUint32 KCpuAffinityTransient=0x20000000u; /**< @internalComponent */ |
0 | 823 |
|
824 |
/** Information needed for creating a nanothread. |
|
825 |
||
826 |
@publishedPartner |
|
827 |
@prototype |
|
828 |
*/ |
|
829 |
struct SNThreadCreateInfo |
|
830 |
{ |
|
831 |
NThreadFunction iFunction; |
|
832 |
TAny* iStackBase; |
|
833 |
TInt iStackSize; |
|
834 |
TInt iPriority; |
|
835 |
TInt iTimeslice; |
|
836 |
TUint8 iAttributes; |
|
837 |
TUint32 iCpuAffinity; |
|
838 |
const SNThreadHandlers* iHandlers; |
|
839 |
const SFastExecTable* iFastExecTable; |
|
840 |
const SSlowExecTable* iSlowExecTable; |
|
841 |
const TUint32* iParameterBlock; |
|
842 |
TInt iParameterBlockSize; // if zero, iParameterBlock _is_ the initial data |
|
843 |
// otherwise it points to n bytes of initial data |
|
844 |
NThreadGroup* iGroup; // NULL for lone thread |
|
845 |
}; |
|
846 |
||
847 |
/** Information needed for creating a nanothread group. |
|
848 |
||
849 |
@publishedPartner |
|
850 |
@prototype |
|
851 |
*/ |
|
852 |
struct SNThreadGroupCreateInfo |
|
853 |
{ |
|
854 |
TUint32 iCpuAffinity; |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
855 |
TDfc* iDestructionDfc; |
0 | 856 |
}; |
857 |
||
858 |
/** Constant for use with NKern:: functions which release a fast mutex as well |
|
859 |
as performing some other operations. |
|
860 |
||
861 |
@publishedPartner |
|
862 |
@released |
|
863 |
*/ |
|
864 |
#define SYSTEM_LOCK (NFastMutex*)0 |
|
865 |
||
866 |
/** Idle handler function |
|
867 |
Pointer to a function which is called whenever a CPU goes idle |
|
868 |
||
869 |
@param aPtr The iPtr stored in the SCpuIdleHandler structure |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
870 |
@param aStage Bits 0-7 give a bitmask of CPUs now active, i.e. 0 means all processors now idle |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
871 |
Bit 31 set indicates that the current core can now be powered down |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
872 |
Bit 30 set indicates that other cores still remain to be retired |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
873 |
Bit 29 set indicates that postamble processing is required after waking up |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
874 |
@param aU Points to some per-CPU uncached memory used for handshaking during power down/power up |
0 | 875 |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
876 |
@internalComponent |
0 | 877 |
*/ |
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
878 |
typedef void (*TCpuIdleHandlerFn)(TAny* aPtr, TUint32 aStage, volatile TAny* aU); |
0 | 879 |
|
880 |
/** Idle handler structure |
|
881 |
||
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
882 |
@internalComponent |
0 | 883 |
*/ |
884 |
struct SCpuIdleHandler |
|
885 |
{ |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
886 |
/** |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
887 |
Defined flag bits in aStage parameter |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
888 |
*/ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
889 |
enum |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
890 |
{ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
891 |
EActiveCpuMask=0xFFu, |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
892 |
EPostamble=1u<<29, // postamble needed |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
893 |
EMore=1u<<30, // more cores still to be retired |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
894 |
ERetire=1u<<31, // this core can now be retired |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
895 |
}; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
896 |
|
0 | 897 |
TCpuIdleHandlerFn iHandler; |
898 |
TAny* iPtr; |
|
899 |
volatile TBool iPostambleRequired; |
|
900 |
}; |
|
901 |
||
902 |
||
903 |
/** |
|
904 |
@internalComponent |
|
905 |
*/ |
|
906 |
enum TUserModeCallbackReason |
|
907 |
{ |
|
908 |
EUserModeCallbackRun, |
|
909 |
EUserModeCallbackCancel, |
|
910 |
}; |
|
911 |
||
912 |
||
913 |
/** |
|
914 |
A callback function executed when a thread returns to user mode. |
|
915 |
||
916 |
@internalComponent |
|
917 |
*/ |
|
918 |
typedef void (*TUserModeCallbackFunc)(TAny* aThisPtr, TUserModeCallbackReason aReasonCode); |
|
919 |
||
920 |
||
921 |
/** |
|
922 |
An object representing a queued callback to be executed when a thread returns to user mode. |
|
923 |
||
924 |
@internalComponent |
|
925 |
*/ |
|
926 |
class TUserModeCallback |
|
927 |
{ |
|
928 |
public: |
|
929 |
TUserModeCallback(TUserModeCallbackFunc); |
|
930 |
~TUserModeCallback(); |
|
931 |
||
932 |
public: |
|
933 |
TUserModeCallback* volatile iNext; |
|
934 |
TUserModeCallbackFunc iFunc; |
|
935 |
}; |
|
936 |
||
937 |
TUserModeCallback* const KUserModeCallbackUnqueued = ((TUserModeCallback*)1); |
|
938 |
||
939 |
||
940 |
/** Main function for AP |
|
941 |
||
942 |
@internalTechnology |
|
943 |
*/ |
|
944 |
struct SAPBootInfo; |
|
945 |
typedef void (*TAPBootFunc)(volatile SAPBootInfo*); |
|
946 |
||
947 |
||
948 |
/** Information needed to boot an AP |
|
949 |
||
950 |
@internalTechnology |
|
951 |
*/ |
|
952 |
struct SAPBootInfo |
|
953 |
{ |
|
954 |
TUint32 iCpu; // Hardware CPU ID |
|
955 |
TUint32 iInitStackSize; // Size of initial stack |
|
956 |
TLinAddr iInitStackBase; // Base of initial stack |
|
957 |
TAPBootFunc iMain; // Address of initial function to call |
|
958 |
TAny* iArgs[4]; |
|
959 |
}; |
|
960 |
||
961 |
typedef void (*NIsr)(TAny*); |
|
962 |
||
963 |
/** Nanokernel functions |
|
964 |
||
965 |
@publishedPartner |
|
966 |
@prototype |
|
967 |
*/ |
|
968 |
class NKern |
|
969 |
{ |
|
970 |
public: |
|
971 |
/** Bitmask values used when blocking a nanothread. |
|
972 |
@see NKern::Block() |
|
973 |
*/ |
|
974 |
enum TBlockMode |
|
975 |
{ |
|
976 |
EEnterCS=1, /**< Enter thread critical section before blocking */ |
|
977 |
ERelease=2, /**< Release specified fast mutex before blocking */ |
|
978 |
EClaim=4, /**< Re-acquire specified fast mutex when unblocked */ |
|
979 |
EObstruct=8, /**< Signifies obstruction of thread rather than lack of work to do */ |
|
980 |
}; |
|
981 |
||
982 |
/** Values that specify the context of the processor. |
|
983 |
@see NKern::CurrentContext() |
|
984 |
*/ |
|
985 |
enum TContext |
|
986 |
{ |
|
987 |
EThread=0, /**< The processor is in a thread context*/ |
|
988 |
EIDFC=1, /**< The processor is in an IDFC context*/ |
|
989 |
EInterrupt=2, /**< The processor is in an interrupt context*/ |
|
990 |
EEscaped=KMaxTInt /**< Not valid a process context on target hardware*/ |
|
991 |
}; |
|
992 |
||
993 |
public: |
|
994 |
// Threads |
|
995 |
IMPORT_C static TInt ThreadCreate(NThread* aThread, SNThreadCreateInfo& aInfo); |
|
996 |
IMPORT_C static TBool ThreadSuspend(NThread* aThread, TInt aCount); |
|
997 |
IMPORT_C static TBool ThreadResume(NThread* aThread); |
|
998 |
IMPORT_C static TBool ThreadResume(NThread* aThread, NFastMutex* aMutex); |
|
999 |
IMPORT_C static TBool ThreadForceResume(NThread* aThread); |
|
1000 |
IMPORT_C static TBool ThreadForceResume(NThread* aThread, NFastMutex* aMutex); |
|
1001 |
IMPORT_C static void ThreadRelease(NThread* aThread, TInt aReturnValue); |
|
1002 |
IMPORT_C static void ThreadRelease(NThread* aThread, TInt aReturnValue, NFastMutex* aMutex); |
|
1003 |
IMPORT_C static void ThreadSetPriority(NThread* aThread, TInt aPriority); |
|
1004 |
IMPORT_C static void ThreadSetPriority(NThread* aThread, TInt aPriority, NFastMutex* aMutex); |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1005 |
static void ThreadSetNominalPriority(NThread* aThread, TInt aPriority); |
0 | 1006 |
IMPORT_C static void ThreadRequestSignal(NThread* aThread); |
1007 |
IMPORT_C static void ThreadRequestSignal(NThread* aThread, NFastMutex* aMutex); |
|
1008 |
IMPORT_C static void ThreadRequestSignal(NThread* aThread, TInt aCount); |
|
1009 |
IMPORT_C static void ThreadKill(NThread* aThread); |
|
1010 |
IMPORT_C static void ThreadKill(NThread* aThread, NFastMutex* aMutex); |
|
1011 |
IMPORT_C static void ThreadEnterCS(); |
|
1012 |
IMPORT_C static void ThreadLeaveCS(); |
|
1013 |
static NThread* _ThreadEnterCS(); /**< @internalComponent */ |
|
1014 |
static void _ThreadLeaveCS(); /**< @internalComponent */ |
|
1015 |
IMPORT_C static TInt Block(TUint32 aTimeout, TUint aMode, NFastMutex* aMutex); |
|
1016 |
IMPORT_C static TInt Block(TUint32 aTimeout, TUint aMode); |
|
1017 |
IMPORT_C static void NanoBlock(TUint32 aTimeout, TUint aState, TAny* aWaitObj); |
|
1018 |
IMPORT_C static void ThreadGetUserContext(NThread* aThread, TAny* aContext, TUint32& aAvailRegistersMask); |
|
1019 |
IMPORT_C static void ThreadSetUserContext(NThread* aThread, TAny* aContext); |
|
1020 |
IMPORT_C static void ThreadGetSystemContext(NThread* aThread, TAny* aContext, TUint32& aAvailRegistersMask); |
|
1021 |
static void ThreadModifyUsp(NThread* aThread, TLinAddr aUsp); |
|
1022 |
IMPORT_C static TInt FreezeCpu(); /**< @internalComponent */ |
|
1023 |
IMPORT_C static void EndFreezeCpu(TInt aCookie); /**< @internalComponent */ |
|
1024 |
IMPORT_C static TUint32 ThreadSetCpuAffinity(NThread* aThread, TUint32 aAffinity); /**< @internalComponent */ |
|
1025 |
IMPORT_C static void ThreadSetTimeslice(NThread* aThread, TInt aTimeslice); /**< @internalComponent */ |
|
1026 |
IMPORT_C static TUint64 ThreadCpuTime(NThread* aThread); /**< @internalComponent */ |
|
1027 |
IMPORT_C static TUint32 CpuTimeMeasFreq(); /**< @internalComponent */ |
|
1028 |
static TInt QueueUserModeCallback(NThreadBase* aThread, TUserModeCallback* aCallback); /**< @internalComponent */ |
|
1029 |
static void MoveUserModeCallbacks(NThreadBase* aSrcThread, NThreadBase* aDestThread); /**< @internalComponent */ |
|
1030 |
static void CancelUserModeCallbacks(); /**< @internalComponent */ |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1031 |
static void JumpTo(TInt aCpu); /**< @internalComponent */ |
0 | 1032 |
|
1033 |
// Thread Groups |
|
1034 |
IMPORT_C static TInt GroupCreate(NThreadGroup* aGroup, SNThreadGroupCreateInfo& aInfo); |
|
1035 |
IMPORT_C static void GroupDestroy(NThreadGroup* aGroup); |
|
1036 |
IMPORT_C static NThreadGroup* CurrentGroup(); |
|
1037 |
IMPORT_C static NThreadGroup* LeaveGroup(); |
|
1038 |
IMPORT_C static void JoinGroup(NThreadGroup* aGroup); |
|
1039 |
IMPORT_C static TUint32 GroupSetCpuAffinity(NThreadGroup* aGroup, TUint32 aAffinity); |
|
1040 |
||
1041 |
// Fast semaphores |
|
1042 |
IMPORT_C static void FSSetOwner(NFastSemaphore* aSem,NThreadBase* aThread); |
|
1043 |
IMPORT_C static void FSWait(NFastSemaphore* aSem); |
|
1044 |
IMPORT_C static void FSSignal(NFastSemaphore* aSem); |
|
1045 |
IMPORT_C static void FSSignal(NFastSemaphore* aSem, NFastMutex* aMutex); |
|
1046 |
IMPORT_C static void FSSignalN(NFastSemaphore* aSem, TInt aCount); |
|
1047 |
IMPORT_C static void FSSignalN(NFastSemaphore* aSem, TInt aCount, NFastMutex* aMutex); |
|
1048 |
||
1049 |
// Fast mutexes |
|
1050 |
IMPORT_C static void FMWait(NFastMutex* aMutex); |
|
1051 |
IMPORT_C static void FMSignal(NFastMutex* aMutex); |
|
1052 |
IMPORT_C static TBool FMFlash(NFastMutex* aMutex); |
|
1053 |
||
1054 |
// Scheduler |
|
1055 |
IMPORT_C static void Lock(); |
|
1056 |
IMPORT_C static NThread* LockC(); |
|
1057 |
IMPORT_C static void Unlock(); |
|
1058 |
IMPORT_C static TInt PreemptionPoint(); |
|
1059 |
||
1060 |
// Interrupts |
|
1061 |
IMPORT_C static TInt DisableAllInterrupts(); |
|
1062 |
IMPORT_C static TInt DisableInterrupts(TInt aLevel); |
|
1063 |
IMPORT_C static void RestoreInterrupts(TInt aRestoreData); |
|
1064 |
IMPORT_C static void EnableAllInterrupts(); |
|
1065 |
||
1066 |
// Read-modify-write |
|
1067 |
inline static TInt LockedInc(TInt& aCount) |
|
1068 |
{ return __e32_atomic_add_ord32(&aCount,1); } |
|
1069 |
inline static TInt LockedDec(TInt& aCount) |
|
1070 |
{ return __e32_atomic_add_ord32(&aCount,0xffffffff); } |
|
1071 |
inline static TInt LockedAdd(TInt& aDest, TInt aSrc) |
|
1072 |
{ return __e32_atomic_add_ord32(&aDest,aSrc); } |
|
1073 |
inline static TInt64 LockedInc(TInt64& aCount) |
|
1074 |
{ return __e32_atomic_add_ord64(&aCount,1); } |
|
1075 |
inline static TInt64 LockedDec(TInt64& aCount) |
|
1076 |
{ return __e32_atomic_add_ord64(&aCount,TUint64(TInt64(-1))); } |
|
1077 |
inline static TInt64 LockedAdd(TInt64& aDest, TInt64 aSrc) /**< @internalComponent */ |
|
1078 |
{ return __e32_atomic_add_ord64(&aDest,aSrc); } |
|
1079 |
inline static TUint32 LockedSetClear(TUint32& aDest, TUint32 aClearMask, TUint32 aSetMask) |
|
1080 |
{ return __e32_atomic_axo_ord32(&aDest,~(aClearMask|aSetMask),aSetMask); } |
|
1081 |
inline static TUint16 LockedSetClear16(TUint16& aDest, TUint16 aClearMask, TUint16 aSetMask) /**< @internalComponent */ |
|
1082 |
{ return __e32_atomic_axo_ord16(&aDest,TUint16(~(aClearMask|aSetMask)),aSetMask); } |
|
1083 |
inline static TUint8 LockedSetClear8(TUint8& aDest, TUint8 aClearMask, TUint8 aSetMask) |
|
1084 |
{ return __e32_atomic_axo_ord8(&aDest,TUint8(~(aClearMask|aSetMask)),aSetMask); } |
|
1085 |
inline static TInt SafeInc(TInt& aCount) |
|
1086 |
{ return __e32_atomic_tas_ord32(&aCount,1,1,0); } |
|
1087 |
inline static TInt SafeDec(TInt& aCount) |
|
1088 |
{ return __e32_atomic_tas_ord32(&aCount,1,-1,0); } |
|
1089 |
inline static TInt AddIfGe(TInt& aCount, TInt aLimit, TInt aInc) /**< @internalComponent */ |
|
1090 |
{ return __e32_atomic_tas_ord32(&aCount,aLimit,aInc,0); } |
|
1091 |
inline static TInt AddIfLt(TInt& aCount, TInt aLimit, TInt aInc) /**< @internalComponent */ |
|
1092 |
{ return __e32_atomic_tas_ord32(&aCount,aLimit,0,aInc); } |
|
1093 |
inline static TAny* SafeSwap(TAny* aNewValue, TAny*& aPtr) |
|
1094 |
{ return __e32_atomic_swp_ord_ptr(&aPtr, aNewValue); } |
|
1095 |
inline static TUint8 SafeSwap8(TUint8 aNewValue, TUint8& aPtr) |
|
1096 |
{ return __e32_atomic_swp_ord8(&aPtr, aNewValue); } |
|
1097 |
inline static TUint16 SafeSwap16(TUint16 aNewValue, TUint16& aPtr) /**< @internalComponent */ |
|
1098 |
{ return __e32_atomic_swp_ord16(&aPtr, aNewValue); } |
|
1099 |
inline static TBool CompareAndSwap(TAny*& aPtr, TAny* aExpected, TAny* aNew) /**< @internalComponent */ |
|
1100 |
{ return __e32_atomic_cas_ord_ptr(&aPtr, &aExpected, aNew); } |
|
1101 |
inline static TBool CompareAndSwap8(TUint8& aPtr, TUint8 aExpected, TUint8 aNew) /**< @internalComponent */ |
|
1102 |
{ return __e32_atomic_cas_ord8(&aPtr, (TUint8*)&aExpected, (TUint8)aNew); } |
|
1103 |
inline static TBool CompareAndSwap16(TUint16& aPtr, TUint16 aExpected, TUint16 aNew) /**< @internalComponent */ |
|
1104 |
{ return __e32_atomic_cas_ord16(&aPtr, (TUint16*)&aExpected, (TUint16)aNew); } |
|
1105 |
inline static TUint32 SafeSwap(TUint32 aNewValue, TUint32& aPtr) /**< @internalComponent */ |
|
1106 |
{ return __e32_atomic_swp_ord32(&aPtr, aNewValue); } |
|
1107 |
inline static TUint SafeSwap(TUint aNewValue, TUint& aPtr) /**< @internalComponent */ |
|
1108 |
{ return __e32_atomic_swp_ord32(&aPtr, aNewValue); } |
|
1109 |
inline static TInt SafeSwap(TInt aNewValue, TInt& aPtr) /**< @internalComponent */ |
|
1110 |
{ return __e32_atomic_swp_ord32(&aPtr, aNewValue); } |
|
1111 |
inline static TBool CompareAndSwap(TUint32& aPtr, TUint32 aExpected, TUint32 aNew) /**< @internalComponent */ |
|
1112 |
{ return __e32_atomic_cas_ord32(&aPtr, &aExpected, aNew); } |
|
1113 |
inline static TBool CompareAndSwap(TUint& aPtr, TUint aExpected, TUint aNew) /**< @internalComponent */ |
|
1114 |
{ return __e32_atomic_cas_ord32(&aPtr, (TUint32*)&aExpected, (TUint32)aNew); } |
|
1115 |
inline static TBool CompareAndSwap(TInt& aPtr, TInt aExpected, TInt aNew) /**< @internalComponent */ |
|
1116 |
{ return __e32_atomic_cas_ord32(&aPtr, (TUint32*)&aExpected, (TUint32)aNew); } |
|
1117 |
||
1118 |
||
1119 |
// Miscellaneous |
|
1120 |
IMPORT_C static NThread* CurrentThread(); |
|
1121 |
IMPORT_C static TInt CurrentCpu(); /**< @internalComponent */ |
|
1122 |
IMPORT_C static TInt NumberOfCpus(); /**< @internalComponent */ |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1123 |
IMPORT_C static void SetNumberOfActiveCpus(TInt aNumber); |
0 | 1124 |
IMPORT_C static void LockSystem(); |
1125 |
IMPORT_C static void UnlockSystem(); |
|
1126 |
IMPORT_C static TBool FlashSystem(); |
|
1127 |
IMPORT_C static void WaitForAnyRequest(); |
|
1128 |
IMPORT_C static void Sleep(TUint32 aTime); |
|
1129 |
IMPORT_C static void Exit(); |
|
1130 |
IMPORT_C static void DeferredExit(); |
|
1131 |
IMPORT_C static void YieldTimeslice(); /**< @internalComponent */ |
|
1132 |
IMPORT_C static void RotateReadyList(TInt aPriority); |
|
1133 |
IMPORT_C static void RotateReadyList(TInt aPriority, TInt aCpu); /**< @internalTechnology */ |
|
1134 |
IMPORT_C static void RecordIntLatency(TInt aLatency, TInt aIntMask); /**< @internalTechnology */ |
|
1135 |
IMPORT_C static void RecordThreadLatency(TInt aLatency); /**< @internalTechnology */ |
|
1136 |
IMPORT_C static TUint32 TickCount(); |
|
1137 |
IMPORT_C static TInt TickPeriod(); |
|
1138 |
IMPORT_C static TInt TimerTicks(TInt aMilliseconds); |
|
1139 |
IMPORT_C static TInt TimesliceTicks(TUint32 aMicroseconds); /**< @internalTechnology */ |
|
1140 |
IMPORT_C static TInt CurrentContext(); |
|
1141 |
IMPORT_C static TUint32 FastCounter(); |
|
1142 |
IMPORT_C static TInt FastCounterFrequency(); |
|
1143 |
IMPORT_C static TUint64 Timestamp(); |
|
1144 |
IMPORT_C static TUint32 TimestampFrequency(); |
|
1145 |
static void Init0(TAny* aVariantData); |
|
1146 |
static void Init(NThread* aThread, SNThreadCreateInfo& aInfo); |
|
1147 |
static TInt BootAP(volatile SAPBootInfo* aInfo); |
|
1148 |
IMPORT_C static TBool KernelLocked(TInt aCount=0); /**< @internalTechnology */ |
|
1149 |
IMPORT_C static NFastMutex* HeldFastMutex(); /**< @internalTechnology */ |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1150 |
static void Idle(); |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1151 |
static void DoIdle(); |
0 | 1152 |
IMPORT_C static SCpuIdleHandler* CpuIdleHandler(); /**< @internalTechnology */ |
1153 |
static void NotifyCrash(const TAny* a0, TInt a1); /**< @internalTechnology */ |
|
1154 |
IMPORT_C static TBool Crashed(); |
|
1155 |
static TUint32 IdleGenerationCount(); |
|
1156 |
||
1157 |
// Debugger support |
|
1158 |
typedef void (*TRescheduleCallback)(NThread*); |
|
1159 |
IMPORT_C static void SchedulerHooks(TLinAddr& aStart, TLinAddr& aEnd); |
|
1160 |
IMPORT_C static void InsertSchedulerHooks(); |
|
1161 |
IMPORT_C static void RemoveSchedulerHooks(); |
|
1162 |
IMPORT_C static void SetRescheduleCallback(TRescheduleCallback aCallback); |
|
1163 |
||
1164 |
// Interrupts |
|
1165 |
enum TIrqInitFlags |
|
1166 |
{ |
|
1167 |
EIrqInit_FallingEdge=0, |
|
1168 |
EIrqInit_RisingEdge=2, |
|
1169 |
EIrqInit_LevelLow=1, |
|
1170 |
EIrqInit_LevelHigh=3, |
|
1171 |
EIrqInit_Shared=0x10, |
|
1172 |
EIrqInit_Count=0x20, |
|
1173 |
}; |
|
1174 |
||
1175 |
enum TIrqBindFlags |
|
1176 |
{ |
|
1177 |
EIrqBind_Raw=1, |
|
1178 |
EIrqBind_Count=2, |
|
1179 |
EIrqBind_Exclusive=4, |
|
1180 |
EIrqBind_Tied=8 |
|
1181 |
}; |
|
1182 |
||
1183 |
enum TIrqIdBits |
|
1184 |
{ |
|
1185 |
EIrqIndexMask = 0x0000ffff, // bottom 16 bits is IRQ number if top 16 bits all zero |
|
1186 |
// otherwise is IRQ handler index |
|
1187 |
EIrqCookieMask = 0x7fff0000, |
|
1188 |
EIrqCookieShift = 16 |
|
1189 |
}; |
|
1190 |
||
1191 |
static void InterruptInit0(); |
|
1192 |
IMPORT_C static TInt InterruptInit(TInt aId, TUint32 aFlags, TInt aVector, TUint32 aHwId, TAny* aExt=0); |
|
1193 |
IMPORT_C static TInt InterruptBind(TInt aId, NIsr aIsr, TAny* aPtr, TUint32 aFlags, NSchedulable* aTied); |
|
1194 |
IMPORT_C static TInt InterruptUnbind(TInt aId); |
|
1195 |
IMPORT_C static TInt InterruptEnable(TInt aId); |
|
1196 |
IMPORT_C static TInt InterruptDisable(TInt aId); |
|
1197 |
IMPORT_C static TInt InterruptClear(TInt aId); |
|
1198 |
IMPORT_C static TInt InterruptSetPriority(TInt aId, TInt aPri); |
|
1199 |
IMPORT_C static TInt InterruptSetCpuMask(TInt aId, TUint32 aMask); |
|
1200 |
IMPORT_C static void Interrupt(TInt aIrqNo); |
|
1201 |
}; |
|
1202 |
||
1203 |
||
1204 |
/** Create a fast semaphore |
|
1205 |
||
1206 |
@publishedPartner |
|
1207 |
@prototype |
|
1208 |
*/ |
|
1209 |
inline NFastSemaphore::NFastSemaphore(NThreadBase* aThread) |
|
1210 |
: iCount(0), |
|
1211 |
iOwningThread(aThread ? aThread : (NThreadBase*)NKern::CurrentThread()) |
|
1212 |
{ |
|
1213 |
} |
|
1214 |
||
1215 |
||
1216 |
class TGenericIPI; |
|
1217 |
||
1218 |
/** |
|
1219 |
@internalComponent |
|
1220 |
*/ |
|
1221 |
typedef void (*TGenericIPIFn)(TGenericIPI*); |
|
1222 |
||
1223 |
/** |
|
1224 |
@internalComponent |
|
1225 |
*/ |
|
1226 |
class TGenericIPI : public SDblQueLink |
|
1227 |
{ |
|
1228 |
public: |
|
1229 |
void Queue(TGenericIPIFn aFunc, TUint32 aCpuMask); |
|
1230 |
void QueueAll(TGenericIPIFn aFunc); |
|
1231 |
void QueueAllOther(TGenericIPIFn aFunc); |
|
1232 |
void WaitEntry(); |
|
1233 |
void WaitCompletion(); |
|
1234 |
public: |
|
1235 |
TGenericIPIFn iFunc; |
|
1236 |
volatile TUint32 iCpusIn; |
|
1237 |
volatile TUint32 iCpusOut; |
|
1238 |
}; |
|
1239 |
||
1240 |
/** |
|
1241 |
@internalComponent |
|
1242 |
*/ |
|
1243 |
class TStopIPI : public TGenericIPI |
|
1244 |
{ |
|
1245 |
public: |
|
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1246 |
TUint32 StopCPUs(); |
0 | 1247 |
void ReleaseCPUs(); |
1248 |
static void Isr(TGenericIPI*); |
|
1249 |
public: |
|
1250 |
volatile TInt iFlag; |
|
1251 |
}; |
|
1252 |
||
43
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1253 |
|
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1254 |
/** |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1255 |
@internalComponent |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1256 |
*/ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1257 |
class TCoreCycler |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1258 |
{ |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1259 |
public: |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1260 |
TCoreCycler(); |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1261 |
TInt Next(); |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1262 |
private: |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1263 |
void Init(); |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1264 |
private: |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1265 |
TUint32 iCores; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1266 |
TUint32 iRemain; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1267 |
TInt iInitialCpu; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1268 |
TInt iCurrentCpu; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1269 |
NThreadGroup* iG; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1270 |
TInt iFrz; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1271 |
}; |
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1272 |
|
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1273 |
|
c1f20ce4abcf
Revision: 201035
Dremov Kirill (Nokia-D-MSW/Tampere) <kirill.dremov@nokia.com>
parents:
0
diff
changeset
|
1274 |
|
0 | 1275 |
#include <ncern.h> |
1276 |
#endif |