1 ; Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 ; All rights reserved. |
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3 ; This component and the accompanying materials are made available |
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4 ; under the terms of the License "Eclipse Public License v1.0" |
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5 ; which accompanies this distribution, and is available |
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6 ; at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 ; |
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8 ; Initial Contributors: |
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9 ; Nokia Corporation - initial contribution. |
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10 ; |
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11 ; Contributors: |
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12 ; |
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13 ; Description: |
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14 ; |
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15 |
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16 AREA |d-rmdebug-bkpt$$Code|, CODE, READONLY, ALIGN=6 |
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17 |
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18 CODE32 |
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19 |
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20 ; ARM tests |
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21 |
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22 ; |
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23 ; Non-PC modifying |
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24 ; |
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25 EXPORT RMDebug_StepTest_Non_PC_Modifying |
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26 EXPORT RMDebug_StepTest_Non_PC_Modifying_OK |
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27 |
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28 RMDebug_StepTest_Non_PC_Modifying |
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29 mov r0,r0 ; nop |
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30 RMDebug_StepTest_Non_PC_Modifying_OK |
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31 bx lr ; should return to normal execution of the test thread |
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32 |
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33 ; |
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34 ; Branch |
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35 ; |
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36 EXPORT RMDebug_StepTest_Branch |
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37 EXPORT RMDebug_StepTest_Branch_1 |
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38 |
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39 RMDebug_StepTest_Branch |
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40 b RMDebug_StepTest_Branch_1 |
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41 mov r0, #2 ; if the pc ends up here, we know its gone wrong |
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42 RMDebug_StepTest_Branch_1 |
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43 bx lr ; return |
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44 |
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45 ; |
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46 ; Branch and Link |
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47 ; |
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48 EXPORT RMDebug_StepTest_Branch_And_Link |
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49 EXPORT RMDebug_StepTest_Branch_And_Link_1 |
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50 EXPORT RMDebug_StepTest_Branch_And_Link_2 |
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51 |
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52 RMDebug_StepTest_Branch_And_Link |
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53 mov r0, lr ; preserve lr for the moment |
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54 RMDebug_StepTest_Branch_And_Link_1 |
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55 bl RMDebug_StepTest_Branch_And_Link_2 |
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56 mov r1, #1 ; insert a gap in the instruction stream so we know we branched. |
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57 RMDebug_StepTest_Branch_And_Link_2 |
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58 mov lr, r0 ; restore lr |
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59 bx lr ; should return to normal execution of the test thread |
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60 |
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61 ; |
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62 ; MOV PC |
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63 ; |
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64 EXPORT RMDebug_StepTest_MOV_PC |
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65 EXPORT RMDebug_StepTest_MOV_PC_1 |
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66 EXPORT RMDebug_StepTest_MOV_PC_2 |
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67 |
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68 RMDebug_StepTest_MOV_PC |
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69 mov r0, #4 |
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70 RMDebug_StepTest_MOV_PC_1 |
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71 add pc, pc, r0 ; should be a jump (bear in mind reading pc = current inst + 8bytes for arm) |
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72 mov r0, #1 ; Simple instructions which allow us to test where the PC really is |
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73 mov r0, #2 ; just by reading r0. |
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74 RMDebug_StepTest_MOV_PC_2 |
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75 mov r0, #3 ; |
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76 mov r0, #4 ; |
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77 bx lr ; should return to normal execution of the test thread |
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78 |
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79 ; |
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80 ; LDR PC |
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81 ; |
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82 EXPORT RMDebug_StepTest_LDR_PC |
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83 EXPORT RMDebug_StepTest_LDR_PC_1 |
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84 |
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85 RMDebug_StepTest_LDR_PC |
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86 ldr pc, =RMDebug_StepTest_LDR_PC_1 |
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87 mov r0, #1 ; separate the branch target so we can prove it works |
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88 RMDebug_StepTest_LDR_PC_1 |
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89 bx lr ; should return to normal execution of the test thread |
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90 |
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91 ; |
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92 ; ARM -> Thumb -> ARM interworking test |
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93 ; |
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94 ; Note: We always start and finish this test |
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95 ; in ARM mode. |
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96 EXPORT RMDebug_StepTest_Interwork |
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97 EXPORT RMDebug_StepTest_Interwork_1 |
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98 EXPORT RMDebug_StepTest_Interwork_2 |
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99 EXPORT RMDebug_StepTest_Interwork_3 |
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100 RMDebug_StepTest_Interwork |
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101 mov r0, lr ; preserve lr |
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102 RMDebug_StepTest_Interwork_1 |
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103 blx RMDebug_StepTest_Interwork_2 |
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104 |
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105 CODE16 |
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106 RMDebug_StepTest_Interwork_2 |
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107 blx RMDebug_StepTest_Interwork_3 |
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108 |
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109 CODE32 |
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110 |
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111 RMDebug_StepTest_Interwork_3 |
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112 bx r0 |
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113 |
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114 ; |
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115 ; Stepping performance tests |
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116 ; |
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117 ; This counts down from 100000 to 0 |
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118 ; This means that for all practical purposes |
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119 ; we can single-step as much as we like |
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120 ; in less than one second and have some likelyhood |
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121 ; that we will not step too far from our loop |
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122 |
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123 EXPORT RMDebug_StepTest_Count |
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124 EXPORT RMDebug_StepTest_Count_1 |
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125 EXPORT RMDebug_StepTest_Count_2 |
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126 |
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127 RMDebug_StepTest_Count |
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128 ldr r2, =100000 |
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129 RMDebug_StepTest_Count_1 |
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130 subs r2, r2, #1 |
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131 RMDebug_StepTest_Count_2 |
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132 bne RMDebug_StepTest_Count_1 |
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133 bx lr |
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134 |
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135 ; Thumb tests |
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136 |
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137 ; Thumb non-pc modifying |
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138 ; |
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139 ; |
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140 RMDebug_StepTest_Thumb_Non_PC_Modifying |
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141 mov r0, lr ; preserve lr |
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142 blx RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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143 bx r0 |
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144 |
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145 ; |
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146 ; Thumb Branch |
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147 ; |
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148 RMDebug_StepTest_Thumb_Branch |
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149 mov r0, lr ; preserve lr |
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150 blx RMDebug_StepTest_Thumb_Branch_1 |
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151 bx r0 |
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152 |
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153 ; |
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154 ; Thumb Branch and link |
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155 ; |
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156 RMDebug_StepTest_Thumb_Branch_And_Link |
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157 mov r0, lr ; preserve lr |
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158 blx RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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159 bx r0 |
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160 |
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161 ; |
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162 ; Thumb Back Branch and link |
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163 ; |
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164 RMDebug_StepTest_Thumb_Back_Branch_And_Link |
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165 mov r0, lr ; preserve lr |
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166 blx RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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167 bx r0 |
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168 |
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169 ; |
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170 ; Thumb ADD PC,PC, #0 |
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171 ; |
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172 RMDebug_StepTest_Thumb_AddPC |
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173 mov r0, lr ; preserve lr |
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174 blx RMDebug_StepTest_Thumb_AddPC_1 |
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175 bx r0 |
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176 |
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177 CODE16 |
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178 |
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179 ; Thumb tests |
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180 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying |
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181 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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182 EXPORT RMDebug_StepTest_Thumb_Non_PC_Modifying_2 |
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183 |
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184 EXPORT RMDebug_StepTest_Thumb_Branch |
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185 EXPORT RMDebug_StepTest_Thumb_Branch_1 |
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186 EXPORT RMDebug_StepTest_Thumb_Branch_2 |
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187 |
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188 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link |
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189 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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190 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_2 |
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191 EXPORT RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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192 |
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193 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link |
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194 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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195 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_2 |
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196 EXPORT RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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197 |
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198 RMDebug_StepTest_Thumb_Non_PC_Modifying_1 |
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199 mov r0, r0 ; nop |
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200 RMDebug_StepTest_Thumb_Non_PC_Modifying_2 |
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201 bx lr |
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202 |
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203 RMDebug_StepTest_Thumb_Branch_1 |
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204 b RMDebug_StepTest_Thumb_Branch_2 |
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205 mov r0, r0 |
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206 RMDebug_StepTest_Thumb_Branch_2 |
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207 bx lr |
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208 |
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209 RMDebug_StepTest_Thumb_Branch_And_Link_1 |
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210 mov r1, lr |
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211 RMDebug_StepTest_Thumb_Branch_And_Link_2 |
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212 bl RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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213 mov r0, r0 |
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214 RMDebug_StepTest_Thumb_Branch_And_Link_3 |
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215 bx r1 |
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216 |
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217 RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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218 bx r1 |
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219 |
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220 RMDebug_StepTest_Thumb_Back_Branch_And_Link_1 |
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221 mov r1, lr |
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222 RMDebug_StepTest_Thumb_Back_Branch_And_Link_2 |
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223 bl RMDebug_StepTest_Thumb_Back_Branch_And_Link_3 |
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224 bx r1 |
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225 |
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226 ; |
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227 ; ADD PC |
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228 ; |
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229 EXPORT RMDebug_StepTest_Thumb_AddPC |
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230 EXPORT RMDebug_StepTest_Thumb_AddPC_1 |
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231 EXPORT RMDebug_StepTest_Thumb_AddPC_2 |
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232 EXPORT RMDebug_StepTest_Thumb_AddPC_3 |
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233 |
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234 RMDebug_StepTest_Thumb_AddPC_1 |
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235 mov r1, lr |
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236 mov r2, #4 |
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237 RMDebug_StepTest_Thumb_AddPC_2 |
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238 add pc, pc, r2 ; should arrive at RMDebug_StepTest_Thumb_AddPC_3 |
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239 mov r0, r0 |
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240 mov r0, r0 |
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241 mov r0, r0 |
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242 RMDebug_StepTest_Thumb_AddPC_3 |
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243 bx r1 |
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244 |
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245 ALIGN 4 |
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246 |
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247 CODE32 |
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248 |
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249 ; |
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250 ; ARM multiple-step ( 5 steps ) |
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251 ; |
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252 EXPORT RMDebug_StepTest_ARM_Step_Multiple |
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253 EXPORT RMDebug_StepTest_ARM_Step_Multiple_1 |
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254 |
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255 RMDebug_StepTest_ARM_Step_Multiple |
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256 mov r0,r0 ; nop |
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257 mov r0,r0 ; nop |
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258 mov r0,r0 ; nop |
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259 mov r0,r0 ; nop |
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260 mov r0,r0 ; nop |
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261 RMDebug_StepTest_ARM_Step_Multiple_1 |
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262 bx lr |
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263 |
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264 END |
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265 |
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266 ; End of file - d_rmdebug_bkpt.s |
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