equal
deleted
inserted
replaced
52 // Third phase MMU initialisation |
52 // Third phase MMU initialisation |
53 Mmu& m=Mmu::Get(); |
53 Mmu& m=Mmu::Get(); |
54 m.Init3(); |
54 m.Init3(); |
55 } |
55 } |
56 |
56 |
|
57 void M::Init4() |
|
58 { |
|
59 // Fourth phase MMU initialisation - Not required on this memory model. |
|
60 } |
|
61 |
57 TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
62 TInt M::InitSvHeapChunk(DChunk* aChunk, TInt aSize) |
58 { |
63 { |
59 TInt r; |
64 TInt r; |
60 DMemModelChunk* pC=(DMemModelChunk*)aChunk; |
65 DMemModelChunk* pC=(DMemModelChunk*)aChunk; |
61 TLinAddr base = TheRomHeader().iKernDataAddress; |
66 TLinAddr base = TheRomHeader().iKernDataAddress; |