874 #endif |
874 #endif |
875 asm("orr r2, r2, #0x00500000 "); // enable privileged access to CP10, CP11 |
875 asm("orr r2, r2, #0x00500000 "); // enable privileged access to CP10, CP11 |
876 SET_CAR(,r2); |
876 SET_CAR(,r2); |
877 VFP_FMRX(,2,VFP_XREG_FPEXC); // r2=FPEXC |
877 VFP_FMRX(,2,VFP_XREG_FPEXC); // r2=FPEXC |
878 asm("orr r3, r2, #%a0" : : "i" ((TInt)VFP_FPEXC_EN)); |
878 asm("orr r3, r2, #%a0" : : "i" ((TInt)VFP_FPEXC_EN)); |
|
879 asm("bic r3, r3, #%a0" : : "i" ((TInt)VFP_FPEXC_EX)); |
879 VFP_FMXR(,VFP_XREG_FPEXC,3); // enable VFP |
880 VFP_FMXR(,VFP_XREG_FPEXC,3); // enable VFP |
880 __DATA_SYNC_BARRIER__(r4); |
881 __DATA_SYNC_BARRIER__(r4); |
881 __INST_SYNC_BARRIER__(r4); |
882 __INST_SYNC_BARRIER__(r4); |
882 VFP_FMRX(,3,VFP_XREG_FPSCR); // r3=FPSCR |
883 VFP_FMRX(,3,VFP_XREG_FPSCR); // r3=FPSCR |
883 asm("stmia r0!, {r2,r3} "); // |
884 asm("stmia r0!, {r2,r3} "); // |