equal
deleted
inserted
replaced
249 } |
249 } |
250 } |
250 } |
251 |
251 |
252 TInt TestBounceCtxThread1(TAny*) |
252 TInt TestBounceCtxThread1(TAny*) |
253 { |
253 { |
|
254 UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)Max(CPUs-1, 0), 0); |
254 for(TInt iter=0; iter<KMaxTInt; ++iter) |
255 for(TInt iter=0; iter<KMaxTInt; ++iter) |
255 { |
256 { |
256 Vfp::SReg(0); |
257 Vfp::SReg(0); |
257 } |
258 } |
258 return KErrNone; |
259 return KErrNone; |
259 } |
260 } |
260 |
261 |
261 TInt TestBounceCtxThread2(TAny*) |
262 TInt TestBounceCtxThread2(TAny*) |
262 { |
263 { |
|
264 UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)Max(CPUs-1, 0), 0); |
263 TInt start_rep = 0x00800000; // smallest single precision normal number, 1*2^-126 |
265 TInt start_rep = 0x00800000; // smallest single precision normal number, 1*2^-126 |
264 TReal32 start = *(TReal32*)&start_rep; |
266 TReal32 start = *(TReal32*)&start_rep; |
265 for(TInt iter=0; iter<KMaxTInt; ++iter) |
267 for(TInt iter=0; iter<KMaxTInt; ++iter) |
266 { |
268 { |
267 Vfp::SetSReg(start, 1); |
269 Vfp::SetSReg(start, 1); |
281 return KErrNone; |
283 return KErrNone; |
282 } |
284 } |
283 |
285 |
284 void DoBounceContextSwitchTests() |
286 void DoBounceContextSwitchTests() |
285 { |
287 { |
|
288 UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, 0, 0); |
286 RThread t1, t2; |
289 RThread t1, t2; |
287 TInt r; |
290 TInt r; |
288 r = t1.Create(KNullDesC, &TestBounceCtxThread1, 0x1000, 0x1000, 0x1000, NULL); |
291 r = t1.Create(KNullDesC, &TestBounceCtxThread1, 0x1000, 0x1000, 0x1000, NULL); |
289 test(r==KErrNone); |
292 test(r==KErrNone); |
290 t1.SetPriority(EPriorityLess); |
293 t1.SetPriority(EPriorityLess); |
1096 |
1099 |
1097 test(s == 1); |
1100 test(s == 1); |
1098 test(testStep == 7); |
1101 test(testStep == 7); |
1099 } |
1102 } |
1100 |
1103 |
|
1104 TInt TestThreadMigration(TAny* aPtr) |
|
1105 { |
|
1106 const TInt inc = (TInt)aPtr; |
|
1107 for (TInt32 switches = 0; switches < KMaxTInt; switches += inc) |
|
1108 { |
|
1109 Vfp::SetSReg(switches, switches % 16); |
|
1110 UserSvr::HalFunction(EHalGroupKernel, EKernelHalLockThreadToCpu, (TAny*)(switches % CPUs), 0); |
|
1111 test(Vfp::SRegInt(switches % 16) == switches); |
|
1112 } |
|
1113 return KErrNone; |
|
1114 } |
|
1115 |
1101 TInt E32Main() |
1116 TInt E32Main() |
1102 { |
1117 { |
1103 test.Title(); |
1118 test.Title(); |
1104 |
1119 |
1105 test.Start(_L("Ask HAL if we have hardware floating point")); |
1120 test.Start(_L("Ask HAL if we have hardware floating point")); |
1229 TestThumb(); |
1244 TestThumb(); |
1230 #endif |
1245 #endif |
1231 } |
1246 } |
1232 } |
1247 } |
1233 |
1248 |
|
1249 if (CPUs > 1) |
|
1250 { |
|
1251 test.Next(_L("Test SMP Thread Migration")); |
|
1252 TInt inc = 1; |
|
1253 RThread t[8]; |
|
1254 TRequestStatus s[8]; |
|
1255 TInt count; |
|
1256 for (count = 0; count < CPUs + 1; count++) |
|
1257 { |
|
1258 TInt r = t[count].Create(KNullDesC, &TestThreadMigration, 0x1000, NULL, (TAny*)(inc++)); |
|
1259 test(r==KErrNone); |
|
1260 t[count].Logon(s[count]); |
|
1261 } |
|
1262 for (count = 0; count < CPUs + 1; count++) |
|
1263 { |
|
1264 t[count].Resume(); |
|
1265 } |
|
1266 User::After(10*1000*1000); |
|
1267 for (count = 0; count < CPUs + 1; count++) |
|
1268 { |
|
1269 t[count].Kill(0); |
|
1270 } |
|
1271 for (count = 0; count < CPUs + 1; count++) |
|
1272 { |
|
1273 User::WaitForAnyRequest(); |
|
1274 } |
|
1275 for (count = 0; count < CPUs + 1; count++) |
|
1276 { |
|
1277 TInt xt = t[count].ExitType(); |
|
1278 TInt xr = t[count].ExitReason(); |
|
1279 test(xt == EExitKill && xr == KErrNone); |
|
1280 } |
|
1281 for (count = 0; count < CPUs + 1; count++) |
|
1282 { |
|
1283 CLOSE_AND_WAIT(t[count]); |
|
1284 } |
|
1285 } |
|
1286 |
1234 test.End(); |
1287 test.End(); |
1235 return 0; |
1288 return 0; |
1236 } |
1289 } |