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1 // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\include\memmodel\epoc\multiple\memmodel.h |
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15 // |
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16 // WARNING: This file contains some APIs which are internal and are subject |
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17 // to change without notice. Such APIs should therefore not be used |
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18 // outside the Kernel and Hardware Services package. |
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19 // |
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20 |
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21 #ifndef __MEMMODEL_H__ |
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22 #define __MEMMODEL_H__ |
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23 #include <memmodel/epoc/mmubase/mmubase.h> |
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24 |
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25 #ifdef __SMP__ |
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26 // SubScheduler fields for each processor |
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27 #define i_AliasLinAddr iExtras[0] |
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28 #define i_AliasPdePtr iExtras[1] |
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29 #endif |
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30 |
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31 /******************************************** |
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32 * Dynamic Branch Predictor Support |
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33 ********************************************/ |
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34 |
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35 /** |
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36 @internalComponent |
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37 */ |
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38 #ifdef __SMP__ |
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39 //#define LastUserSelfMod ((DProcess*&)SubScheduler().iExtras[0]) |
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40 #else |
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41 #define LastUserSelfMod ((DProcess*&)TheScheduler.iExtras[0]) |
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42 #endif |
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43 |
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44 /******************************************** |
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45 * RAM Defrag Page Table Moving Support |
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46 ********************************************/ |
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47 |
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48 /** |
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49 @internalComponent |
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50 */ |
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51 #define AliasRemapOld ((TPhysAddr&)TheScheduler.iExtras[1]) |
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52 |
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53 /** |
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54 @internalComponent |
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55 */ |
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56 #define AliasRemapNew ((TPhysAddr&)TheScheduler.iExtras[2]) |
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57 |
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58 /******************************************** |
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59 * Thread Control Block |
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60 ********************************************/ |
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61 |
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62 class DMemModelProcess; |
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63 |
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64 /** |
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65 @internalComponent |
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66 */ |
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67 class DMemModelThread : public DThread |
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68 { |
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69 public: |
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70 TInt Alias(TLinAddr aAddr, DMemModelProcess* aProcess, TInt aSize, TInt aPerm, TLinAddr& aAliasAddr, TInt& aAliasSize); |
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71 void RemoveAlias(); |
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72 virtual void DoExit1(); |
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73 static void RestoreAddressSpace(); |
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74 public: |
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75 TLinAddr iAliasLinAddr; // linear address to access aliased memory (0 means no alias is present). |
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76 TPde* iAliasPdePtr; // Address of PDE which has been modified to make aliased memory accessible. |
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77 TPde iAliasPde; // PDE to store at iAliasPdePtr. |
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78 TInt iAliasOsAsid; // asid for the process whoes memory is aliased. |
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79 SDblQueLink iAliasLink; // link to make TheMmu.iAliasList. |
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80 TLinAddr iAliasTarget; // linear address of the memory which has been aliased |
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81 #ifdef __SMP__ |
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82 TInt iCpuRestoreCookie; |
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83 #endif |
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84 }; |
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85 |
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86 |
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87 /******************************************** |
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88 * Process Control Block |
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89 ********************************************/ |
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90 |
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91 class DMemModelChunk; |
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92 class DMemModelCodeSegMemory; |
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93 |
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94 /** |
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95 @internalComponent |
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96 */ |
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97 class DMemModelProcess : public DEpocProcess |
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98 { |
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99 public: |
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100 void Destruct(); |
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101 public: |
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102 virtual TInt DoCreate(TBool aKernelProcess, TProcessCreateInfo& aInfo); |
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103 virtual TInt NewChunk(DChunk*& aChunk, SChunkCreateInfo& aInfo, TLinAddr& aRunAddr); |
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104 virtual TInt AddChunk(DChunk* aChunk,TBool isReadOnly); |
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105 virtual TInt NewShPool(DShPool*& aPool, TShPoolCreateInfo& aInfo); |
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106 virtual TInt CreateDataBssStackArea(TProcessCreateInfo& aInfo); |
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107 virtual TInt MapCodeSeg(DCodeSeg* aCodeSeg); |
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108 virtual void UnmapCodeSeg(DCodeSeg* aCodeSeg); |
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109 virtual void RemoveDllData(); |
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110 virtual void FinalRelease(); |
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111 public: |
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112 virtual TInt GetNewChunk(DMemModelChunk*& aChunk, SChunkCreateInfo& aInfo)=0; |
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113 public: |
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114 TInt AddChunk(DMemModelChunk* aChunk, TLinAddr& aDataSectionBase, TBool isReadOnly); |
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115 TInt AllocateDataSectionBase(DMemModelChunk& aChunk, TUint& aBase); |
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116 TUint8* DataSectionBase(DMemModelChunk* aChunk); |
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117 void RemoveChunk(DMemModelChunk *aChunk); |
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118 void DoRemoveChunk(TInt aIndex); |
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119 TInt ChunkIndex(DMemModelChunk* aChunk,TInt& aPos); |
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120 TInt CreateCodeChunk(); |
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121 void FreeCodeChunk(); |
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122 TInt CreateDllDataChunk(); |
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123 void FreeDllDataChunk(); |
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124 TInt CommitDllData(TLinAddr aBase, TInt aSize); |
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125 void DecommitDllData(TLinAddr aBase, TInt aSize); |
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126 TInt MapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading); |
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127 void UnmapUserRamCode(DMemModelCodeSegMemory* aMemory, TBool aLoading); |
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128 public: |
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129 enum TMemModelProcessAttributes |
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130 { |
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131 ESeparateGlobalSpace=0x40000000, |
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132 EMMProcessAttributesMask = ESeparateGlobalSpace, |
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133 }; |
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134 |
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135 struct SChunkInfo |
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136 { |
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137 DMemModelChunk* iChunk; |
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138 TInt16 iAccessCount; |
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139 TInt16 isReadOnly; |
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140 }; |
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141 |
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142 TInt iChunkCount; |
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143 TInt iChunkAlloc; |
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144 SChunkInfo* iChunks; |
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145 TLinearSection* iLocalSection; |
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146 TInt iOsAsid; |
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147 TPhysAddr iLocalPageDir; |
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148 TPhysAddr iGlobalPageDir; |
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149 TUint32 iAddressCheckMaskR; |
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150 TUint32 iAddressCheckMaskW; |
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151 DMemModelChunk* iCodeChunk; |
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152 DMemModelChunk* iDllDataChunk; |
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153 TInt iSelfModChunks; |
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154 public: |
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155 friend class Monitor; |
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156 }; |
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157 |
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158 |
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159 /******************************************** |
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160 * Chunk Control Block |
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161 ********************************************/ |
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162 |
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163 /** |
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164 @internalComponent |
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165 */ |
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166 class DMemModelChunk : public DChunk |
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167 { |
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168 public: |
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169 /** |
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170 @see DChunk::TChunkAttributes for generic attribute flags |
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171 */ |
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172 enum TMemModelChunkAttributes |
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173 { |
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174 EPrivate =0x80000000, |
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175 ECode =0x40000000, |
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176 EAddressAllocDown =0x20000000, |
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177 |
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178 EAddressRangeMask =0x0f000000, |
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179 EAddressRangeShift =24, |
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180 EAddressLocal =0x00000000, |
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181 EAddressShared =0x01000000, |
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182 EAddressUserGlobal =0x02000000, |
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183 EAddressKernel =0x03000000, |
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184 EAddressFixed =0x04000000, |
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185 |
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186 EMapTypeMask =0x00c00000, |
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187 EMapTypeLocal =0x00000000, |
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188 EMapTypeGlobal =0x00400000, |
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189 EMapTypeShared =0x00800000, |
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190 |
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191 EMMChunkAttributesMask = EPrivate|ECode|EAddressAllocDown|EAddressRangeMask|EMapTypeMask, |
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192 }; |
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193 |
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194 public: |
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195 DMemModelChunk(); |
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196 void Destruct(); |
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197 public: |
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198 virtual TInt Close(TAny* aPtr); |
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199 virtual TInt DoCreate(SChunkCreateInfo& aInfo); |
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200 virtual TInt Adjust(TInt aNewSize); |
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201 virtual TInt AdjustDoubleEnded(TInt aBottom, TInt aTop); |
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202 virtual TInt CheckAccess(); |
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203 virtual TInt Commit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0); |
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204 virtual TInt Allocate(TInt aSize, TInt aGuard=0, TInt aAlign=0); |
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205 virtual TInt Decommit(TInt aOffset, TInt aSize); |
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206 virtual TInt Lock(TInt anOffset, TInt aSize); |
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207 virtual TInt Unlock(TInt anOffset, TInt aSize); |
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208 virtual TInt Address(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress); |
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209 virtual TInt PhysicalAddress(TInt aOffset, TInt aSize, TLinAddr& aKernelAddress, TUint32& aPhysicalAddress, TUint32* aPhysicalPageList=NULL); |
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210 virtual void BTracePrime(TInt aCategory); |
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211 virtual void Substitute(TInt aOffset, TPhysAddr aOldAddr, TPhysAddr aNewAddr); |
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212 virtual TUint8* Base(DProcess* aProcess); |
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213 inline TUint8* Base() const { return DChunk::Base(); } |
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214 public: |
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215 TInt Decommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType); |
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216 void ClaimInitialPages(); |
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217 void SetFixedAddress(TLinAddr aAddr, TInt aInitialSize); |
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218 TInt Reserve(TInt aInitialSize); |
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219 TInt DoCommit(TInt aOffset, TInt aSize, TCommitType aCommitType=DChunk::ECommitDiscontiguous, TUint32* aExtraArg=0); |
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220 void DoDecommit(TInt aOffset, TInt aSize, TDecommitType aDecommitType=EDecommitNormal); |
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221 TInt AllocateAddress(); |
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222 void ApplyPermissions(TInt aOffset, TInt aSize, TPte aPtePerm); |
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223 TLinearSection* LinearSection(); |
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224 TZonePageType GetPageType(); |
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225 |
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226 public: |
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227 virtual TInt SetupPermissions()=0; |
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228 |
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229 public: |
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230 TBitMapAllocator* iOsAsids; // NULL for local or fully global else list of OS ASIDs |
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231 TPte iPtePermissions; |
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232 TPde iPdePermissions; |
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233 TUint16* iPageTables; |
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234 TBitMapAllocator* iPageBitMap; // NULL if not disconnected chunk |
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235 TBitMapAllocator* iPermanentPageBitMap; |
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236 DMemModelChunk* iKernelMirror; |
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237 public: |
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238 friend class Monitor; |
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239 }; |
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240 |
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241 |
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242 /******************************************** |
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243 * Code segment |
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244 ********************************************/ |
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245 |
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246 /** |
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247 @internalComponent |
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248 */ |
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249 class DMemModelCodeSegMemory : public DMmuCodeSegMemory |
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250 { |
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251 public: |
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252 DMemModelCodeSegMemory(DEpocCodeSeg* aCodeSeg); |
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253 ~DMemModelCodeSegMemory(); |
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254 TInt Create(TCodeSegCreateInfo& aInfo); |
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255 TInt Loaded(TCodeSegCreateInfo& aInfo); |
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256 void Substitute(TInt aOffset, TPhysAddr aOld, TPhysAddr aNew); |
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257 void Destroy(); |
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258 public: |
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259 DMemModelProcess* iCreator; // process loading this code segment |
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260 |
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261 TPhysAddr* iPages; // list of physical pages (iPageCount+iDataPageCount) |
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262 |
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263 /** |
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264 List of OS ASIDs this code segment is mapped into. |
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265 Protected by RamAllocMutex and System Lock. |
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266 */ |
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267 TBitMapAllocator* iOsAsids; |
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268 |
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269 TLinAddr* iCopyOfExportDir; // kernel side copy of export directory or NULL |
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270 }; |
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271 |
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272 /** |
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273 @internalComponent |
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274 */ |
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275 class DMemModelCodeSeg: public DEpocCodeSeg |
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276 { |
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277 public: |
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278 DMemModelCodeSeg(); |
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279 virtual ~DMemModelCodeSeg(); |
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280 virtual TInt DoCreateRam(TCodeSegCreateInfo& aInfo, DProcess* aProcess); |
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281 virtual TInt DoCreateXIP(DProcess* aProcess); |
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282 virtual TInt Loaded(TCodeSegCreateInfo& aInfo); |
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283 virtual void ReadExportDir(TUint32* aDest); |
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284 virtual TBool FindCheck(DProcess* aProcess); |
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285 virtual TBool OpenCheck(DProcess* aProcess); |
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286 virtual void BTracePrime(TInt aCategory); |
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287 inline DMemModelCodeSegMemory* Memory() |
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288 { return (DMemModelCodeSegMemory*)iMemory; } |
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289 inline TPhysAddr* Pages() |
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290 { return iMemory!=0 ? Memory()->iPages : (TPhysAddr*)0; } |
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291 public: |
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292 TInt iCodeAllocBase; |
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293 TInt iDataAllocBase; |
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294 TAny* iKernelData; // only for kernel modules |
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295 }; |
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296 |
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297 |
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298 /******************************************** |
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299 * MMU stuff |
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300 ********************************************/ |
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301 |
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302 /** |
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303 @internalComponent |
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304 Indicates that corresponding linear address applies to unknown address space. |
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305 Common for EMemTypeShared types of chunks with no owning process. |
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306 */ |
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307 #define UNKNOWN_MAPPING ((TInt)-2) |
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308 |
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309 /** |
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310 @internalComponent |
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311 Indicates that corresponding linear address applies to global address space. |
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312 */ |
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313 #define GLOBAL_MAPPING ((const TAny*)-1) |
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314 |
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315 /** |
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316 @internalComponent |
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317 Indicates that corresponding linear address applies to kernel process (either global or Kernel's local space). |
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318 */ |
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319 #define KERNEL_MAPPING ((TInt)0) |
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320 |
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321 |
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322 /** |
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323 @internalComponent |
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324 */ |
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325 class Mmu : public MmuBase |
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326 { |
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327 public: |
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328 enum TFlushFlags { |
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329 EFlushDTLB=0x01, |
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330 EFlushDCache=0x02, |
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331 EFlushITLB=0x04, |
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332 EFlushICache=0x08, |
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333 EFlushDDecommit=0x80000000, |
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334 EFlushDPermChg=0x20000000, |
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335 EFlushDMove=0x40000000, |
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336 EFlushIPermChg=0x04000000, |
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337 EFlushIMove=0x10000000, |
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338 EFlushInheritMask=EFlushDPermChg|EFlushDMove|EFlushIPermChg|EFlushIMove, |
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339 }; |
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340 |
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341 enum TPanic |
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342 { |
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343 ELocalPageDirBadAsid, |
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344 EGlobalPageDirBadAsid, |
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345 EPDEBadAsid, |
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346 EFreeOsAsidBadAsid, |
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347 EOsAsidAllocCreateFailed, |
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348 EBadInitialPageAddr, |
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349 EAssignPageTableInvalidUsage, |
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350 EUserCodeAllocatorCreateFailed, |
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351 EDllDataAllocatorCreateFailed, |
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352 ERomUserDataAddressInvalid, |
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353 ERomUserDataSizeInvalid, |
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354 ECreateSharedSectionFailed, |
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355 ECreateUserGlobalSectionFailed, |
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356 ERemapPageFailed, |
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357 ERemapPageTableFailed, |
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358 EFixupXPTFailed, |
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359 ETempMappingFailed, |
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360 EDefragDisablePageFailed, |
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361 EDefragFaultWhilstFMHeld, |
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362 }; |
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363 |
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364 public: |
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365 TPde* LocalPageDir(TInt aOsAsid); |
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366 TPde* GlobalPageDir(TInt aOsAsid); |
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367 TPde& PDE(TLinAddr aAddr, TInt aOsAsid); |
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368 TInt NewOsAsid(TBool aSeparateGlobal); |
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369 void FreeOsAsid(TInt aOsAsid); |
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370 void CreateUserGlobalSection(TLinAddr aBase, TLinAddr aEnd); |
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371 TInt CreateGlobalCodeChunk(); |
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372 |
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373 // virtual - inherited/overridden from MmuBase |
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374 virtual void Init1(); |
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375 // virtual void Init2(); |
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376 virtual void DoInit2(); |
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377 // virtual TBool PteIsPresent(TPte aPte)=0; |
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378 // virtual TPhysAddr PtePhysAddr(TPte aPte, TInt aPteIndex)=0; |
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379 // virtual TPhysAddr PdePhysAddr(TLinAddr aAddr)=0; |
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380 virtual void SetupInitialPageInfo(SPageInfo* aPageInfo, TLinAddr aChunkAddr, TInt aPdeIndex); |
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381 virtual void SetupInitialPageTableInfo(TInt aId, TLinAddr aChunkAddr, TInt aNumPtes); |
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382 virtual void AssignPageTable(TInt aId, TInt aUsage, TAny* aObject, TLinAddr aAddr, TPde aPdePerm); |
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383 virtual TInt UnassignPageTable(TLinAddr aAddr); |
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384 // virtual void BootstrapPageTable(TInt aXptId, TPhysAddr aXptPhys, TInt aId, TPhysAddr aPhysAddr)=0; |
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385 virtual TInt PageTableId(TLinAddr aAddr); |
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386 // virtual TInt BootPageTableId(TLinAddr aAddr, TPhysAddr& aPtPhys)=0; |
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387 // virtual void ClearPageTable(TInt aId, TInt aFirstIndex=0)=0; |
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388 virtual TPhysAddr LinearToPhysical(TLinAddr aAddr); |
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389 virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList=NULL); |
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390 // virtual void MapRamPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, const TPhysAddr* aPageList, TInt aNumPages, TPte aPtePerm)=0; |
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391 // virtual void MapPhysicalPages(TInt aId, SPageInfo::TType aType, TAny* aPtr, TUint32 aOffset, TPhysAddr aPhysAddr, TInt aNumPages, TPte aPtePerm)=0; |
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392 // virtual TInt UnmapPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0; |
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393 // virtual void ClearRamDrive(TLinAddr aStart)=0; |
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394 // virtual TInt PdePtePermissions(TUint& aMapAttr, TPde& aPde, TPte& aPte)=0; |
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395 // virtual void Map(TLinAddr aLinAddr, TPhysAddr aPhysAddr, TInt aSize, TPde aPdePerm, TPte aPtePerm, TInt aMapShift)=0; |
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396 // virtual void Unmap(TLinAddr aLinAddr, TInt aSize)=0; |
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397 // virtual void InitShadowPageTable(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0; |
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398 // virtual void InitShadowPage(TPhysAddr aShadowPhys, TLinAddr aRomAddr)=0; |
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399 // virtual void DoUnmapShadowPage(TInt aId, TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0; |
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400 // virtual TInt UnassignShadowPageTable(TLinAddr aRomAddr, TPhysAddr aOrigPhys)=0; |
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401 // virtual void DoFreezeShadowPage(TInt aId, TLinAddr aRomAddr)=0; |
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402 // virtual void FlushShadow(TLinAddr aRomAddr)=0; |
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403 // virtual void AssignShadowPageTable(TInt aId, TLinAddr aRomAddr)=0; |
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404 // virtual void ClearPages(TInt aNumPages, TPhysAddr* aPageList)=0; |
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405 virtual TPte PtePermissions(TChunkType aChunkType)=0; |
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406 virtual TInt MoveKernelPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest); |
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407 virtual TInt MoveCodeSegMemoryPage(DMemModelCodeSegMemory* aCodeSegMemory, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest); |
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408 virtual TInt MoveCodeChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest); |
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409 virtual TInt MoveDataChunkPage(DChunk* aChunk, TUint32 aOffset, TPhysAddr aOld, TPhysAddr& aNew, TUint aBlockZoneId, TBool aBlockRest); |
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410 |
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411 // pure virtual - new in Mmu |
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412 virtual TInt NewPageDirectory(TInt aOsAsid, TBool aSeparateGlobal, TPhysAddr& aPhysAddr, TInt& aNumPages)=0; |
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413 virtual void InitPageDirectory(TInt aOsAsid, TBool aGlobal)=0; |
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414 virtual TInt PageTableId(TLinAddr aAddr, TInt aOsAsid)=0; |
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415 virtual TPhysAddr LinearToPhysical(TLinAddr aAddr, TInt aOsAsid)=0; |
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416 virtual TInt LinearToPhysical(TLinAddr aAddr, TInt aSize, TPhysAddr& aPhysicalAddress, TPhysAddr* aPhysicalPageList, TInt aOsAsid)=0; |
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417 virtual TInt PreparePagesForDMA(TLinAddr aAddr, TInt aSize, TInt aOsAsid, TPhysAddr* aPhysicalPageList)=0; |
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418 virtual TInt ReleasePagesFromDMA(TPhysAddr* aPhysicalPageList, TInt aPageCount)=0; |
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419 virtual void DoAssignPageTable(TInt aId, TLinAddr aAddr, TPde aPdePerm, const TAny* aOsAsids)=0; |
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420 virtual void RemapPageTableSingle(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, TInt aOsAsid)=0; |
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421 virtual void RemapPageTableMultiple(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr, const TAny* aOsAsids)=0; |
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422 virtual void RemapPageTableGlobal(TPhysAddr aOld, TPhysAddr aNew, TLinAddr aAddr)=0; |
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423 virtual void RemapPageTableAliases(TPhysAddr aOld, TPhysAddr aNew)=0; |
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424 virtual void DoUnassignPageTable(TLinAddr aAddr, const TAny* aOsAsids)=0; |
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425 virtual TPde PdePermissions(TChunkType aChunkType, TBool aRO)=0; |
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426 virtual void ApplyTopLevelPermissions(TLinAddr aAddr, TInt aOsAsid, TInt aNumPdes, TPde aPdePerm)=0; |
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427 virtual void ApplyPagePermissions(TInt aId, TInt aPageOffset, TInt aNumPages, TPte aPtePerm)=0; |
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428 virtual void GenericFlush(TUint32 aMask)=0; |
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429 virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0; |
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430 virtual TLinAddr MapTemp(TPhysAddr aPage,TLinAddr aLinAddr,TInt aPages, TMemoryType aMemType)=0; |
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431 virtual TLinAddr MapSecondTemp(TPhysAddr aPage,TLinAddr aLinAddr, TInt aPages=1)=0; |
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432 virtual void UnmapTemp()=0; |
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433 virtual void UnmapSecondTemp()=0; |
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434 virtual TBool ValidateLocalIpcAddress(TLinAddr aAddr,TInt aSize,TBool aWrite)=0; |
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435 virtual TInt UnlockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0; |
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436 virtual TInt LockRamCachePages(TLinAddr aLinAddr, TInt aNumPages, DProcess* aProcess)=0; |
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437 virtual void MapVirtual(TInt aId, TInt aNumPages)=0; |
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438 virtual TInt UnmapUnownedPages(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0; |
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439 virtual TInt UnmapVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TBool aSetPagesFree, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0; |
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440 virtual TInt UnmapUnownedVirtual(TInt aId, TUint32 aAddr, TInt aNumPages, TPhysAddr* aPageList, TLinAddr* aLAPageList, TInt& aNumPtes, TInt& aNumFree, DProcess* aProcess)=0; |
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441 virtual void RemapPageByAsid(TBitMapAllocator* aOsAsids, TLinAddr aLinAddr, TPhysAddr aOldAddr, TPhysAddr aNewAddr, TPte aPtePerm)=0; |
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442 virtual void CacheMaintenanceOnDecommit(const TPhysAddr* aPhysAddr, TInt aPageCount)=0; |
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443 virtual void CacheMaintenanceOnDecommit(const TPhysAddr aPhysAddr)=0; // Maintains physical (VIPT & PIPT) cache for pages to be reused. |
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444 virtual void CacheMaintenanceOnPreserve(const TPhysAddr* aPhysAddr, TInt aPageCount, TUint iMapAttr)=0; |
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445 virtual void CacheMaintenanceOnPreserve(const TPhysAddr aPhysAddr, TUint iMapAttr)=0; |
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446 virtual void CacheMaintenanceOnPreserve(TPhysAddr aPhysAddr, TInt aSize, TLinAddr aLinAddr, TUint iMapAttr)=0; |
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447 |
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448 public: |
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449 inline static Mmu& Get() |
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450 {return *(Mmu*)TheMmu;} |
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451 static void Panic(TPanic aPanic); |
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452 public: |
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453 TInt iNumOsAsids; |
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454 TInt iNumGlobalPageDirs; |
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455 TBitMapAllocator* iOsAsidAllocator; |
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456 TInt iGlobalPdSize; |
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457 TInt iGlobalPdShift; |
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458 TInt iLocalPdSize; |
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459 TInt iLocalPdShift; |
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460 TInt iAsidGroupSize; // number of global page directories mapped by a page table |
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461 TInt iAsidGroupMask; // number of global page directories mapped by a page table - 1 |
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462 TInt iAsidGroupShift; // log2(number of global page directories mapped by a page table) |
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463 TInt iAliasSize; // minimum allowed spacing between synonyms of any physical address |
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464 TInt iAliasMask; |
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465 TInt iAliasShift; |
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466 TLinAddr iUserLocalBase; // lowest local data address |
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467 TLinAddr iUserLocalEnd; // 1+highest local data address (lowest DLL data address) |
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468 TLinAddr iUserSharedBase; // lowest shared data address (1+highest DLL data address) |
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469 TLinAddr iUserSharedEnd; // 1+highest shared data address (=local PD size) |
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470 TLinAddr iDllDataBase; |
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471 TInt iMaxDllDataSize; |
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472 TLinAddr iUserCodeBase; |
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473 TInt iMaxUserCodeSize; |
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474 TUint32* iAsidInfo; |
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475 TLinAddr iPdeBase; |
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476 TPte iPdPtePerm; |
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477 TPde iPdPdePerm; |
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478 TPte iUserCodeLoadPtePerm; |
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479 TPte iKernelCodePtePerm; |
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480 TPte iGlobalCodePtePerm; |
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481 TUint32 iRamDriveMask; |
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482 TLinearSection* iSharedSection; |
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483 TLinearSection* iUserGlobalSection; |
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484 DMemModelChunk* iGlobalCode; |
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485 SDblQue iAliasList; |
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486 TInt iTempMapCount; |
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487 TInt iSecondTempMapCount; |
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488 TPte* iSecondTempPte; // second PTE used for temporary mappings |
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489 TLinAddr iSecondTempAddr; // address corresponding to iSecondTempPte |
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490 TInt iCacheMaintenanceTempMapAttr; // holds SP_PTE's attr. entry for cache maintenance |
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491 // temporary mapping. |
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492 public: |
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493 friend class Monitor; |
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494 friend TPte& PageTableEntry(TLinAddr aLinAddr); |
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495 }; |
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496 |
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497 |
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498 /******************************************** |
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499 * Functions/Data defined in memory model |
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500 ********************************************/ |
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501 |
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502 /** |
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503 @internalComponent |
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504 */ |
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505 class MM |
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506 { |
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507 public: |
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508 enum TMemModelPanic |
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509 { |
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510 EChunkTransferBadOwner=0, |
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511 EChunkDecommitNoPageTable=1, |
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512 EChunkTransferAllocAddrFailed=2, |
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513 EFsRegisterThread=3, |
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514 EClaimInitialPagesBadPageTable=4, |
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515 EChunkNotDisconnected1=5, |
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516 EChunkNotDisconnected2=6, |
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517 EChunkCommitNoPageTable=7, |
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518 EProcessDestructChunksRemaining=8, |
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519 ECommitInvalidDllDataAddress=9, |
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520 EDecommitInvalidDllDataAddress=10, |
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521 EChunkApplyPermissions1=11, |
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522 EChunkApplyPermissions2=12, |
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523 ECodeSegLoadedNotCreator=13, |
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524 EChunkBadAddressRange=14, |
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525 EPdeAlreadyInUse=15, |
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526 EPteAlreadyInUse=16, |
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527 EMmuMapNoPageTable=17, |
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528 EUnmapBadAlignment=18, |
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529 EBootstrapPageTableBadAddr=19, |
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530 ETempMappingAlreadyInUse=20, |
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531 EDecommitFailed=21, |
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532 EPageTableNotFound=22, |
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533 EUnexpectedPageType=23, |
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534 EOperationNotSupported=24, |
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535 EChunkRemapNoPageTable=25, |
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536 EChunkRemapUnsupported=26, |
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537 ECodeSegRemapWrongPage=27, |
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538 EChunkRemapWrongPageTable=28, |
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539 ETempMappingNoRoom=29, |
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540 }; |
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541 |
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542 static void Panic(TMemModelPanic aPanic); |
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543 public: |
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544 static void Init1(); |
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545 static void StartCrashDebugger(); |
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546 public: |
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547 static TInt MaxPagesInOneGo; |
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548 static DMemModelChunk* SvStackChunk; |
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549 static DMemModelChunk* TheRamDriveChunk; |
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550 static TBitMapAllocator* UserCodeAllocator; |
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551 static TBitMapAllocator* DllDataAllocator; |
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552 }; |
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553 |
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554 #endif |