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1 // Copyright (c) 2007-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\nkernsmp\x86\ncutils.cia |
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15 // |
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16 // |
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17 |
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18 #include <x86.h> |
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19 #include <apic.h> |
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20 |
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21 extern "C" __NAKED__ void NKIdle(TInt) |
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22 { |
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23 asm("sti"); |
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24 asm("hlt"); |
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25 asm("ret"); |
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26 } |
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27 |
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28 __NAKED__ void InitFpu() |
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29 { |
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30 asm("mov eax, cr0"); |
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31 asm("and al, 0xf7"); // enable access to FPU |
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32 asm("mov cr0, eax"); |
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33 asm("fninit"); |
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34 asm("lea ecx, %a0": : "i"(DefaultCoprocessorState)); |
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35 asm("fwait"); |
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36 asm("fnsave [ecx]"); // save clean coprocessor state |
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37 asm("fwait"); |
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38 asm("or al, 8"); |
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39 asm("mov cr0, eax"); // disable access to coprocessor |
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40 asm("ret"); |
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41 } |
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42 |
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43 |
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44 const TLinAddr addressof_CrashState = (TLinAddr)&::CrashState; |
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45 |
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46 /** @internalTechnology |
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47 |
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48 Called to indicate that the system has crashed and all CPUs should be |
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49 halted and should dump their registers. |
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50 |
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51 Doesn't return |
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52 */ |
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53 __NAKED__ void NKern::NotifyCrash(const TAny* /*a0*/, TInt /*a1*/) |
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54 { |
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55 asm("pushfd "); |
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56 asm("cli "); |
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57 asm("push ecx "); |
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58 asm("push edx "); |
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59 asm("push eax "); |
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60 asm("push ebp "); |
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61 asm("push esi "); |
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62 asm("mov ecx, %0": :"i" (addressof_CrashState)); |
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63 asm("mov esi, ds:[%0]" : : "i"(X86_LOCAL_APIC_BASE + X86_LOCAL_APIC_OFFSET_ID)); |
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64 asm("shr esi, 24"); |
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65 asm("mov esi, [esi*4+%0]" : : "i"(&SubSchedulerLookupTable)); |
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66 asm("mov eax, [ecx] "); |
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67 asm("atomic_set: "); |
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68 asm("mov edx, eax "); |
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69 asm("cmp eax, 0 "); |
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70 asm("jnz short atomic_set_1 "); |
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71 asm("mov edx, [%a0]" : : "i" (&TheScheduler.iActiveCpus1)); |
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72 asm("shl edx, 16 "); |
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73 asm("atomic_set_1: "); |
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74 asm("or edx, [esi+%0]" : : "i" _FOFF(TSubScheduler,iCpuMask)); |
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75 asm("lock cmpxchg [ecx], edx "); |
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76 asm("jne short atomic_set "); |
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77 |
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78 asm("cmp eax, 0 "); // were we first to crash? |
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79 asm("jz first_to_crash "); |
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80 |
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81 // not the first to crash - wait for NMI |
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82 asm("cli "); |
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83 asm("pushfd "); |
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84 asm("push cs "); |
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85 asm("lea eax, crash_halt "); |
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86 asm("push eax "); |
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87 asm("iretd "); // return to next instruction, allowing further NMIs |
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88 asm("crash_halt: "); |
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89 asm("hlt "); |
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90 asm("jmp short crash_halt "); |
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91 |
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92 asm("first_to_crash: "); |
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93 asm("mov ebp, [esi+60+%0]" : : "i" _FOFF(TSubScheduler,iExtras)); // points to SCpuData |
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94 asm("lea ebp, [ebp+%0]" : : "i" _FOFF(SCpuData,iRegs)); |
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95 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEsi)); |
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96 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEbp)); |
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97 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEax)); |
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98 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEdx)); |
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99 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEcx)); |
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100 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEflags)); |
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101 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iEip)); |
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102 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iFaultCategory)); |
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103 asm("pop dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iFaultReason)); |
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104 asm("mov [ebp+%0], ebx" : : "i" _FOFF(SFullX86RegSet,iEbx)); |
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105 asm("mov [ebp+%0], edi" : : "i" _FOFF(SFullX86RegSet,iEdi)); |
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106 asm("mov [ebp+%0], esp" : : "i" _FOFF(SFullX86RegSet,iEsp)); |
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107 asm("lea eax, [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iCs)); |
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108 asm("mov [eax], cs "); |
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109 asm("mov [eax+4], ds "); |
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110 asm("mov [eax+8], es "); |
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111 asm("mov [eax+12], fs "); |
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112 asm("mov [eax+16], gs "); |
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113 asm("mov [eax+20], ss "); |
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114 asm("lea ebx, [esi+52+%0]" : : "i" _FOFF(TSubScheduler,iExtras)); // points to i_IrqNestCount |
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115 asm("mov eax, 0x80000000 "); |
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116 asm("lock xchg eax, [ebx] "); |
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117 asm("mov [ebp+%0], eax" : : "i" _FOFF(SFullX86RegSet,iIrqNestCount)); |
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118 |
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119 // send NMI to every other processor |
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120 asm("cli "); |
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121 asm("xor eax, eax "); |
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122 asm("mov ds:[%0], eax": :"i"(X86_LOCAL_APIC_BASE + X86_LOCAL_APIC_OFFSET_ICRH)); |
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123 asm("mov eax, %0" : : "i" (0x000C4400)); |
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124 asm("mov ds:[%0], eax": :"i"(X86_LOCAL_APIC_BASE + X86_LOCAL_APIC_OFFSET_ICRL)); |
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125 |
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126 asm("xor eax, eax "); |
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127 asm("push eax "); |
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128 asm("push eax "); |
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129 asm("push eax "); |
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130 asm("call %a0" : : "i" (NKCrashHandler)); |
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131 asm("pop eax "); |
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132 asm("pop eax "); |
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133 asm("pop eax "); |
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134 |
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135 asm("cli "); |
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136 asm("mov eax, [esi+%0] " : : "i" _FOFF(TSubScheduler,iCpuMask)); |
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137 asm("not eax "); |
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138 asm("mov edx, %0": :"i" (addressof_CrashState)); |
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139 asm("lock and [edx+2], ax "); |
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140 asm("mov dword ptr [esi+44+%0], 1" : : "i" _FOFF(TSubScheduler, iExtras)); // flag that this CPU is done |
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141 asm("xor ecx, ecx "); |
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142 asm("wait_other_cpus: "); |
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143 asm("mov ax, [edx+2] "); |
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144 asm("cmp ax, 0 "); |
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145 asm("jz short wait_other_cpus_done "); |
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146 asm("dec ecx "); |
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147 asm("jnz short wait_other_cpus "); |
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148 asm("wait_other_cpus_done: "); |
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149 |
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150 asm("push dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iFaultReason)); // a1 parameter |
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151 asm("push dword ptr [ebp+%0]" : : "i" _FOFF(SFullX86RegSet,iFaultCategory)); // a0 parameter |
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152 asm("push 1 "); |
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153 asm("call %a0" : : "i" (NKCrashHandler)); |
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154 asm("int 0xff "); // shouldn't get here |
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155 } |
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156 |