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1 // Copyright (c) 2008-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32test\nkernsa\arm\armutils.cia |
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15 // |
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16 // |
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17 |
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18 #include <arm.h> |
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19 #include <nktest/nkutils.h> |
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20 #include <e32cia.h> |
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21 |
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22 #ifdef __SMP__ |
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23 #include <arm_tmr.h> |
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24 #endif |
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25 |
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26 extern "C" { |
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27 |
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28 void thread_request_signal(NThread* aThread); |
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29 |
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30 extern TUint64 fcf; |
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31 extern TUint32 nfcf; |
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32 extern TUint32 nfcfs; |
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33 |
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34 __NAKED__ void __cpu_idle() |
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35 { |
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36 ARM_WFI; |
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37 __JUMP(,lr); |
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38 } |
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39 |
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40 __NAKED__ void __cpu_yield() |
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41 { |
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42 ARM_YIELD; |
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43 __JUMP(,lr); |
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44 } |
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45 |
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46 __NAKED__ TLinAddr __stack_pointer() |
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47 { |
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48 asm("mov r0, sp "); |
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49 __JUMP(,lr); |
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50 } |
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51 |
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52 __NAKED__ TUint32 __cpu_status_reg() |
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53 { |
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54 asm("mrs r0, cpsr "); |
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55 __JUMP(,lr); |
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56 } |
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57 |
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58 __NAKED__ TUint32 __cpu_id() |
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59 { |
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60 asm("mrc p15, 0, r0, c0, c0, 5 "); |
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61 __JUMP(,lr); |
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62 } |
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63 |
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64 __NAKED__ TUint32 __trace_cpu_num() |
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65 { |
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66 asm("mrc p15, 0, r0, c0, c0, 5 "); |
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67 asm("and r0, r0, #15 "); |
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68 __JUMP(,lr); |
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69 } |
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70 |
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71 __NAKED__ TUint32 __get_rwno_tid() |
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72 { |
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73 GET_RWNO_TID(,r0); |
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74 __JUMP(,lr); |
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75 } |
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76 |
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77 __NAKED__ TUint32 __get_static_data() |
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78 { |
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79 asm("ldr r0, 1f "); |
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80 asm("ldr r0, [r0] "); |
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81 __JUMP(,lr); |
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82 asm("1: "); |
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83 asm(".word %a0" : : "i" ((TInt)&TheScheduler)); |
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84 } |
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85 |
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86 #ifdef __SMP__ |
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87 __NAKED__ TUint32 __get_local_timer_address() |
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88 { |
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89 GET_RWNO_TID(,r0); |
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90 asm("nop "); |
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91 asm("nop "); |
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92 asm("nop "); |
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93 asm("ldr r0, [r0, #%a0]" : : "i" _FOFF(TSubScheduler,i_LocalTimerAddr)); |
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94 asm("nop "); |
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95 asm("nop "); |
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96 asm("nop "); |
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97 __JUMP(,lr); |
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98 } |
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99 |
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100 __NAKED__ TUint32 __get_local_timer_count() |
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101 { |
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102 GET_RWNO_TID(,r0); |
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103 asm("nop "); |
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104 asm("nop "); |
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105 asm("nop "); |
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106 asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TSubScheduler,i_LocalTimerAddr)); |
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107 asm("nop "); |
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108 asm("nop "); |
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109 asm("nop "); |
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110 asm("ldr r0, [r1, #%a0]" : : "i" _FOFF(ArmLocalTimer,iTimerCount)); |
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111 asm("cmp r0, #0 "); |
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112 __JUMP(,lr); |
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113 } |
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114 |
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115 __NAKED__ TUint32 __set_local_timer_count() |
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116 { |
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117 GET_RWNO_TID(,r0); |
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118 asm("nop "); |
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119 asm("nop "); |
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120 asm("nop "); |
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121 asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TSubScheduler,i_LocalTimerAddr)); |
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122 asm("nop "); |
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123 asm("nop "); |
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124 asm("nop "); |
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125 asm("ldr r0, [r1, #%a0]" : : "i" _FOFF(ArmLocalTimer,iTimerCount)); |
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126 asm("str r0, [r1, #%a0]" : : "i" _FOFF(ArmLocalTimer,iTimerCount)); |
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127 __JUMP(,lr); |
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128 } |
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129 |
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130 __NAKED__ TUint32 __swp_local_timer_count() |
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131 { |
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132 GET_RWNO_TID(,r0); |
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133 asm("nop "); |
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134 asm("nop "); |
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135 asm("nop "); |
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136 asm("ldr r1, [r0, #%a0]" : : "i" _FOFF(TSubScheduler,i_LocalTimerAddr)); |
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137 asm("nop "); |
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138 asm("nop "); |
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139 asm("nop "); |
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140 asm("ldr r0, [r1, #%a0]!" : : "i" _FOFF(ArmLocalTimer,iTimerCount)); |
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141 asm("swp r0, r0, [r1] "); |
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142 __JUMP(,lr); |
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143 } |
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144 #endif |
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145 |
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146 TUint32 __NAKED__ norm_fast_counter() |
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147 { |
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148 asm("str lr, [sp, #-4]! "); |
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149 asm("bl " CSM_CFUNC(fast_counter)); |
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150 asm("ldr r2, __nfcfs "); |
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151 asm("ldr r2, [r2] "); |
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152 asm("rsb r3, r2, #32 "); |
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153 asm("mov r0, r0, lsr r2 "); |
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154 asm("orr r0, r0, r1, lsl r3 "); |
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155 __POPRET(""); |
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156 |
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157 asm("__nfcfs: "); |
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158 asm(".word nfcfs "); |
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159 } |
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160 |
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161 __NAKED__ TUint32 set_bit0_if_nonnull(TUint32&) |
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162 { |
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163 __DATA_MEMORY_BARRIER_Z__(r12); |
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164 asm("mov r3, r0 "); |
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165 asm("1: "); |
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166 LDREX(0,3); |
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167 asm("movs r1, r0 "); |
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168 asm("beq 2f "); |
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169 asm("orr r1, r1, #1 "); |
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170 STREX(12,1,3); |
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171 asm("cmp r12, #0 "); |
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172 asm("bne 1b "); |
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173 asm("2: "); |
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174 __DATA_MEMORY_BARRIER_Z__(r12); |
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175 __JUMP(,lr); |
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176 } |
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177 |
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178 __NAKED__ void flip_bit0(TUint32&) |
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179 { |
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180 __DATA_MEMORY_BARRIER_Z__(r12); |
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181 asm("1: "); |
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182 LDREX(1,0); |
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183 asm("eor r1, r1, #1 "); |
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184 STREX(12,1,0); |
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185 asm("cmp r12, #0 "); |
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186 asm("bne 1b "); |
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187 __DATA_MEMORY_BARRIER__(r12); |
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188 __JUMP(,lr); |
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189 } |
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190 |
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191 __NAKED__ TUint32 swap_out_if_bit0_clear(TUint32&) |
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192 { |
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193 __DATA_MEMORY_BARRIER_Z__(r12); |
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194 asm("mov r3, r0 "); |
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195 asm("1: "); |
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196 LDREX(0,3); |
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197 asm("tst r0, #1 "); |
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198 asm("bne 2f "); |
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199 STREX(2,12,3); |
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200 asm("cmp r2, #0 "); |
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201 asm("bne 1b "); |
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202 asm("2: "); |
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203 __DATA_MEMORY_BARRIER_Z__(r12); |
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204 __JUMP(,lr); |
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205 } |
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206 |
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207 __NAKED__ TUint32 __cpsr() |
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208 { |
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209 asm("mrs r0, cpsr "); |
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210 __JUMP(,lr); |
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211 } |
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212 } |
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213 |
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214 __NAKED__ void RequestComplete(NThread* /*aThread*/, NRequestStatus*& /*aStatus*/, TInt /*aValue*/) |
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215 { |
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216 __DATA_MEMORY_BARRIER_Z__(r12); |
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217 asm("str lr, [sp, #-4]! "); |
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218 asm("1: "); |
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219 LDREX(3,1); |
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220 STREX(14,12,1); |
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221 asm("cmp r14, #0 "); |
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222 asm("bne 1b "); |
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223 asm("cmp r3, #0 "); |
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224 asm("ldr lr, [sp], #4 "); |
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225 asm("strne r2, [r3] "); |
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226 asm("bne " CSM_CFUNC(thread_request_signal)); |
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227 __JUMP(,lr); |
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228 } |
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229 |
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230 |