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1 // Copyright (c) 1998-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // template\template_assp\interrupts.cia |
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15 // Template ASSP interrupt control and dispatch |
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16 // |
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17 // |
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18 |
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19 #include <template_assp_priv.h> |
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20 |
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21 __NAKED__ void TemplateInterrupt::IrqDispatch() |
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22 { |
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23 // IRQ dispatcher |
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24 // Enter with r0-r3, r12 and return address on IRQ stack |
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25 // Must preserve r4-r11 |
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26 |
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27 // for the moment, use bit number as priority |
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28 asm("stmfd sp!, {r4-r6,lr} "); |
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29 asm("ldr r4, __KTemplateIntCtrlBase "); |
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30 asm("ldr r5, __Handlers "); |
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31 asm("dispatch_irq: "); |
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32 asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsIrqPending)); // r12=IRQ pending register |
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33 asm("cmp r12, #0 "); |
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34 asm("ldmeqfd sp!, {r4-r6,pc} "); // no more pending, so finish |
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35 asm("mov r3, #31 "); |
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36 asm("cmp r12, #0x00010000 "); |
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37 asm("movcc r12, r12, lsl #16 "); |
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38 asm("subcc r3, r3, #16 "); |
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39 asm("cmp r12, #0x01000000 "); |
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40 asm("movcc r12, r12, lsl #8 "); |
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41 asm("subcc r3, r3, #8 "); |
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42 asm("cmp r12, #0x10000000 "); |
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43 asm("movcc r12, r12, lsl #4 "); |
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44 asm("subcc r3, r3, #4 "); |
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45 asm("cmp r12, #0x40000000 "); |
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46 asm("movcc r12, r12, lsl #2 "); |
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47 asm("subcc r3, r3, #2 "); |
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48 asm("cmp r12, #0x80000000 "); |
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49 asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1 |
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50 asm("add r0, r5, r3, lsl #3 "); // r0=address of SInterruptHandler |
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51 asm("adr lr, dispatch_irq "); // return to dispatch_irq |
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52 asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr); |
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53 } |
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54 |
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55 __NAKED__ void TemplateInterrupt::FiqDispatch() |
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56 { |
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57 // FIQ dispatcher |
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58 // Enter with return address on FIQ stack |
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59 // We may use r8-r12, but must preserve other registers |
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60 // for the moment, use bit number as priority |
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61 // NOTE: STACK MISALIGNED ON ENTRY (1 WORD PUSHED) |
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62 asm("stmfd sp!, {r0-r3,lr} "); |
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63 asm("ldr r8, __KTemplateIntCtrlBase "); |
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64 asm("ldr r9, __Handlers "); |
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65 asm("dispatch_fiq: "); |
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66 asm("ldr r12, [r4, #%a0]" : : "i" ((TInt)KHoInterruptsFiqPending)); // r12=FIQ pending register |
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67 asm("cmp r12, #0 "); |
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68 asm("ldmeqfd sp!, {r0-r3,pc} "); // no more pending, so finish |
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69 asm("mov r3, #31 "); |
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70 asm("cmp r12, #0x00010000 "); |
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71 asm("movcc r12, r12, lsl #16 "); |
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72 asm("subcc r3, r3, #16 "); |
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73 asm("cmp r12, #0x01000000 "); |
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74 asm("movcc r12, r12, lsl #8 "); |
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75 asm("subcc r3, r3, #8 "); |
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76 asm("cmp r12, #0x10000000 "); |
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77 asm("movcc r12, r12, lsl #4 "); |
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78 asm("subcc r3, r3, #4 "); |
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79 asm("cmp r12, #0x40000000 "); |
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80 asm("movcc r12, r12, lsl #2 "); |
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81 asm("subcc r3, r3, #2 "); |
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82 asm("cmp r12, #0x80000000 "); |
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83 asm("subcc r3, r3, #1 "); // r3=bit no. of MS 1 |
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84 asm("add r0, r9, r3, lsl #3 "); // r0=address of SInterruptHandler |
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85 asm("adr lr, dispatch_fiq "); // return to dispatch_fiq |
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86 asm("ldmia r0, {r0,pc} "); // (*iIsr)(iPtr); |
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87 |
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88 asm("__KTemplateIntCtrlBase: "); |
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89 asm(".word %a0" : : "i" ((TInt)KHwBaseInterrupts)); |
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90 asm("__Handlers: "); |
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91 asm(".word %a0" : : "i" ((TInt)&TemplateInterrupt::Handlers[0])); |
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92 } |
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93 |