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1 // Copyright (c) 1995-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\common\arm\cgcchelp.cia |
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15 // |
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16 // |
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17 |
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18 #include "../common.h" |
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19 #ifdef __KERNEL_MODE__ |
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20 #include "nkern.h" |
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21 #endif |
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22 |
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23 extern "C" { |
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24 #ifdef __GCC32__ |
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25 EXPORT_C __NAKED__ TInt __divsi3(TInt /*dividend*/,TInt /*divisor*/) |
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26 // |
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27 // Signed divide of r0 by r1: returns quotient in r0 |
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28 // Quotient is truncated (rounded towards zero). |
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29 // Destroys r2, r3 and ip |
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30 // Negates dividend and divisor, then does an unsigned divide; signs |
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31 // get sorted out again at the end. |
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32 // |
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33 // Have to calculate the sign of the result for the end of the calculation. |
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34 // Store this in the LSB of ip which also saves the old lr. |
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35 // |
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36 { |
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37 |
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38 asm("STMFD sp!, {lr} "); |
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39 asm("ANDS r3, r1, #0x80000000 "); // r3 bit 31=sign of divisor, rest of r3=0 |
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40 asm("RSBMI r1, r1, #0 "); // r1=ABS(divisor) |
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41 asm("EORS ip, r3, r0, ASR #32 "); // ip bit 31=sign of quotient, all other bits=carry=sign of dividend |
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42 asm("RSBCS r0, r0, #0 "); // r0=ABS(dividend) |
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43 asm(".EXTERN "); |
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44 asm("BL __umodsi3_start "); |
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45 asm("MOV r0, r3 "); |
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46 asm("CMP ip, #0 "); // test sign of quotient |
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47 asm("RSBMI r0, r0, #0 "); // negate if necessary |
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48 __POPRET(""); |
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49 } |
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50 |
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51 |
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52 EXPORT_C __NAKED__ TInt __modsi3(TInt /*dividend*/,TInt /*divisor*/) |
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53 // |
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54 // Signed divide of r0 by r1: returns remainder in r0 |
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55 // Sign of remainder = sign of dividend. |
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56 // Destroys r2, r3 and ip |
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57 // Negates dividend and divisor, then does an unsigned divide; signs |
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58 // get sorted out again at the end. |
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59 // |
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60 // Have to save sign of dividend in order to apply sign to remainder |
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61 // at the end of the calculation. Store this in the LSB of ip which also |
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62 // saves the old lr. |
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63 // |
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64 { |
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65 |
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66 asm("STMFD sp!, {lr} "); |
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67 asm("MOVS r1, r1 "); |
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68 asm("RSBMI r1, r1, #0 "); |
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69 asm("MOVS ip, r0 "); |
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70 asm("RSBMI r0, r0, #0 "); |
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71 asm(".EXTERN "); |
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72 asm("BL __umodsi3_start "); |
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73 asm("MOVS ip, ip "); |
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74 asm("RSBMI r0, r0, #0 "); |
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75 __POPRET(""); |
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76 } |
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77 |
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78 EXPORT_C __NAKED__ TUint __udivsi3(TUint /*dividend*/,TUint /*divisor*/) |
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79 // |
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80 // Unsigned divide of r0 by r1: returns quotient in r0 |
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81 // Quotient is truncated (rounded towards zero). |
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82 // Destroys r2, r3 and ip |
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83 // |
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84 { |
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85 |
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86 asm("MOV ip, lr "); |
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87 asm(".EXTERN "); |
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88 asm("BL __umodsi3_start "); |
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89 asm("MOV r0, r3 "); |
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90 __JUMP(,ip); |
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91 } |
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92 |
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93 |
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94 EXPORT_C __NAKED__ long long __divdi3(long long /*dividend*/, long long /*divisor*/) |
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95 // |
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96 // Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0 |
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97 // |
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98 { |
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99 asm("stmfd sp!, {r4-r8,lr} "); |
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100 asm("eor r8, r1, r3 "); // sign of result into r8 |
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101 asm("movs r1, r1 "); |
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102 asm("bpl 1f "); |
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103 asm("rsbs r0, r0, #0 "); // ABS(dividend) |
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104 asm("rsc r1, r1, #0 "); |
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105 asm("1: "); |
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106 asm("movs r3, r3 "); |
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107 asm("bpl 2f "); |
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108 asm("rsbs r2, r2, #0 "); // ABS(divisor) |
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109 asm("rsc r3, r3, #0 "); |
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110 asm("2: "); |
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111 asm("bl UDiv01 "); // do the division, result in r4,r5 |
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112 asm("eors r0, r4, r8, asr #32 "); // quotient into r1:r0, inverted if quotient -ve |
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113 asm("eors r1, r5, r8, asr #32 "); |
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114 asm("adcs r0, r0, #0 "); // if quotient -ve, add 1 |
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115 asm("adcs r1, r1, #0 "); |
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116 __POPRET("r4-r8,"); |
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117 } |
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118 |
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119 EXPORT_C __NAKED__ long long __moddi3(long long /*dividend*/, long long /*divisor*/) /* signed */ |
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120 { |
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121 asm("stmfd sp!, {r4-r8,lr} "); |
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122 asm("movs r8, r1 "); // sign of remainder (=sign of dividend) into r8 |
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123 asm("bpl 1f "); |
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124 asm("rsbs r0, r0, #0 "); // ABS(dividend) |
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125 asm("rsc r1, r1, #0 "); |
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126 asm("1: "); |
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127 asm("movs r3, r3 "); |
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128 asm("bpl 2f "); |
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129 asm("rsbs r2, r2, #0 "); // ABS(divisor) |
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130 asm("rsc r3, r3, #0 "); |
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131 asm("2: "); |
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132 asm("bl UDiv01 "); // do the division, remainder in r3,r6 |
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133 asm("eors r0, r3, r8, asr #32 "); // remainder into r1:r0, inverted if dividend -ve |
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134 asm("eors r1, r6, r8, asr #32 "); |
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135 asm("adcs r0, r0, #0 "); // if dividend -ve, add 1 |
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136 asm("adcs r1, r1, #0 "); |
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137 __POPRET("r4-r8,"); |
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138 } |
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139 |
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140 EXPORT_C __NAKED__ long long __umoddi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/) /* unsigned */ |
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141 { |
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142 asm("stmfd sp!, {r4-r7,lr} "); |
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143 asm("bl UDiv01 "); // do the division, remainder in r6:r3 |
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144 asm("mov r0, r3 "); |
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145 asm("mov r1, r6 "); |
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146 __POPRET("r4-r7,"); |
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147 } |
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148 |
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149 EXPORT_C __NAKED__ long long __ashrdi3(long long /*value*/, unsigned int /*count*/) |
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150 { |
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151 asm("cmp r2, #63 "); |
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152 asm("movhi r2, #63 "); // count>63 same as count=63 |
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153 asm("cmp r2, #32 "); |
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154 asm("bcs Asr01 "); // jump if shift count >=32 |
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155 asm("rsb r12, r2, #32 "); // r12=32-shift count |
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156 asm("mov r0, r0, lsr r2 "); // shift ls word right |
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157 asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word |
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158 asm("mov r1, r1, asr r2 "); // shift ms word right |
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159 __JUMP(,lr); |
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160 asm("Asr01: "); |
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161 asm("sub r2, r2, #32 "); // r2=shift count-32 |
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162 asm("mov r0, r1, asr r2 "); // ls word = ms word >> (count-32) |
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163 asm("mov r1, r1, asr #32 "); // ms word of result=sign extension of r1 |
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164 __JUMP(,lr); |
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165 } |
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166 |
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167 EXPORT_C __NAKED__ long long __ashldi3(long long /*value*/, unsigned int /*count*/) |
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168 { |
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169 asm("cmp r2, #63 "); |
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170 asm("movhi r2, #64 "); // count>63 same as count=64 |
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171 asm("cmp r2, #32 "); |
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172 asm("bcs Asl01 "); // jump if shift count >=32 |
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173 asm("rsb r12, r2, #32 "); // r12=32-shift count |
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174 asm("mov r1, r1, asl r2 "); // shift ms word left |
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175 asm("orr r1, r1, r0, lsr r12 "); // or in bits shifted out of ls word |
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176 asm("mov r0, r0, asl r2 "); // shift ls word left |
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177 __JUMP(,lr); |
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178 asm("Asl01: "); |
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179 asm("sub r2, r2, #32 "); // r2=shift count-32 |
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180 asm("mov r1, r0, asl r2 "); // result ms word = ls word << (count-32) |
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181 asm("mov r0, #0 "); // ls word of result is zero |
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182 __JUMP(,lr); |
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183 } |
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184 |
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185 EXPORT_C __NAKED__ unsigned long long __lshrdi3(unsigned long long /*value*/, unsigned int /*count*/) |
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186 { |
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187 asm("cmp r2, #63 "); |
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188 asm("movhi r2, #64 "); // count>63 same as count=64 |
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189 asm("cmp r2, #32 "); |
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190 asm("bcs Lsr01 "); // jump if shift count >=32 |
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191 asm("rsb r12, r2, #32 "); // r12=32-shift count |
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192 asm("mov r0, r0, lsr r2 "); // shift ls word right |
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193 asm("orr r0, r0, r1, lsl r12 "); // or in bits shifted out of ms word |
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194 asm("mov r1, r1, lsr r2 "); // shift ms word right |
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195 __JUMP(,lr); |
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196 asm("Lsr01: "); |
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197 asm("sub r2, r2, #32 "); // r2=shift count-32 |
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198 asm("mov r0, r1, lsr r2 "); // ls word = ms word >> (count-32) |
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199 asm("mov r1, #0 "); // ms word of result = 0 |
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200 __JUMP(,lr); |
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201 } |
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202 |
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203 EXPORT_C __NAKED__ long long __muldi3(long long /*multiplicand*/, long long /*multiplier*/) |
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204 { |
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205 asm("mul r1, r2, r1 "); // r1=low2*high1 |
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206 asm("mov ip, r0 "); // ip=low1 |
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207 asm("mla r1, r0, r3, r1 "); // r1+=low1*high2 |
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208 asm("mov r0, #0 "); |
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209 asm("umlal r0, r1, r2, ip "); // r1:r0 += high1*low1 |
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210 __JUMP(,lr); |
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211 } |
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212 |
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213 EXPORT_C __NAKED__ long long __negdi2(long long /*argument*/) |
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214 { |
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215 asm("rsbs r0, r0, #0 "); // r0=0-r0, set carry |
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216 asm("rscs r1, r1, #0 "); // r1=0-r1-(1-C) |
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217 __JUMP(,lr); |
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218 } |
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219 |
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220 EXPORT_C __NAKED__ unsigned long long __udivmoddi4 (unsigned long long /*dividend*/, |
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221 unsigned long long /*divisor*/, |
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222 unsigned long long* /*p_remainder*/) |
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223 { |
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224 asm("stmfd sp!, {r4-r7,lr} "); |
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225 asm("bl UDiv01 "); // do the division, quotient in r5:r4 remainder in r6:r3 |
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226 asm("ldr r7, [sp, #20] "); // r7=p_remainder |
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227 asm("mov r0, r4 "); // r0=quotient low |
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228 asm("stmia r7, {r3,r6} "); // store remainder |
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229 asm("mov r1, r5 "); // r0=quotient high |
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230 __POPRET("r4-r7,"); |
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231 } |
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232 |
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233 EXPORT_C __NAKED__ int __cmpdi2(long long /*a*/, long long /*b*/) |
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234 { |
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235 // return 0 if a<b, 1 if a=b, 2 if a>b |
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236 asm("subs r0, r2, r0 "); |
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237 asm("sbcs r1, r3, r1 "); // r1:r0 = b-a, set flags |
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238 asm("movlt r0, #2 "); // if b<a r0=2 |
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239 __JUMP(lt,lr); // if b<a return |
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240 asm("cmpeq r0, #0 "); // if top word of difference=0, look at bottom |
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241 asm("moveq r0, #1 "); // if a=b, r0=1 |
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242 asm("movne r0, #0 "); // else r=0 |
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243 __JUMP(,lr); |
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244 } |
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245 |
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246 EXPORT_C __NAKED__ int __ucmpdi2(unsigned long long /*a*/, unsigned long long /*b*/) |
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247 { |
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248 // return 0 if a<b, 1 if a=b, 2 if a>b |
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249 asm("cmp r1, r3 "); |
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250 asm("cmpeq r0, r2 "); // compare r1:r0 - r3:r2 |
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251 asm("movhi r0, #2 "); // r0=2 if a>b |
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252 asm("moveq r0, #1 "); // r0=1 if a=b |
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253 asm("movlo r0, #0 "); // r0=0 if a<b |
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254 __JUMP(,lr); |
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255 } |
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256 #endif |
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257 |
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258 #if defined(__GCC32__) |
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259 void __division_by_zero(); |
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260 #define DIV_BY_ZERO " __division_by_zero " |
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261 #elif defined(__ARMCC__) |
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262 void __rt_div0 (void); |
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263 #define DIV_BY_ZERO " __cpp(__rt_div0) " |
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264 #endif |
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265 |
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266 EXPORT_C __NAKED__ TUint __umodsi3(TUint /*dividend*/,TUint /*divisor*/) |
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267 // |
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268 // Unsigned divide of r0 by r1: returns remainder in r0, quotient in r3 |
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269 // Sign of remainder = sign of dividend. |
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270 // Destroys r2, r3 |
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271 // |
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272 { |
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273 |
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274 asm("__umodsi3_start:"); |
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275 // |
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276 // Use lookup table for divisors less than 17, and jump to |
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277 // an optimised routine if available |
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278 // |
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279 asm("MOV r3, #0 "); |
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280 asm("CMP r1, #16 "); |
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281 asm("LDRLS r3, [pc, #modtable - . - 8]"); |
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282 asm("LDRLS r3, [r3, r1, asl #2] "); |
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283 asm("CMP r3, #0 "); |
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284 __JUMP(NE,r3); |
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285 // |
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286 // r3 must be zero when entering this point |
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287 // |
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288 asm("MOV r2, r1 "); |
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289 |
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290 asm("__umodsi3_loop: "); |
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291 asm("CMP r2, r0, LSR #8 "); |
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292 asm("MOVLS r2, r2, LSL #8 "); |
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293 asm("BLO __umodsi3_loop "); |
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294 |
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295 asm("CMP r2, r0, LSR #1 "); |
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296 asm("BHI __umodsi3_jump7 "); |
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297 asm("CMP r2, r0, LSR #2 "); |
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298 asm("BHI __umodsi3_jump6 "); |
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299 asm("CMP r2, r0, LSR #3 "); |
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300 asm("BHI __umodsi3_jump5 "); |
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301 asm("CMP r2, r0, LSR #4 "); |
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302 asm("BHI __umodsi3_jump4 "); |
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303 asm("CMP r2, r0, LSR #5 "); |
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304 asm("BHI __umodsi3_jump3 "); |
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305 asm("CMP r2, r0, LSR #6 "); |
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306 asm("BHI __umodsi3_jump2 "); |
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307 asm("CMP r2, r0, LSR #7 "); |
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308 asm("BHI __umodsi3_jump1 "); |
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309 |
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310 asm("__umodsi3_loop2: "); |
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311 asm("MOVHI r2, r2, LSR #8 "); |
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312 |
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313 asm("CMP r0, r2, LSL #7 "); |
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314 asm("ADC r3, r3, r3 "); |
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315 asm("SUBCS r0, r0, r2, LSL #7 "); |
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316 asm("CMP r0, r2, LSL #6 "); |
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317 |
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318 asm("__umodsi3_jump1: "); |
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319 asm("ADC r3, r3, r3 "); |
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320 asm("SUBCS r0, r0, r2, LSL #6 "); |
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321 asm("CMP r0, r2, LSL #5 "); |
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322 asm("__umodsi3_jump2: "); |
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323 asm("ADC r3, r3, r3 "); |
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324 asm("SUBCS r0, r0, r2, LSL #5 "); |
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325 asm("CMP r0, r2, LSL #4 "); |
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326 asm("__umodsi3_jump3: "); |
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327 asm("ADC r3, r3, r3 "); |
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328 asm("SUBCS r0, r0, r2, LSL #4 "); |
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329 asm("CMP r0, r2, LSL #3 "); |
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330 asm("__umodsi3_jump4: "); |
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331 asm("ADC r3, r3, r3 "); |
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332 asm("SUBCS r0, r0, r2, LSL #3 "); |
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333 asm("CMP r0, r2, LSL #2 "); |
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334 asm("__umodsi3_jump5: "); |
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335 asm("ADC r3, r3, r3 "); |
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336 asm("SUBCS r0, r0, r2, LSL #2 "); |
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337 asm("CMP r0, r2, LSL #1 "); |
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338 asm("__umodsi3_jump6: "); |
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339 asm("ADC r3, r3, r3 "); |
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340 asm("SUBCS r0, r0, r2, LSL #1 "); |
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341 asm("__umodsi3_jump7: "); |
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342 asm("CMP r0, r2 "); |
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343 asm("ADC r3, r3, r3 "); |
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344 asm("SUBCS r0, r0, r2 "); |
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345 |
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346 asm("CMP r2, r1 "); |
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347 asm("BNE __umodsi3_loop2 "); |
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348 |
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349 __JUMP(,lr); |
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350 |
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351 asm("modtable: "); |
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352 asm(".word mod_jump_table "); |
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353 // |
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354 // Lookup for optimised divide routines |
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355 // |
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356 asm("mod_jump_table: "); |
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357 asm(".word " DIV_BY_ZERO); // 0 |
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358 asm(".word __mod1 "); // 1 |
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359 asm(".word __mod2 "); // 2 |
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360 asm(".word 0 "); // 3 |
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361 asm(".word __mod4 "); // 4 |
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362 asm(".word __mod5 "); // 5 |
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363 asm(".word 0 "); // 6 |
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364 asm(".word __mod7 "); // 7 |
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365 asm(".word __mod8 "); // 8 |
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366 asm(".word 0 "); // 9 |
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367 asm(".word __mod10 "); // 10 |
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368 asm(".word 0 "); // 11 |
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369 asm(".word 0 "); // 12 |
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370 asm(".word 0 "); // 13 |
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371 asm(".word 0 "); // 14 |
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372 asm(".word 0 "); // 15 |
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373 asm(".word __mod16 "); // 16 |
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374 |
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375 asm("__mod16: "); |
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376 asm("MOV r3,r0,LSR #4 "); |
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377 asm("AND r0,r0,#15 "); |
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378 __JUMP(,lr); |
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379 |
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380 asm("__mod1: "); |
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381 asm("MOV r3,r0 "); |
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382 asm("MOV r0,#0 "); |
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383 __JUMP(,lr); |
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384 |
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385 asm("__mod2: "); |
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386 asm("MOV r3,r0,LSR #1 "); |
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387 asm("AND r0,r0,#1 "); |
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388 __JUMP(,lr); |
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389 |
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390 asm("__mod4: "); |
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391 asm("MOV r3,r0,LSR #2 "); |
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392 asm("AND r0,r0,#3 "); |
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393 __JUMP(,lr); |
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394 |
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395 asm("__mod8: "); |
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396 asm("MOV r3,r0,LSR #3 "); |
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397 asm("AND r0,r0,#7 "); |
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398 __JUMP(,lr); |
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399 |
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400 asm("__mod10: "); |
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401 asm("MOV r3, r0 "); |
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402 asm("SUB r0, r3, #10 "); |
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403 asm("SUB r3, r3, r3, LSR #2 "); |
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404 asm("ADD r3, r3, r3, LSR #4 "); |
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405 asm("ADD r3, r3, r3, LSR #8 "); |
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406 asm("ADD r3, r3, r3, LSR #16 "); |
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407 asm("MOV r3, r3, LSR #3 "); |
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408 asm("ADD r2, r3, r3, ASL #2 "); |
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409 asm("SUBS r0, r0, r2, ASL #1 "); |
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410 asm("ADDPL r3, r3, #1 "); |
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411 asm("ADDMI r0, r0, #10 "); |
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412 __JUMP(,lr); |
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413 |
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414 asm("__mod7: "); |
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415 asm("MOV r3, r0 "); |
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416 asm("SUB r0, r3, #7 "); |
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417 asm("MOV r3, r3, lsr #1 "); |
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418 asm("ADD r3, r3, r3, lsr #3 "); |
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419 asm("ADD r3, r3, r3, lsr #6 "); |
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420 asm("ADD r3, r3, r3, lsr #12 "); |
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421 asm("ADD r3, r3, r3, lsr #24 "); |
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422 asm("MOV r3, r3, lsr #2 "); |
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423 asm("RSB r2, r3, r3, asl #3 "); |
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424 asm("SUBS r0, r0, r2, asl #0 "); |
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425 asm("ADDPL r3, r3, #1 "); |
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426 asm("ADDMI r0, r0, #7 "); |
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427 __JUMP(,lr); |
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428 |
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429 asm("__mod5: "); |
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430 asm("MOV r3, r0 "); |
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431 asm("SUB r0, r3, #5 "); |
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432 asm("SUB r3, r3, r3, lsr #2 "); |
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433 asm("ADD r3, r3, r3, lsr #4 "); |
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434 asm("ADD r3, r3, r3, lsr #8 "); |
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435 asm("ADD r3, r3, r3, lsr #16 "); |
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436 asm("MOV r3, r3, lsr #2 "); |
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437 asm("ADD r2, r3, r3, asl #2 "); |
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438 asm("SUBS r0, r0, r2, asl #0 "); |
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439 asm("ADDPL r3, r3, #1 "); |
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440 asm("ADDMI r0, r0, #5 "); |
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441 __JUMP(,lr); |
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442 } |
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443 |
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444 |
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445 EXPORT_C __NAKED__ unsigned long long __udivdi3(unsigned long long /*dividend*/, unsigned long long /*divisor*/) |
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446 // |
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447 // Dividend in r1:r0, divisor in r3:r2, Return quotient in r1:r0 |
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448 // |
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449 { |
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450 asm("stmfd sp!, {r4-r7,lr} "); |
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451 asm("bl UDiv01 "); // do the division, result in r4,r5 |
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452 asm("mov r0, r4 "); |
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453 asm("mov r1, r5 "); |
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454 __POPRET("r4-r7,"); |
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455 |
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456 // Unsigned 64-bit division. Dividend in r0,r1, divisor in r2,r3 |
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457 // Quotient returned in r4,r5, Remainder in r3,r6 |
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458 // Registers r0-r7,r12 used, r8-r11 unmodified |
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459 asm(".global UDiv01 "); |
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460 asm("UDiv01: "); |
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461 asm("movs r3, r3 "); // check if divisor fits in 32 bits |
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462 asm("bne udiv64a "); // branch if not |
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463 asm("movs r2, r2 "); // check if divisor fits in 31 bits |
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464 asm("bmi udiv64e "); // branch if not |
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465 asm("beq udiv64_divby0 "); // if divisor=0, branch to error routine |
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466 |
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467 // Divisor is <0x80000000 |
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468 // This means that a 32-bit accumulator is sufficient |
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469 asm("mov r4, #0 "); // use r3 as acc, result in r4, r5 |
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470 asm("mov r5, #0 "); |
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471 asm("mov r6, #8 "); // do 2 set of 32 iterations |
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472 asm("udiv64b: "); |
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473 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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474 asm("adcs r3, r3, r3 "); |
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475 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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476 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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477 asm("addcc r3, r3, r2 "); // if borrow, add back |
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478 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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479 asm("adcs r3, r3, r3 "); |
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480 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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481 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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482 asm("addcc r3, r3, r2 "); // if borrow, add back |
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483 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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484 asm("adcs r3, r3, r3 "); |
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485 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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486 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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487 asm("addcc r3, r3, r2 "); // if borrow, add back |
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488 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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489 asm("adcs r3, r3, r3 "); |
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490 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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491 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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492 asm("addcc r3, r3, r2 "); // if borrow, add back |
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493 asm("subs r6, r6, #1 "); // loop |
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494 asm("bne udiv64b "); |
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495 asm("mov r6, #8 "); // 2nd set of 32 iterations |
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496 asm("udiv64c: "); |
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497 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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498 asm("adcs r3, r3, r3 "); |
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499 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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500 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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501 asm("addcc r3, r3, r2 "); // if borrow, add back |
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502 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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503 asm("adcs r3, r3, r3 "); |
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504 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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505 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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506 asm("addcc r3, r3, r2 "); // if borrow, add back |
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507 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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508 asm("adcs r3, r3, r3 "); |
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509 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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510 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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511 asm("addcc r3, r3, r2 "); // if borrow, add back |
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512 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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513 asm("adcs r3, r3, r3 "); |
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514 asm("subs r3, r3, r2 "); // subtract divisor from acc |
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515 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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516 asm("addcc r3, r3, r2 "); // if borrow, add back |
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517 asm("subs r6, r6, #1 "); // loop |
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518 asm("bne udiv64c "); |
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519 __JUMP(,lr); |
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520 |
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521 // 2^31 <= Divisor < 2^32 |
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522 // Need 33-bit accumulator - use carry flag as 33rd bit |
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523 asm("udiv64e: "); |
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524 asm("mov r4, #0 "); // use r3 as acc, result in r4, r5 |
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525 asm("mov r5, #0 "); |
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526 asm("mov r6, #8 "); // do 2 set of 32 iterations |
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527 asm("udiv64f: "); |
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528 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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529 asm("adcs r3, r3, r3 "); |
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530 asm("subcs r3, r3, r2 "); |
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531 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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532 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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533 asm("addcc r3, r3, r2 "); // if borrow, add back |
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534 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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535 asm("adcs r3, r3, r3 "); |
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536 asm("subcs r3, r3, r2 "); |
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537 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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538 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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539 asm("addcc r3, r3, r2 "); // if borrow, add back |
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540 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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541 asm("adcs r3, r3, r3 "); |
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542 asm("subcs r3, r3, r2 "); |
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543 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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544 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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545 asm("addcc r3, r3, r2 "); // if borrow, add back |
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546 asm("adds r1, r1, r1 "); // shift dividend left into acc |
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547 asm("adcs r3, r3, r3 "); |
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548 asm("subcs r3, r3, r2 "); |
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549 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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550 asm("adc r5, r5, r5 "); // shift result bit left into quotient |
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551 asm("addcc r3, r3, r2 "); // if borrow, add back |
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552 asm("subs r6, r6, #1 "); // loop |
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553 asm("bne udiv64f "); |
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554 asm("mov r6, #8 "); // 2nd set of 32 iterations |
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555 asm("udiv64g: "); |
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556 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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557 asm("adcs r3, r3, r3 "); |
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558 asm("subcs r3, r3, r2 "); |
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559 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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560 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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561 asm("addcc r3, r3, r2 "); // if borrow, add back |
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562 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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563 asm("adcs r3, r3, r3 "); |
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564 asm("subcs r3, r3, r2 "); |
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565 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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566 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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567 asm("addcc r3, r3, r2 "); // if borrow, add back |
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568 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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569 asm("adcs r3, r3, r3 "); |
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570 asm("subcs r3, r3, r2 "); |
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571 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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572 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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573 asm("addcc r3, r3, r2 "); // if borrow, add back |
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574 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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575 asm("adcs r3, r3, r3 "); |
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576 asm("subcs r3, r3, r2 "); |
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577 asm("subccs r3, r3, r2 "); // subtract divisor from acc |
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578 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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579 asm("addcc r3, r3, r2 "); // if borrow, add back |
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580 asm("subs r6, r6, #1 "); // loop |
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581 asm("bne udiv64g "); |
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582 __JUMP(,lr); |
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583 |
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584 // Divisor >= 2^32, so quotient < 2^32 |
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585 // Use 64 bit accumulator, 32 bit quotient |
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586 asm("udiv64a: "); |
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587 asm("mov r4, #0 "); // quotient in r4, use r1, r6 as accumulator |
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588 asm("mov r6, #0 "); |
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589 asm("mov r5, #8 "); // do 32 iterations |
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590 asm("udiv64d: "); |
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591 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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592 asm("adcs r1, r1, r1 "); |
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593 asm("adcs r6, r6, r6 "); |
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594 asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 |
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595 asm("sbcs r12, r6, r3 "); |
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596 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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597 asm("movcs r1, r7 "); // if no borrow, update acc |
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598 asm("movcs r6, r12 "); |
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599 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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600 asm("adcs r1, r1, r1 "); |
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601 asm("adcs r6, r6, r6 "); |
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602 asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 |
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603 asm("sbcs r12, r6, r3 "); |
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604 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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605 asm("movcs r1, r7 "); // if no borrow, update acc |
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606 asm("movcs r6, r12 "); |
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607 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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608 asm("adcs r1, r1, r1 "); |
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609 asm("adcs r6, r6, r6 "); |
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610 asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 |
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611 asm("sbcs r12, r6, r3 "); |
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612 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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613 asm("movcs r1, r7 "); // if no borrow, update acc |
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614 asm("movcs r6, r12 "); |
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615 asm("adds r0, r0, r0 "); // shift dividend left into acc |
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616 asm("adcs r1, r1, r1 "); |
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617 asm("adcs r6, r6, r6 "); |
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618 asm("subs r7, r1, r2 "); // subtract divisor from acc, result into r7,r12 |
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619 asm("sbcs r12, r6, r3 "); |
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620 asm("adc r4, r4, r4 "); // shift result bit left into quotient |
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621 asm("movcs r1, r7 "); // if no borrow, update acc |
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622 asm("movcs r6, r12 "); |
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623 asm("subs r5, r5, #1 "); // loop |
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624 asm("bne udiv64d "); |
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625 asm("mov r3, r1 "); // remainder in r3,r6 |
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626 __JUMP(,lr); |
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627 |
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628 asm("udiv64_divby0: "); |
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629 asm("stmfd sp!, {r11,lr} "); |
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630 __EH_FRAME_PUSH2(r11,lr) |
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631 asm("mov r11, sp "); |
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632 asm("bic sp, sp, #4 "); |
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633 asm("bl " DIV_BY_ZERO); |
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634 asm("mov sp, r11 "); |
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635 __POPRET("r11,"); |
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636 } |
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637 |
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638 } |
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639 |