kernel/eka/memmodel/epoc/direct/arm/xsched.cia
changeset 0 a41df078684a
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-1:000000000000 0:a41df078684a
       
     1 // Copyright (c) 1997-2009 Nokia Corporation and/or its subsidiary(-ies).
       
     2 // All rights reserved.
       
     3 // This component and the accompanying materials are made available
       
     4 // under the terms of the License "Eclipse Public License v1.0"
       
     5 // which accompanies this distribution, and is available
       
     6 // at the URL "http://www.eclipse.org/legal/epl-v10.html".
       
     7 //
       
     8 // Initial Contributors:
       
     9 // Nokia Corporation - initial contribution.
       
    10 //
       
    11 // Contributors:
       
    12 //
       
    13 // Description:
       
    14 // e32\memmodel\epoc\direct\arm\xsched.cia
       
    15 // 
       
    16 //
       
    17 
       
    18 #include <e32cia.h>
       
    19 #include <arm_mem.h>
       
    20 
       
    21 #define iMState		iWaitLink.iSpare1
       
    22 
       
    23 #ifdef __SCHEDULER_MACHINE_CODED__
       
    24 
       
    25 #if defined(_DEBUG)
       
    26 extern "C" void __DebugMsgRequestComplete(TInt a0, TInt a1, TInt a2);
       
    27 extern "C" void __DebugMsgReqCompleteWrite(TInt a0, TInt a1, TInt a2);
       
    28 #endif
       
    29 
       
    30 __NAKED__ void DThread::RequestComplete(TRequestStatus*& /*aStatus*/, TInt /*aReason*/)
       
    31 //
       
    32 // Signal this threads request semaphore.
       
    33 //
       
    34 	{
       
    35 	ASM_DEBUG2(DThreadRequestComplete,r0,lr);
       
    36 
       
    37 	asm("ldr r3, [r1] ");					// r3 points to TRequestStatus
       
    38 	asm("mov r12, #0 ");
       
    39 	asm("str r12, [r1] ");					// aStatus=NULL
       
    40 
       
    41 	asm(".global _asm_RequestComplete ");
       
    42 	asm("_asm_RequestComplete: ");
       
    43 
       
    44 #ifdef BTRACE_REQUESTS
       
    45 	asm("stmdb sp!,{r0-r3,lr}");
       
    46 	asm("mov r1,r3");
       
    47 	asm("mov r3,r2");											// arg3 = aReason
       
    48 	asm("mov r2,r1");											// arg2 = aStatus
       
    49 	asm("add r1,r0,#%a0" : : "i" _FOFF(DThread,iNThread));		// arg1 = &this->iNThread
       
    50 	asm("ldr r0,_threadReqequestCompleteTraceHeader");			// arg0 = header
       
    51 	asm("bl " CSM_ZN6BTrace4OutXEmmmm);
       
    52 	asm("ldmia sp!,{r0-r3,lr}");
       
    53 #endif
       
    54 
       
    55 	ASM_DEBUG3(RequestComplete,r0,r3,r2);
       
    56 	asm("ldrb r12, [r0, #%a0]" : : "i" _FOFF(DThread,iMState));
       
    57 	asm("add r0, r0, #%a0" : : "i" _FOFF(DThread,iNThread));
       
    58 	asm("cmp r12, #%a0" : : "i" (DThread::EDead));	// test if iMState=EDead
       
    59 	asm("beq " CSM_ZN5NKern12UnlockSystemEv );		// if it is, finish
       
    60 	asm("tst r3, #3 ");						// check address aligned
       
    61 	asm("streq r2, [r3] ");					// if so, write completion code
       
    62 	asm("moveq r1, #0 ");					// and signal thread
       
    63 	asm("beq " CSM_ZN5NKern19ThreadRequestSignalEP7NThreadP10NFastMutex );
       
    64 	asm("b " CSM_ZN5NKern12UnlockSystemEv ); // bad address, just finish.
       
    65 #ifdef BTRACE_REQUESTS
       
    66 	asm("_threadReqequestCompleteTraceHeader:");
       
    67 	asm(".word %a0" : : "i" (BTRACE_HEADER_C(16,BTrace::ERequests,BTrace::ERequestComplete)));
       
    68 #endif
       
    69 	}
       
    70 
       
    71 #endif
       
    72