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1 // Copyright (c) 1994-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // e32\nkern\arm\ncutils.cpp |
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15 // |
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16 // |
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17 |
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18 #include <arm.h> |
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19 #include "../../include/kernel/kernboot.h" |
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20 |
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21 extern "C" { |
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22 SFullArmRegSet ArmRegs; |
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23 } |
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24 |
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25 #ifdef _DEBUG |
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26 void FastMutexNestAttempt() |
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27 { |
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28 FAULT(); |
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29 } |
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30 |
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31 void FastMutexSignalError() |
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32 { |
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33 FAULT(); |
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34 } |
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35 #endif |
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36 |
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37 void NKern::Init0(TAny*) |
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38 { |
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39 ArmRegs.iExcCode = -1; |
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40 TheScheduler.i_Regs = &ArmRegs; |
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41 } |
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42 |
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43 GLDEF_C TUint32 IrqReturnAddress() |
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44 { |
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45 TStackInfo& stackInfo = ((SSuperPageBase*)::SuperPageAddress)->iStackInfo; |
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46 return ((TUint32)stackInfo.iIrqStackBase) + stackInfo.iIrqStackSize - sizeof(TUint32); |
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47 } |
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48 |
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49 /** Register the global IRQ handler |
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50 Called by the base port at boot time to bind the top level IRQ dispatcher |
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51 to the ARM IRQ vector. Should not be called at any other time. |
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52 |
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53 The handler specified will be called in mode_irq with IRQs disabled and |
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54 FIQs enabled. R0-R3, R12 and the return address from the interrupt will |
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55 be on the top of the mode_irq stack. R14_irq will point to the kernel's |
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56 IRQ postamble routine, which will run IDFCs and reschedule if necessary. |
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57 R13_irq will point to the top of the mode_irq stack and will be 8-byte aligned. |
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58 The handler should preserve all registers other than R0-R3, R12, R14_irq |
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59 and should return to the address in R14_irq. |
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60 |
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61 @param aHandler The address of the top level IRQ dispatcher routine |
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62 */ |
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63 EXPORT_C void Arm::SetIrqHandler(TLinAddr aHandler) |
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64 { |
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65 ArmInterruptInfo.iIrqHandler=aHandler; |
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66 } |
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67 |
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68 /** Register the global FIQ handler |
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69 Called by the base port at boot time to bind the top level FIQ dispatcher |
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70 to the ARM FIQ vector. Should not be called at any other time. |
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71 |
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72 The handler specified will be called in mode_fiq with both IRQs and FIQs |
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73 disabled. The return address from the interrupt will be on the top of the |
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74 mode_fiq stack. R14_fiq will point to the kernel's FIQ postamble routine, |
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75 which will run IDFCs and reschedule if necessary. |
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76 R13_fiq will point to the top of the mode_fiq stack and will be 4 modulo 8. |
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77 The handler should preserve all registers other than R8_fiq-R12_fiq and |
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78 R14_fiq and should return to the address in R14_fiq. |
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79 |
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80 @param aHandler The address of the top level FIQ dispatcher routine |
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81 */ |
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82 EXPORT_C void Arm::SetFiqHandler(TLinAddr aHandler) |
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83 { |
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84 ArmInterruptInfo.iFiqHandler=aHandler; |
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85 } |
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86 |
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87 extern void initialiseState(); |
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88 void Arm::Init1Interrupts() |
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89 // |
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90 // Initialise the interrupt and exception vector handlers. |
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91 // |
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92 { |
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93 // TheIrqHandler=0; // done by placing TheIrqHandler, TheFiqHandler in .bss |
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94 // TheFiqHandler=0; |
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95 |
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96 initialiseState(); |
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97 } |
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98 |
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99 extern "C" void __ArmVectorReset() |
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100 // |
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101 // Reset |
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102 // |
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103 { |
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104 |
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105 FAULT(); |
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106 } |
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107 |
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108 extern "C" void __ArmVectorReserved() |
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109 // |
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110 // Reserved |
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111 // |
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112 { |
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113 |
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114 FAULT(); |
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115 } |
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116 |
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117 |
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118 TInt BTraceDefaultControl(BTrace::TControl /*aFunction*/, TAny* /*aArg1*/, TAny* /*aArg2*/) |
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119 { |
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120 return KErrNotSupported; |
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121 } |
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122 |
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123 |
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124 EXPORT_C void BTrace::SetHandlers(BTrace::THandler aNewHandler, BTrace::TControlFunction aNewControl, BTrace::THandler& aOldHandler, BTrace::TControlFunction& aOldControl) |
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125 { |
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126 TUint irq = NKern::DisableAllInterrupts(); |
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127 |
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128 aOldHandler = BTraceData.iHandler; |
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129 BTraceData.iHandler = aNewHandler; |
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130 ArmInterruptInfo.iBTraceHandler = aNewHandler; |
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131 TheScheduler.iBTraceHandler = aNewHandler; |
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132 |
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133 aOldControl = BTraceData.iControl; |
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134 BTraceData.iControl = aNewControl ? aNewControl : BTraceDefaultControl; |
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135 |
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136 NKern::RestoreInterrupts(irq); |
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137 } |
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138 |
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139 |
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140 EXPORT_C TInt BTrace::SetFilter(TUint aCategory, TInt aValue) |
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141 { |
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142 if(!IsSupported(aCategory)) |
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143 return KErrNotSupported; |
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144 TUint irq = NKern::DisableAllInterrupts(); |
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145 TUint8* filter = BTraceData.iFilter+aCategory; |
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146 TUint oldValue = *filter; |
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147 if(TUint(aValue)<=1u) |
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148 { |
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149 *filter = (TUint8)aValue; |
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150 BTraceContext4(BTrace::EMetaTrace, BTrace::EMetaTraceFilterChange, (TUint8)aCategory | (aValue<<8)); |
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151 if(aCategory==ECpuUsage) |
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152 { |
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153 ArmInterruptInfo.iCpuUsageFilter = aValue; |
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154 TheScheduler.iCpuUsageFilter = aValue; |
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155 } |
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156 if (aCategory == EFastMutex) |
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157 { |
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158 // This is done because of the optimization in ncsched.cia for |
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159 // ARMv5 (check if lock is free (cmp) && filter is enabled (cmpeq)) |
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160 TheScheduler.iFastMutexFilter = aValue ? 1 : 0; |
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161 } |
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162 } |
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163 NKern::RestoreInterrupts(irq); |
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164 return oldValue; |
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165 } |
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166 |
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167 EXPORT_C SCpuIdleHandler* NKern::CpuIdleHandler() |
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168 { |
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169 return &ArmInterruptInfo.iCpuIdleHandler; |
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170 } |
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171 |
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172 EXPORT_C TUint32 NKern::CpuTimeMeasFreq() |
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173 { |
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174 #ifdef MONITOR_THREAD_CPU_TIME |
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175 return NKern::FastCounterFrequency(); |
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176 #else |
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177 return 0; |
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178 #endif |
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179 } |