--- a/kernel/eka/include/kernel/cache_maintenance.h	Thu Jan 07 13:38:45 2010 +0200
+++ b/kernel/eka/include/kernel/cache_maintenance.h	Mon Jan 18 21:31:10 2010 +0200
@@ -301,12 +301,16 @@
 	static void CleanAndInvalidate_DCache_All();
 
 /*
- * Synchronises a single line of cache(s) for instruction execution.
+ * Synchronises the ICache and DCache for instruction execution.
+ * Also invalidates the branch predictor array, this is architecture dependant:
+ *   ARM7: Invalidates aAddr and aAddr+2 (covering possible THUMB instructions)
+ *   ARM6: Invalidates the whole Branch Predictor Array
+ *
  * On SMP, only the running core is maintained.
  * 
- * @arg aAddr Virtual address that belongs to the cache line.
+ * @arg aAddr 32bit aligned virtual address that belongs to the cache line.
  * 
- * NOTE: On SMP this is guaranted NOT to broadcast to other cores.
+ * NOTE: On SMP this is guaranteed NOT to broadcast to other cores.
  * NOTE: It assumes the same line size for ICache and DCache
  */
 	static void IMB_CacheLine(TLinAddr aAddr);