1 // Copyright (c) 2004-2009 Nokia Corporation and/or its subsidiary(-ies). |
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2 // All rights reserved. |
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3 // This component and the accompanying materials are made available |
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4 // under the terms of the License "Eclipse Public License v1.0" |
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5 // which accompanies this distribution, and is available |
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6 // at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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7 // |
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8 // Initial Contributors: |
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9 // Nokia Corporation - initial contribution. |
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10 // |
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11 // Contributors: |
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12 // |
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13 // Description: |
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14 // |
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15 |
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16 |
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17 |
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18 /** |
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19 @file |
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20 @internalComponent |
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21 @released |
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22 */ |
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23 |
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24 #ifndef D_RMD_STEPPING_INL |
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25 #define D_RMD_STEPPING_INL |
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26 |
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27 // |
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28 // IsBitSet |
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29 // |
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30 // Returns 1 if the bit 'aNum' is set within aBitset, 0 otherwise |
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31 inline TUint32 DRMDStepping::IsBitSet(const TUint32 aBitset, const TUint8 aNum) |
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32 { |
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33 return (aBitset & (1 << aNum) ); |
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34 } |
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35 |
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36 // |
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37 // BitCount |
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38 // |
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39 // Count number of bits in aVal |
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40 inline TUint32 DRMDStepping::BitCount(const TUint32 aVal) |
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41 { |
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42 TUint32 num = 0; |
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43 |
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44 for(TInt i = 0; i < 32; i++) |
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45 { |
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46 if ((1 << i) & aVal) |
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47 { |
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48 num++; |
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49 } |
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50 } |
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51 return num; |
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52 } |
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53 |
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54 // |
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55 // Thumb2 opcode decoding |
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56 // |
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57 // Special data instructions and branch and exchange. |
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58 // |
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59 // Returns Opcode as defined in ARM ARM DDI0406A, section A6.2.3 |
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60 inline TUint16 DRMDStepping::t2opcode16special(const TUint16 aInst) |
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61 { |
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62 TUint8 aVal = (aInst & 0x03C0) >> 5; |
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63 |
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64 return aVal; |
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65 } |
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66 |
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67 |
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68 // Thumb2 opcode decoding instructions |
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69 // |
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70 // Returns Opcode as defined in ARM ARM DDI0406A, section A6.2 |
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71 // 16-bit Thumb instruction encoding |
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72 inline TUint16 DRMDStepping::t2opcode16(const TUint16 aInst) |
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73 { |
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74 TUint16 aVal = (aInst & 0xFC00) >> 9; |
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75 |
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76 return aVal; |
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77 } |
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78 |
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79 // ARM opcode decoding functions |
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80 inline TUint32 DRMDStepping::arm_opcode(const TUint32 aInst) |
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81 { |
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82 // #define ARM_OPCODE(x) (((TUint32)(x) & 0x0E000000) >> 25) |
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83 |
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84 TUint32 aVal = ((aInst) & 0x0E000000) >> 25; |
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85 |
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86 return aVal; |
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87 } |
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88 |
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89 inline TUint32 DRMDStepping:: arm_rm(const TUint32 aInst) |
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90 { |
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91 //#define ARM_RM(x) ((TUint32)(x) & 0x0000000F) // bit 0- 4 |
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92 |
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93 TUint32 aVal = (aInst) & 0x0000000F; |
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94 |
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95 return aVal; |
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96 } |
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97 |
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98 inline TUint32 DRMDStepping:: arm_rs(const TUint32 aInst) |
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99 { |
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100 //#define ARM_RS(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11 |
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101 |
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102 TUint32 aVal = ((aInst) & 0x00000F00) >> 8; |
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103 |
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104 return aVal; |
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105 } |
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106 |
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107 inline TUint32 DRMDStepping:: arm_rd(const TUint32 aInst) |
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108 { |
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109 //#define ARM_RD(x) (((TUint32)(x) & 0x0000F000) >> 12) // bit 12-15 |
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110 |
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111 TUint32 aVal = ((aInst) & 0x0000F000) >> 12; |
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112 |
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113 return aVal; |
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114 } |
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115 |
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116 inline TUint32 DRMDStepping:: arm_rn(const TUint32 aInst) |
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117 { |
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118 //#define ARM_RN(x) (((TUint32)(x) & 0x000F0000) >> 16) // bit 16-19 |
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119 |
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120 TUint32 aVal = ((aInst) & 0x000F0000) >> 16; |
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121 |
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122 return aVal; |
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123 } |
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124 |
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125 inline TUint32 DRMDStepping::arm_load(const TUint32 aInst) |
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126 { |
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127 //#define ARM_LOAD(x) (((TUint32)(x) & 0x00100000) >> 20) // bit 20 |
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128 |
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129 TUint32 aVal = ((aInst) & 0x00100000) >> 20; |
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130 |
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131 return aVal; |
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132 } |
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133 |
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134 // Data processing instruction defines |
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135 inline TUint32 DRMDStepping::arm_data_shift(const TUint32 aInst) |
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136 { |
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137 //#define ARM_DATA_SHIFT(x) (((TUint32)(x) & 0x00000060) >> 5) // bit 5- 6 |
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138 |
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139 TUint32 aVal = ((aInst) & 0x00000060) >> 5; |
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140 |
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141 return aVal; |
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142 } |
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143 |
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144 inline TUint32 DRMDStepping::arm_data_c(const TUint32 aInst) |
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145 { |
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146 //#define ARM_DATA_C(x) (((TUint32)(x) & 0x00000F80) >> 7) // bit 7-11 |
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147 |
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148 TUint32 aVal = ((aInst) & 0x00000F80) >> 7; |
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149 |
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150 return aVal; |
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151 } |
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152 |
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153 inline TUint32 DRMDStepping::arm_data_imm(const TUint32 aInst) |
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154 { |
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155 //#define ARM_DATA_IMM(x) ((TUint32)(x) & 0x000000FF) // bit 0-7 |
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156 |
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157 TUint32 aVal = (aInst) & 0x000000FF; |
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158 |
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159 return aVal; |
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160 } |
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161 |
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162 inline TUint32 DRMDStepping::arm_data_rot(const TUint32 aInst) |
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163 { |
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164 //#define ARM_DATA_ROT(x) (((TUint32)(x) & 0x00000F00) >> 8) // bit 8-11 |
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165 |
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166 TUint32 aVal = ((aInst) & 0x00000F00) >> 8; |
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167 |
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168 return aVal; |
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169 } |
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170 |
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171 // Single date transfer instruction defines |
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172 inline TUint32 DRMDStepping::arm_single_imm(const TUint32 aInst) |
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173 { |
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174 //#define ARM_SINGLE_IMM(x) ((TUint32)(x) & 0x00000FFF) // bit 0-11 |
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175 |
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176 TUint32 aVal = (aInst) & 0x00000FFF; |
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177 |
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178 return aVal; |
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179 } |
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180 |
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181 inline TUint32 DRMDStepping::arm_single_byte(const TUint32 aInst) |
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182 { |
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183 //#define ARM_SINGLE_BYTE(x) (((TUint32)(x) & 0x00400000) >> 22) // bit 22 |
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184 |
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185 TUint32 aVal = ((aInst) & 0x00400000) >> 22; |
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186 |
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187 return aVal; |
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188 } |
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189 |
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190 inline TUint32 DRMDStepping::arm_single_u(const TUint32 aInst) |
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191 { |
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192 //#define ARM_SINGLE_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23 |
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193 |
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194 TUint32 aVal = ((aInst) & 0x00800000) >> 23; |
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195 |
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196 return aVal; |
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197 } |
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198 |
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199 inline TUint32 DRMDStepping::arm_single_pre(const TUint32 aInst) |
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200 { |
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201 //#define ARM_SINGLE_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24 |
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202 |
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203 TUint32 aVal = ((aInst) & 0x01000000) >> 24; |
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204 |
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205 return aVal; |
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206 } |
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207 |
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208 // Block data transfer instruction defines |
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209 inline TUint32 DRMDStepping::arm_block_reglist(const TUint32 aInst) |
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210 { |
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211 //#define ARM_BLOCK_REGLIST(x) ((TUint32)(x) & 0x0000FFFF) // bit 0-15 |
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212 |
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213 TUint32 aVal = (aInst) & 0x0000FFFF; |
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214 |
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215 return aVal; |
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216 } |
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217 |
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218 inline TUint32 DRMDStepping::arm_block_u(const TUint32 aInst) |
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219 { |
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220 //#define ARM_BLOCK_U(x) (((TUint32)(x) & 0x00800000) >> 23) // bit 23 |
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221 |
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222 TUint32 aVal = ((aInst) & 0x00800000) >> 23; |
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223 |
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224 return aVal; |
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225 } |
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226 |
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227 inline TUint32 DRMDStepping::arm_block_pre(const TUint32 aInst) |
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228 { |
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229 //#define ARM_BLOCK_PRE(x) (((TUint32)(x) & 0x01000000) >> 24) // bit 24 |
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230 |
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231 TUint32 aVal = ((aInst) & 0x01000000) >> 24; |
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232 |
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233 return aVal; |
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234 } |
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235 |
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236 // Branch instruction defines |
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237 inline TUint32 DRMDStepping::arm_b_addr(const TUint32 aInst) |
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238 { |
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239 //#define ARM_B_ADDR(x) ((x & 0x00800000) ? ((TUint32)(x) & 0x00FFFFFF | 0xFF000000) : (TUint32)(x) & 0x00FFFFFF) |
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240 |
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241 TUint32 aVal = ((aInst & 0x00800000) ? ((TUint32)(aInst) & 0x00FFFFFF | 0xFF000000) : (TUint32)(aInst) & 0x00FFFFFF); |
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242 |
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243 return aVal; |
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244 } |
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245 |
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246 inline TUint32 DRMDStepping::arm_instr_b_dest(const TUint32 aInst, TUint32& aAddress) |
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247 { |
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248 //#define ARM_INSTR_B_DEST(x,a) (ARM_B_ADDR(x) << 2) + ((TUint32)(a) + 8) |
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249 |
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250 TUint32 aVal = (arm_b_addr(aInst) << 2) + ((TUint32)(aAddress) + 8); |
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251 |
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252 return aVal; |
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253 } |
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254 |
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255 inline TUint32 DRMDStepping::thumb_b_addr(const TUint32 aInst) |
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256 { |
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257 //#define THUMB_B_ADDR(x) ((x & 0x0400) ? ((((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16) | 0xFFC00000) :\ |
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258 ((TUint32)(x) & 0x07FF)<<11) | (((TUint32)(x) & 0x07FF0000)>>16) |
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259 |
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260 TUint32 aVal = ((((TUint32)(aInst) & 0x07FF)<<11) | ((TUint32)(aInst) & 0x07FF0000)>>16); |
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261 |
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262 return ((aInst & 0x0400) ? (aVal | 0xFFC00000) : aVal); |
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263 } |
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264 |
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265 inline TUint32 DRMDStepping::thumb_instr_b_dest(const TUint32 aInst, TUint32& aAddress) |
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266 { |
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267 //#define THUMB_INSTR_B_DEST(x,a) (THUMB_B_ADDR(x) << 1) + ((TUint32)(a) + 4) |
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268 |
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269 TUint32 aVal = (thumb_b_addr(aInst) << 1) + ((TUint32)(aAddress) + 4); |
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270 |
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271 return aVal; |
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272 } |
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273 |
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274 inline TUint32 DRMDStepping::arm_carry_bit(void) |
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275 { |
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276 //#define ARM_CARRY_BIT 0x20000000 // bit 30 |
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277 |
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278 TUint32 aVal = 0x20000000; |
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279 |
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280 return aVal; |
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281 } |
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282 |
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283 // Thumb instruction bitmasks |
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284 inline TUint16 DRMDStepping::thumb_opcode(const TUint16 aInst) |
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285 { |
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286 // #define THUMB_OPCODE(x) (((TUint16)(x) & 0xF800) >> 11) |
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287 |
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288 TUint16 aVal = ((aInst) & 0xF800) >> 11; |
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289 |
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290 return aVal; |
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291 } |
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292 |
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293 inline TUint16 DRMDStepping::thumb_inst_7_15(const TUint16 aInst) |
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294 { |
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295 // #define THUMB_INST_7_15(x) (((TUint16)(x) & 0xFF80) >> 7) |
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296 |
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297 TUint16 aVal = ((aInst) & 0xFF80) >> 7; |
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298 |
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299 return aVal; |
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300 } |
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301 |
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302 inline TUint16 DRMDStepping::thumb_inst_8_15(const TUint16 aInst) |
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303 { |
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304 // #define THUMB_INST_8_15(x) (((TUint16)(x) & 0xFF00) >> 8) |
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305 |
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306 TUint16 aVal = ((aInst) & 0xFF00) >> 8; |
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307 |
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308 return aVal; |
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309 } |
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310 |
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311 #endif // D_RMD_STEPPPING_INL |
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312 |
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313 // End of file - d-rmd-stepping.inl |
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