1 /*

     2 * Copyright (c) 2010 Nokia Corporation and/or its subsidiary(-ies).

     3 * All rights reserved.

     4 * This component and the accompanying materials are made available

     5 * under the terms of "Eclipse Public License v1.0"

     6 * which accompanies this distribution, and is available

     7 * at the URL "http://www.eclipse.org/legal/epl-v10.html".

     8 *

     9 * Initial Contributors:

    10 * Nokia Corporation - initial contribution.

    11 *

    12 * Contributors:

    13 *

    14 * Description: 

    15 *

    16 */

    17 

    18 /** @file

    19 

    20     @brief USB Peripheral SHAI header shared part.

    21 

    22     Some Non-kernel USB code will also use structure defined in this

    23     header.  Since usb_peripheral_shai.h always need to include

    24     <kern_priv.h> which is not visible to non-kernel layers, a

    25     separated header is needed.

    26     

    27     This header is the one that defined all common structures used by

    28     kernel & non-kernel layers software.

    29     

    30     Peripheral SHAI header always include this header automatically.

    31     

    32     @publishedDeviceAbstraction

    33 */

    34 

    35 #ifndef USB_PERIPHERAL_SHAI_SHARED_H

    36 #define USB_PERIPHERAL_SHAI_SHARED_H

    37 

    38 // The namespace is documented in file usb_common_shai.h, so it is not

    39 // repeated here

    40 namespace UsbShai

    41     {

    42     /** 

    43      * Bitmaps for TUsbPeripheralEndpointCaps.iSupportedTypesAndDir.

    44      * Endpoint supports Control transfer type.

    45      */

    46     const TUint KUsbEpTypeControl     = 0x00000001;

    47     const TUint KUsbEpTypeIsochronous = 0x00000002;

    48     const TUint KUsbEpTypeBulk        = 0x00000004;

    49     const TUint KUsbEpTypeInterrupt   = 0x00000008;

    50 

    51     /** Endpoint supports IN transfers. */

    52     const TUint KUsbEpDirIn           = 0x80000000;

    53     /** Endpoint supports OUT transfers. */

    54     const TUint KUsbEpDirOut          = 0x40000000;

    55     /** Endpoint supports bidirectional (Control) transfers only.*/

    56     const TUint KUsbEpDirBidirect     = 0x20000000;

    57     

    58     /**

    59      * Indicates that whether DMA is preferred to be applied for this endpoint.

    60      *

    61      * Upper application will declare whether DMA is expected to be used for

    62      * this endpoint if there is one available (PSL knows about it) when setup

    63      * an interface.

    64      * 

    65      * PSL can ignore this request if NO DMA is available.

    66      *

    67      * PIL may query whether a DMA is really applied via interface 

    68      * MPeripheralControllerIf::QueryEndpointResource() later.

    69      *

    70      * @see TUsbPeripheralEndpointInfo::iFeatureWord1.

    71      */

    72     const TUint KUsbEndpointInfoFeatureWord1_DMA             = 0x00000001;

    73 

    74     /**

    75      * Indicates that whether double buffering is preferred to be applied for 

    76      * this endpoint. 

    77      *

    78      * Upper application will declare whether double buffering is expected to 

    79      * be used for this endpoint if there is one available (PSL knows about it)

    80      * when setup an interface.

    81      * 

    82      * PSL can ignore this request if NO double buffering is possible.

    83      * 

    84      * PIL may query whether a double buffering is really applied via interface 

    85      * MPeripheralControllerIf::QueryEndpointResource() later.

    86      *

    87      * @see TUsbPeripheralEndpointInfo::iFeatureWord1.

    88      */

    89     const TUint KUsbEndpointInfoFeatureWord1_DoubleBuffering = 0x00000002;

    90     

    91     /** 

    92      * These are states that are described in the USB standard.

    93      */

    94     enum TUsbPeripheralState

    95         {

    96         EUsbPeripheralStateUndefined,  // 0

    97         EUsbPeripheralStateAttached,   // 1

    98         EUsbPeripheralStatePowered,    // 2

    99         EUsbPeripheralStateDefault,    // 3

   100         EUsbPeripheralStateAddress,    // 4

   101         EUsbPeripheralStateConfigured, // 5

   102         EUsbPeripheralStateSuspended,  // 6

   103         EUsbPeripheralNoState = 0xff   // 255 (used as a place holder)

   104         };

   105     

   106     /** 

   107      * Endpoint capabilities as reported by the PSL driver.

   108      */

   109     class TUsbPeripheralEndpointCaps

   110         {

   111         public:

   112         /** The supported maximum packet sizes. */

   113         TUint iSizes;

   114         

   115         /** 

   116          * The supported endpoint types and directions.

   117          * see the bitmap definition for type and dir inside this header.

   118          */

   119         TUint iTypesAndDir;

   120         

   121         /** set it to ETrue if it is a 'high-speed, high bandwidth' endpoint. */

   122         TBool iHighBandwidth;

   123         

   124         /** 

   125          * Reserved for future use. 

   126          * PSL must set those reserved ram to zero to keep binary compatibility

   127          * with new (in furture) PIL binary which may utilize some of the 

   128          * reserved space.

   129          */

   130         TUint32 iReserved[2];

   131         };

   132     

   133     /**

   134      * The desired endpoint capabilities.

   135      * @see MPeripheralControllerIf::ConfigureEndpoint.

   136      */

   137     class TUsbPeripheralEndpointInfo

   138         {

   139         public:

   140         /** 

   141          * Endpoint type.

   142          *(mask: UsbShai::KUsbEpTypeControl, etc., but used as value).

   143          */

   144         TUint iType;

   145         

   146         /** Direction (mask: UsbShai::KUsbEpDirIn, etc., but used as value). */

   147         TUint iDir;

   148         

   149         /** Maximum packet size (literal, no mask). */

   150         TInt iSize;

   151         

   152         /** 

   153          * Interval for polling full-speed interrupt and isochronous endpoints.

   154          * Expressed either directly in milliseconds with a valid range 1..255

   155          * (interrupt), or for use as 'value' in the expression of 

   156          * interval=2^(value-1) with a valid range 1..16 (isochronous).

   157          */

   158         TInt iInterval;

   159         

   160         /** 

   161          * Interval for polling high-speed interrupt and isochronous endpoints,

   162          * or to specify the NAK rate for high-speed control and bulk OUT

   163          * endpoints. Expressed either for use as 'value' in the expression

   164          * interval=2^(value-1) with a valid range 1..16 (interrupt and 

   165          * isochronous), or directly as the maximum NAK rate with a valid range

   166          * 0..255 (control and bulk).

   167          */

   168         TInt iInterval_Hs;

   169         

   170         /**

   171          * The number of additional transactions per frame to be scheduled(0..2)

   172          * (A value greater than zero is only valid for high-speed high bandwidth

   173          * interrupt and isochronous endpoints. Also note that there are endpoint

   174          * size restrictions associated with additional transactions - see 9.6.6.).

   175          */

   176         TInt iTransactions;

   177         

   178         /** 

   179          * The number of extra bytes that the standard endpoint descriptor

   180          * should be extended by. In almost all cases, this should be 0 (zero).

   181          */    

   182         TInt iExtra;

   183         

   184         /** 

   185          * 32 flag bits indicating miscellaneous endpoint features.

   186          * Currently defined are:

   187          * - KUsbEndpointInfoFeatureWord1_DMA which means apply DMA to this 

   188          *   endpoint if available.

   189          * - KUsbEndpointInfoFeatureWord1_DoubleBuffering which means apply 

   190          *   double buffering to this endpoint if available.

   191          */

   192         TUint32 iFeatureWord1;

   193         

   194         /** Reserved for future use. */

   195         TUint32 iReserved;

   196         };

   197     }

   198 #endif //USB_PERIPHERAL_SHAI_SHARED_H

   199 

   200 // End of files