//
// Copyright (c) 2006 Nokia Corporation and/or its subsidiary(-ies).
// All rights reserved.
// This component and the accompanying materials are made available
// under the terms of "Eclipse Public License v1.0"
// which accompanies this distribution, and is available
// at the URL "http://www.eclipse.org/legal/epl-v10.html".
//
// Initial Contributors:
// Nokia Corporation - initial contribution.
//
// Contributors:
//
// Description:
//
PRINT Run all tlibcwchar
LOAD_SUITE tlibcwchar

CONSECUTIVE

#io - 22
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestfgetwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOnefgetwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestTwofgetwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestThreefgetwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestgetwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOnefwideL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestTwofwideL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestThreefwideL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestFourfwideL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOnefputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestTwofputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestThreefputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestFourfputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOneputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestTwoputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestThreeputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestFourputwcL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOnefputwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestTwofputwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestThreefputwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestFourfputwsL
RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOneungetwcL
# RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOneputwcharL
# RUN_TEST_STEP !Result=0 5 tlibcwchar  TestOnegetwcharL

# misc - 56
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcslen1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcslen2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemcmp1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemcmp2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcswidth1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcswidth2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcswidth3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcswidth4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcwidth1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wcwidth2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemchr1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemchr2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemcpy1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemcpy2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemcpy3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemset1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemset2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemset3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemmove1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemmove2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemmove3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  wmemmove4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol6L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol7L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol8L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstol9L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testmbsinit1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testmbsinit2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testmbsinit3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype6L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype7L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype8L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype9L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype10L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype11L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype12L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype13L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype14L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype15L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype16L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctype17L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctrans1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctrans2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctrans3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctrans4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  testwctrans5L

# misc 33
RUN_TEST_STEP !Result=0 5 tlibcwchar testbtowc1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testbtowc2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testbtowc3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwctob1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwctob2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwctob3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowlower1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowlower2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowlower3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowupper1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowupper2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testtowupper3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsrtowcs1L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsrtowcs2L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsrtowcs3L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsrtowcs4L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsrtowcs5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc1L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc2L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc3L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc4L		
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc5L	
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrtowc6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen0L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbrlen9L

# util - 65
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncmp_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncmp_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncmp_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncmp_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncmp_Test_5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscmp_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscmp_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscmp_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscmp_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscat_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscat_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscat_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscat_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncat_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncat_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncat_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncat_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncat_Test_5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscpy_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscpy_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscpy_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscpy_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcschr_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcschr_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcschr_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcschr_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcschr_Test_5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsrchr_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsrchr_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsrchr_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsrchr_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsrchr_Test_5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsspn_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsspn_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsspn_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsspn_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcspbrk_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcspbrk_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcspbrk_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcspbrk_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscoll_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscoll_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscoll_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscoll_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscspn_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscspn_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscspn_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcscspn_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncpy_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncpy_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncpy_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncpy_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsncpy_Test_5L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsstr_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsstr_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsstr_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcsstr_Test_4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstok1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstok2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstok3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcstok4L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcswcs_Test_1L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcswcs_Test_2L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcswcs_Test_3L
RUN_TEST_STEP !Result=0 5 tlibcwchar  Wcswcs_Test_4L


op_auto - 87
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test0L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test1L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test2L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test3L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test4L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test5L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test6L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test7L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test8L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test9L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test10L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test11L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test12L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test13L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test14L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test15L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test16L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test17L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test18L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test19L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test20L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wprintf_Test21L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test17L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test18L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test19L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test20L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwprintf_Test21L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test17L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test18L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test19L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test20L
RUN_TEST_STEP !Result=0 5 tlibcwchar swprintf_Test21L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test0L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test1L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test2L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test3L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test4L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test5L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test6L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test7L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test8L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test9L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test10L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test11L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test12L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test13L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test14L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test15L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test16L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test17L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test18L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test19L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test20L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwprintf_Test21L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test17L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test18L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test19L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test20L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwprintf_Test21L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test17L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test18L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test19L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test20L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswprintf_Test21L

# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test1L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test2L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test3L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test4L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test5L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test6L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test7L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test8L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test9L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test10L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test11L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test12L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test13L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test14L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test15L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test16L
# RUN_TEST_STEP !Result=0 5 tlibcwchar wscanf_Test17L	

# ip_auto - 66
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar fwscanf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar swscanf_Test17L
# #ifdef TO_BE_TESTED        		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test1L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test2L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test3L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test4L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test5L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test6L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test7L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test8L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test9L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test10L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test11L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test12L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test13L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test14L
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test15L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test16L		
# RUN_TEST_STEP !Result=0 5 tlibcwchar vwscanf_Test17L
# #endif //TO_BE_TESTED		
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar vfwscanf_Test16L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test10L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test11L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test12L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test13L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test14L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test15L
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test16L	
RUN_TEST_STEP !Result=0 5 tlibcwchar vswscanf_Test17L

# conv - 105
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test6L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test7L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test8L
RUN_TEST_STEP !Result=0 5 tlibcwchar mblen_Test9L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar wctomb_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstombs_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbtowc_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test0L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test1L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test2L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test3L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test4L
RUN_TEST_STEP !Result=0 5 tlibcwchar mbstowcs_Test5L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2400
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2401
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2402
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2403
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2404
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2405
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2406
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2407
RUN_TEST_STEP !Result=0 5 tlibcwchar wcrtomb2672
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2409
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2410
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2411
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2412
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2413
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2414
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2415
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2423
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2436
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2437
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2438
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2439
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2440
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2442
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2444
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2460
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsrtombs2673 

RUN_TEST_STEP !Result=0 5 tlibcwchar wcstof1L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstof2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstof3L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstof4L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstof5L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime1_aL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime2_AL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime3_bL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime4_BL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime5_cL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime6_CL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime7_dL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime8_DL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime9_eL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime10_FL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime11_hL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime12_IL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime13_jL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime14_mL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime15_ML
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime16_nL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime17_pL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime18_rL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime19_RL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime20_SL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime21_tL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime22_TL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime23_uL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime25_wL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime26_xL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime27_XL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime28_yL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime29_YL
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime30L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime_mixL
//RUN_TEST_STEP !Result=0 5 tlibcwchar wcsftime2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstod1L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstod2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstod3L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstod4L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstod5L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstold1L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstold2L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstold3L
RUN_TEST_STEP !Result=0 5 tlibcwchar wcstold4L

# other - 157
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnlen1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnlen2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnlen3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnlen4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnlen5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsdup1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsdup2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcscasecmp6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsncasecmp7L 
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpcpy1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpcpy2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpncpy1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpncpy2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpncpy3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcpncpy4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsxfrm1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsxfrm2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoul17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoll17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoull17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoq17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstouq17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoumax17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax6L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax7L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax8L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax9L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax10L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax11L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax12L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax13L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax14L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax15L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax16L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcstoimax17L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsnrtowcs1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsnrtowcs2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsnrtowcs3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsnrtowcs4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testmbsnrtowcs5L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnrtombs1L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnrtombs2L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnrtombs3L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnrtombs4L
RUN_TEST_STEP !Result=0 5 tlibcwchar testwcsnrtombs5L
