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1 /* |
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2 * Copyright (c) 2009 Nokia Corporation and/or its subsidiary(-ies). |
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3 * All rights reserved. |
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4 * This component and the accompanying materials are made available |
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5 * under the terms of "Eclipse Public License v1.0" |
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6 * which accompanies this distribution, and is available |
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7 * at the URL "http://www.eclipse.org/legal/epl-v10.html". |
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8 * |
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9 * Initial Contributors: |
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10 * Nokia Corporation - initial contribution. |
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11 * |
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12 * Contributors: |
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13 * |
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14 * Description: |
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15 * |
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16 */ |
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17 using System; |
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18 using System.Collections.Generic; |
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19 using System.Text; |
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20 using SymbianUtils.BasicTypes; |
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21 using SymbianStructuresLib.Arm.Registers; |
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22 using SymbianStructuresLib.Arm.Registers.VFP; |
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23 using SymbianStructuresLib.Arm.Instructions; |
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24 using SymbianInstructionLib.Arm.Instructions.Common; |
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25 |
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26 namespace SymbianInstructionLib.Arm.Instructions.Arm.DataTransfer |
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27 { |
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28 public abstract class Arm_LoadOrStoreMultiple_VFP : Arm_LoadOrStoreMultiple |
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29 { |
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30 #region Constructors |
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31 protected Arm_LoadOrStoreMultiple_VFP() |
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32 { |
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33 base.AITarget = TArmInstructionTarget.EVectorFloatingPoint; |
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34 } |
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35 #endregion |
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36 |
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37 #region Frin Arm_LoadOrStoreMultiple |
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38 public override TArmRegisterType BaseRegister |
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39 { |
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40 get |
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41 { |
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42 SymMask mask = new SymMask( 0xF << 16, SymMask.TShiftDirection.ERight, 16 ); |
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43 TArmRegisterType ret = (TArmRegisterType) mask.Apply( base.AIRawValue ); |
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44 return ret; |
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45 } |
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46 } |
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47 #endregion |
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48 |
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49 #region Framework API |
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50 public abstract TArmRegisterTypeVFP FirstRegister |
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51 { |
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52 get; |
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53 } |
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54 |
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55 public abstract TArmRegisterTypeVFP[] Registers |
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56 { |
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57 get; |
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58 } |
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59 #endregion |
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60 |
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61 #region Properties |
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62 public TArmInstructionAddressingModeVFP AddressingMode |
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63 { |
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64 get |
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65 { |
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66 // The address mode is a combination of P U and W bits. |
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67 TArmInstructionAddressingModeVFP ret = TArmInstructionAddressingModeVFP.EUndefined; |
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68 |
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69 // First extract P and U bits. NB: We shift this only 22 to the right because |
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70 // we are about to inject the 'W' bit at bit zero. |
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71 SymMask maskPU = new SymMask( 3u << 23, SymMask.TShiftDirection.ERight, 22 ); |
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72 uint bits = maskPU.Apply( base.AIRawValue ); |
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73 |
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74 // Extract W bit |
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75 SymBit wBit = base.AIRawValue[ ArmInstruction.KBitIndexW ]; |
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76 bits |= (uint) wBit; |
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77 |
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78 switch ( bits ) |
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79 { |
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80 case 0: |
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81 case 1: |
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82 case 7: |
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83 default: |
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84 break; |
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85 // P U W |
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86 case 2: // 0 1 0 |
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87 ret = TArmInstructionAddressingModeVFP.EUnindexed; |
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88 break; |
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89 case 3: // 0 1 0 |
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90 ret = TArmInstructionAddressingModeVFP.EIncrement; |
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91 break; |
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92 case 4: // 1 0 0 |
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93 ret = TArmInstructionAddressingModeVFP.EOffsetNegative; |
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94 break; |
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95 case 5: // 1 0 1 |
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96 ret = TArmInstructionAddressingModeVFP.EDecrement; |
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97 break; |
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98 case 6: // 1 1 0 |
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99 ret = TArmInstructionAddressingModeVFP.EOffsetPositive; |
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100 break; |
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101 } |
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102 // |
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103 return ret; |
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104 } |
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105 } |
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106 |
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107 public uint Offset |
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108 { |
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109 get |
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110 { |
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111 uint offset = base.AIRawValue & 0xFF; |
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112 return offset; |
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113 } |
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114 } |
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115 #endregion |
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116 |
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117 #region Internal constants |
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118 protected readonly static SymMask KMaskFirstReg = new SymMask( 0xF000, SymMask.TShiftDirection.ERight, 12 ); |
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119 #endregion |
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120 |
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121 #region Data members |
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122 #endregion |
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123 } |
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124 } |
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125 |