Adaptation/GUID-2344B900-5EC5-4467-BEAD-AB55C88CE63E.dita
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     1 <?xml version="1.0" encoding="utf-8"?>
       
     2 <!-- Copyright (c) 2007-2010 Nokia Corporation and/or its subsidiary(-ies) All rights reserved. -->
       
     3 <!-- This component and the accompanying materials are made available under the terms of the License 
       
     4 "Eclipse Public License v1.0" which accompanies this distribution, 
       
     5 and is available at the URL "http://www.eclipse.org/legal/epl-v10.html". -->
       
     6 <!-- Initial Contributors:
       
     7     Nokia Corporation - initial contribution.
       
     8 Contributors: 
       
     9 -->
       
    10 <!DOCTYPE concept
       
    11   PUBLIC "-//OASIS//DTD DITA Concept//EN" "concept.dtd">
       
    12 <concept id="GUID-2344B900-5EC5-4467-BEAD-AB55C88CE63E" xml:lang="en"><title>Stack
       
    13 Implementation Guide</title><shortdesc>How to implement the platform-specific class for an SDIO stack
       
    14 of an SDIO-based hardware component.</shortdesc><prolog><metadata><keywords/></metadata></prolog><conbody>
       
    15 <p>The stack is provided by the <xref href="GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91.dita"><apiname>DSDIOStack</apiname></xref> class. The developers
       
    16 porting the SDIO Controller must derive the <codeph>DSDIOStack</codeph> class
       
    17 and implement three platform-specific functions: <codeph>IssueMMCCommandSM()</codeph>, <codeph>EnableSDIOInterrupt()</codeph> and <codeph>MaxBlockSize()</codeph>. </p>
       
    18 <p>The following sections describe how to implement these functions in the <codeph>DMySdioStack</codeph> class
       
    19 derived from <codeph>DSIOStack</codeph>.</p>
       
    20 <section id="GUID-727CDF1D-9C0A-4793-8B27-DCC33A0D9E16"><title>Hardware registers</title><p>The <codeph>DMySdioStack</codeph> class
       
    21 needs to have access to the values and offsets of the SDIO configuration registers.
       
    22 Refer to the platform documentation and declare appropriate constants in the
       
    23 header file of the stack class. </p></section>
       
    24 <section id="GUID-94DC0BD9-0588-40A6-A9B9-5DBC2FDBA9E1"><title>IssueMMCCommandSM()</title><p>If
       
    25 you have not declared it already, declare the following function in the definition
       
    26 of <codeph>DMySdioStack</codeph>:<codeblock xml:space="preserve">TMMCErr IssueMMCCommandSM();</codeblock></p><p><xref href="GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91.dita#GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91/GUID-C4395EDB-2CB8-3BA7-A1C6-6B65A3A1FC46"><apiname>DSDIOStack::IssueMMCCommandSM()</apiname></xref> handles the commands to the bus and must be extended to support the SDIO
       
    27 protocol. See also <xref href="GUID-E194A923-99E7-5DC1-BB78-D050A4793A60.dita#GUID-E194A923-99E7-5DC1-BB78-D050A4793A60/GUID-3E6B3479-39B6-47BA-BD1A-18EA2F2A8597">DSDStack::IssueMMCCommandsSM()</xref>.</p><p>Rely on the platform documentation to perform the operations and
       
    28 update appropriate hardware registers when you intercept the following commands:<ul>
       
    29 <li><p><codeph>IO_OP_COND</codeph> (CMD5)</p></li>
       
    30 <li><p><codeph>IO_RW_DIRECT</codeph> (CMD52)</p></li>
       
    31 <li><p><codeph>IO_RW_EXTENDED</codeph> (CMD53)</p></li>
       
    32 </ul></p><p>You should also handle the additional <codeph>IO_SEND_OP_COND</codeph> (R4)
       
    33 and <codeph>IO_RW_DIRECT</codeph> (R5) responses.</p><p>In the following example,
       
    34 the hypothetical hardware platform has two requirements, which are implemented
       
    35 by the <codeph>IssueMMCCommandSM()</codeph> function. The function disables
       
    36 the CRC7 check when receiving an R4 response to an CMD5 command, and disables
       
    37 the SDIO interrupt before issuing a CMD52 command.<codeblock xml:space="preserve">void DMySdioStack::IssueMMCCommandSM()
       
    38 	{
       
    39 	TMMCCommandDesc&amp; cmd = Command();
       
    40 	...
       
    41 	// CMD5 
       
    42 	// Disable the CRC7 check for R4 responses
       
    43 	if (cmd.iCommand == ECmd5)
       
    44 		{	    
       
    45 		// Clear the MMC_CRC7_R4_ENABLE bit
       
    46 		// MMC_SDIO_REG_SLOT0 is a 32-bit hardware register for SDIO in slot 0
       
    47 		AsspRegister::Modify32(MMC_SDIO_REG_SLOT0, MMC_CRC7_R4_ENABLE, 0);
       
    48 		}
       
    49 	else     
       
    50 		{
       
    51 		// Set the MMC_CRC7_R4_ENABLE bit
       
    52 		AsspRegister::Modify32(MMC_SDIO_REG_SLOT0, 0, MMC_CRC7_R4_ENABLE);
       
    53 	    	}
       
    54 
       
    55 	// CMD52
       
    56 	// Disable SDIO interrupts for CMD 52	
       
    57 	if (cmd.iCommand == ECmd52)
       
    58 		{	    
       
    59 		EnableSDIOInterrupt(EFalse);
       
    60 		}
       
    61 	...
       
    62 	}
       
    63 </codeblock></p><p>As the SDIO Controller is instantiated at run-time, the
       
    64 memory used to support the SDIO transfer mechanisms must be allocated dynamically.
       
    65 Therefore, you can use two different types of memory and of data transfer: <ul>
       
    66 <li><p>Programmatic input/output using virtual memory</p></li>
       
    67 <li><p>DMA using physically-allocated <xref href="GUID-85454082-6734-3F1D-983F-734D4C2AB12D.dita"><apiname>DChunk</apiname></xref> objects.</p></li>
       
    68 </ul></p><p>The <codeph>KMMCCmdFlagDMARamValid</codeph> flag of the <xref href="GUID-6B3DDBFD-3A4A-3694-A058-7794700FEC7A.dita"><apiname>TMMCCommandDesc</apiname></xref> object
       
    69 indicates which kind of memory transfer to use. </p><p>If you use the Programmatic I/O method, you need to queue pending data transfers
       
    70 while you handle hardware interrupts. Your platform's documentation specifies
       
    71 which interrupts may be received during transfers.</p></section>
       
    72 <section id="GUID-21B00930-0D6E-464D-8F50-37355D189FE4"><title>EnableSDIOInterrupt()</title><p>Declare
       
    73 the following function in the definition of <codeph>DMySdioStack</codeph>:<codeblock xml:space="preserve">virtual void EnableSDIOInterrupt(TBool aEnable);</codeblock></p><p><xref href="GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91.dita#GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91/GUID-F547703F-62A6-359D-9AC6-818689DDE2DB"><apiname>DSDIOStack::EnableSDIOInterrupt()</apiname></xref> enables or disables
       
    74 the SDIO interrupt. </p><p>The following example is a typical implementation
       
    75 of <codeph>EnableSDIOInterrupt()</codeph>:<codeblock xml:space="preserve">void DMySdioStack::EnableSDIOInterrupt(TBool aEnable)
       
    76 	{
       
    77 	if (aEnable)
       
    78 		{
       
    79 		// Set the Interrupt Enable Master Bit
       
    80 		// MMC_SDIO_REG_SLOT0 is a 32-bit hardware register for SDIO in slot 0
       
    81 		AsspRegister:: Modify32(MMC_SDIO_REG_SLOT0, SDIO_IENM, 0);
       
    82 		}
       
    83 	else
       
    84 		{
       
    85 		// Set the Interrupt Enable Master Bit
       
    86 		AsspRegister:: Modify32(MMC_SDIO_REG_SLOT0, 0, SDIO_IENM);
       
    87 		}
       
    88 	}
       
    89 </codeblock></p><p>You must also ensure that your interrupt handler checks
       
    90 the SDIO interrupt register and the card slot before forwarding the interrupt
       
    91 to the stack. <note>If checking the card slot is likely to take too long,
       
    92 use a DFC (Delayed Function Call) for the interrupt handler to preserve real-time
       
    93 performance.</note></p>The following example illustrates how to implement
       
    94 this aspect of the interrupt handler:<codeblock xml:space="preserve">void DMySdioInterrupt::Service(TAny* aSelf)
       
    95 	{
       
    96 	... 
       
    97 	// Get access to the stack
       
    98 	DPlatMMCStack* stack = (reinterpret_cast&lt;DMySdioInterrupt*&gt;(aSelf))-&gt;Stack();
       
    99 
       
   100 	// MMC_SDIO_REG_SLOT0 is a 32-bit hardware register for SDIO in slot 0
       
   101 	TInt32 sdioReg = AsspRegister::Read32(MMC_SDIO_REG_SLOT0);
       
   102 	// Test for the SDIO interrupt
       
   103 	if (sdioReg &amp; KMMC_SDIO_IntPending)
       
   104 		{
       
   105 		// Trigger the PIL’s interrupt handler for slot 0
       
   106 		stack-&gt;HandleSDIOInterrupt(0);
       
   107 		return;
       
   108 		}
       
   109 
       
   110 	// MMC_SDIO_REG_SLOT1 is a 32-bit hardware register for SDIO in slot 1
       
   111 	sdioReg = AsspRegister::Read32(MMC_SDIO_REG_SLOT1);
       
   112 	// Test for the SDIO interrupt
       
   113 	if (sdioReg &amp; KMMC_SDIO_IntPending)
       
   114 		{
       
   115 		// Trigger the PIL’s interrupt handler for slot 1
       
   116 		stack-&gt;HandleSDIOInterrupt(1);
       
   117 		return;
       
   118 		}
       
   119 
       
   120 	...
       
   121 	}
       
   122 </codeblock></section>
       
   123 <section id="GUID-CF9A5D3D-E46D-4343-9A71-89128217C3F1"><title>MaxBlockSize() </title><p>Declare
       
   124 the following function in the definition of <codeph>DMySdioStack</codeph>:<codeblock xml:space="preserve">virtual TUint32 MaxBlockSize() const;</codeblock></p><p><xref href="GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91.dita#GUID-908B4DA8-8E1C-3B38-90FF-14EC52277B91/GUID-CE55D746-6F55-316B-86F3-6799F29F19B4"><apiname>DSDIOStack::MaxBlockSize()</apiname></xref> returns the maximum block size in bytes
       
   125 that can be transferred on the SDIO bus. Extended read/write commands require
       
   126 this information.</p><p>In the SD protocol, the block size must be a power
       
   127 of two. SDIO does not have the same constraint and the block size can be anything
       
   128 between 1 and 2048.</p><p>The following example is a typical implementation
       
   129 of <codeph>MaxBlockSize()</codeph>:<codeblock xml:space="preserve">TUint32 DMySdioStack::MaxBlockSize() const
       
   130 	{
       
   131 	return(512); 
       
   132 	}
       
   133 </codeblock></p></section>
       
   134 </conbody></concept>